ARM: dts: msm: Add support for Sun GPU

Add the devicetree files for the GPU on Sun devices.

Change-Id: Iaf7a19eb5e2c6c215e838ae1bfa3b01916c804d9
Signed-off-by: Hareesh Gundu <quic_hareeshg@quicinc.com>
This commit is contained in:
Hareesh Gundu
2023-08-16 16:31:57 -07:00
parent 63075d8f63
commit 713410db8f
4 changed files with 339 additions and 0 deletions

132
gpu/sun-gpu-pwrlevels.dtsi Normal file
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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
*/
&msm_gpu {
/* Power levels */
qcom,gpu-pwrlevel-bins {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,gpu-pwrlevels-bins";
qcom,gpu-pwrlevels-0 {
#address-cells = <1>;
#size-cells = <0>;
qcom,initial-pwrlevel = <9>;
qcom,sku-codes = <SKU_CODE(PCODE_UNKNOWN, FC_UNKNOWN)>;
/* TURBO_L1 */
qcom,gpu-pwrlevel@0 {
reg = <0>;
qcom,gpu-freq = <967000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
qcom,bus-freq = <10>;
qcom,bus-min = <10>;
qcom,bus-max = <11>;
};
/* TURBO */
qcom,gpu-pwrlevel@1 {
reg = <1>;
qcom,gpu-freq = <930000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_TURBO>;
qcom,bus-freq = <10>;
qcom,bus-min = <10>;
qcom,bus-max = <11>;
};
/* NOM_L1 */
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-freq = <900000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
qcom,bus-freq = <10>;
qcom,bus-min = <7>;
qcom,bus-max = <10>;
};
/* NOM */
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-freq = <832000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
qcom,bus-freq = <10>;
qcom,bus-min = <7>;
qcom,bus-max = <10>;
};
/* SVS_L2 */
qcom,gpu-pwrlevel@4 {
reg = <4>;
qcom,gpu-freq = <779000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
qcom,bus-freq = <9>;
qcom,bus-min = <7>;
qcom,bus-max = <10>;
};
/* SVS_L1 */
qcom,gpu-pwrlevel@5 {
reg = <5>;
qcom,gpu-freq = <734000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
qcom,bus-freq = <8>;
qcom,bus-min = <6>;
qcom,bus-max = <10>;
};
/* SVS */
qcom,gpu-pwrlevel@6 {
reg = <6>;
qcom,gpu-freq = <607000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;
qcom,bus-freq = <6>;
qcom,bus-min = <4>;
qcom,bus-max = <7>;
};
/* Low_SVS */
qcom,gpu-pwrlevel@7 {
reg = <7>;
qcom,gpu-freq = <443000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
qcom,bus-freq = <4>;
qcom,bus-min = <2>;
qcom,bus-max = <6>;
};
/* Low_SVS_D1 */
qcom,gpu-pwrlevel@8 {
reg = <8>;
qcom,gpu-freq = <342000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;
qcom,bus-freq = <3>;
qcom,bus-min = <2>;
qcom,bus-max = <6>;
};
/* Low_SVS_D2 */
qcom,gpu-pwrlevel@9 {
reg = <9>;
qcom,gpu-freq = <222000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D2>;
qcom,bus-freq = <3>;
qcom,bus-min = <2>;
qcom,bus-max = <3>;
};
};
};
};