ARM: dts: msm: sun: Update arch and memtimer frequencies
Arch timer and memtimer frequencies were set incorrectly for silicon, so set to 1 GHz. Change-Id: I309c1d79712145a4c86d168d923f91d6a6792142 Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
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@@ -734,7 +734,7 @@
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ranges;
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compatible = "arm,armv7-timer-mem";
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reg = <0x16800000 0x1000>;
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clock-frequency = <19200000>;
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clock-frequency = <1000000000>;
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frame@16801000 {
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frame-number = <0>;
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@@ -843,7 +843,7 @@
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<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
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clock-frequency = <19200000>;
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clock-frequency = <1000000000>;
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};
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pcie_crm_hw_0_bcm_voter: bcm_voter@0 {
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