samsung_sm8750/android_kernel_samsung_sm8750-devicetrees
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ARM: dts: msm: sun: Update arch and memtimer frequencies

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Arch timer and memtimer frequencies were set incorrectly for
silicon, so set to 1 GHz.

Change-Id: I309c1d79712145a4c86d168d923f91d6a6792142
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
This commit is contained in:
Melody Olvera
2023-11-15 16:12:24 -08:00
parent 63e7cec2dd
commit 704e2e0186
1 changed files with 2 additions and 2 deletions
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4
qcom/sun.dtsi
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@@ -734,7 +734,7 @@
ranges; ranges;
compatible = "arm,armv7-timer-mem"; compatible = "arm,armv7-timer-mem";
reg = <0x16800000 0x1000>; reg = <0x16800000 0x1000>;
clock-frequency = <19200000>; clock-frequency = <1000000000>;
frame@16801000 { frame@16801000 {
frame-number = <0>; frame-number = <0>;
@@ -843,7 +843,7 @@
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
clock-frequency = <19200000>; clock-frequency = <1000000000>;
}; };
pcie_crm_hw_0_bcm_voter: bcm_voter@0 { pcie_crm_hw_0_bcm_voter: bcm_voter@0 {