Merge 28fa69024d
on remote branch
Change-Id: If62cd95082333e5e6d484a3f755e193fc5a900ba
This commit is contained in:
9
Kbuild
9
Kbuild
@@ -14,7 +14,14 @@ dtbo-$(CONFIG_ARCH_SUN) += display/sun-sde.dtbo \
|
||||
display/sun-sde-display-cdp-nfc-overlay.dtbo \
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||||
display/sun-sde-display-mtp-nfc-overlay.dtbo \
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||||
display/sun-sde-display-cdp-v8-overlay.dtbo \
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||||
display/sun-sde-display-mtp-v8-overlay.dtbo
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||||
display/sun-sde-display-mtp-v8-overlay.dtbo \
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||||
display/sun-sde-display-atp-overlay.dtbo \
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||||
display/sun-sde-display-mtp-3-5mm-overlay.dtbo \
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||||
display/sun-sde-display-rcm-kiwi-overlay.dtbo \
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||||
display/sun-sde-display-rcm-kiwi-v8-overlay.dtbo \
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||||
display/sun-sde-display-rcm-v8-overlay.dtbo \
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display/sun-sde-display-mtp-qmp1000-overlay.dtbo \
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display/sun-sde-display-mtp-qmp1000-v8-overlay.dtbo
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else
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dtbo-$(CONFIG_ARCH_SUN) += display/trustedvm-sun-sde-display-cdp-overlay.dtbo \
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display/trustedvm-sun-sde-display-mtp-overlay.dtbo \
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|
@@ -103,6 +103,10 @@ Optional properties:
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-- qcom,supply-pre-off-sleep: time to sleep (ms) before turning off
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-- qcom,supply-post-off-sleep: time to sleep (ms) after turning off
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- qcom,sde-hw-version: A u32 value indicates the MDSS hw version
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- qcom,hw-fence-sw-version: A u32 value to indicate the hw fencing version. If set to a value
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greather than zero, driver will attempt to enable the feature (if
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supported by the HW). Otherwise, if this value is not set or set
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to zero, feature will remain disabled.
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- qcom,sde-sspp-src-size: A u32 value indicates the address range for each sspp.
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- qcom,sde-mixer-size: A u32 value indicates the address range for each mixer.
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- qcom,sde-ctl-size: A u32 value indicates the address range for each ctl.
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@@ -720,6 +724,7 @@ Example:
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#power-domain-cells = <0>;
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qcom,sde-hw-version = <0x70000000>;
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qcom,hw-fence-sw-version = <0x1>;
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qcom,sde-emulated-env;
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qcom,sde-off = <0x1000>;
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qcom,sde-ctl-off = <0x00002000 0x00002200 0x00002400
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|
121
display/dsi-panel-nt37801-dsc-10bit-cmd.dtsi
Normal file
121
display/dsi-panel-nt37801-dsc-10bit-cmd.dtsi
Normal file
@@ -0,0 +1,121 @@
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||||
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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||||
*/
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||||
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||||
&mdss_mdp {
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||||
dsi_nt37801_amoled_dsc_10b_cmd: qcom,mdss_dsi_nt37801_amoled_dsc_10b_cmd {
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qcom,mdss-dsi-panel-name =
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||||
"nt37801 amoled cmd mode dsi csot panel with DSC 10bit";
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||||
qcom,mdss-dsi-panel-type = "dsi_cmd_mode";
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qcom,mdss-dsi-panel-physical-type = "oled";
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||||
qcom,mdss-dsi-virtual-channel-id = <0>;
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||||
qcom,mdss-dsi-stream = <0>;
|
||||
qcom,mdss-dsi-bpp = <30>;
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||||
qcom,mdss-dsi-color-order = "rgb_swap_rgb";
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||||
qcom,mdss-dsi-underflow-color = <0xff>;
|
||||
qcom,mdss-dsi-border-color = <0>;
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||||
|
||||
qcom,dsi-ctrl-num = <0>;
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||||
qcom,dsi-phy-num = <0>;
|
||||
|
||||
qcom,mdss-dsi-traffic-mode = "non_burst_sync_event";
|
||||
qcom,mdss-dsi-lane-map = "lane_map_0123";
|
||||
qcom,mdss-dsi-bllp-eof-power-mode;
|
||||
qcom,mdss-dsi-bllp-power-mode;
|
||||
qcom,mdss-dsi-lane-0-state;
|
||||
qcom,mdss-dsi-lane-1-state;
|
||||
qcom,mdss-dsi-lane-2-state;
|
||||
qcom,mdss-dsi-lane-3-state;
|
||||
qcom,mdss-dsi-dma-trigger = "trigger_sw";
|
||||
qcom,mdss-dsi-mdp-trigger = "none";
|
||||
qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>;
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||||
|
||||
qcom,mdss-dsi-te-pin-select = <1>;
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||||
qcom,mdss-dsi-wr-mem-start = <0x2c>;
|
||||
qcom,mdss-dsi-wr-mem-continue = <0x3c>;
|
||||
qcom,mdss-dsi-te-dcs-command = <1>;
|
||||
qcom,mdss-dsi-te-check-enable;
|
||||
qcom,mdss-dsi-te-using-te-pin;
|
||||
qcom,spr-pack-type = "pentile";
|
||||
qcom,mdss-dsi-display-timings {
|
||||
timing@0 {
|
||||
cell-index = <0>;
|
||||
qcom,mdss-dsi-panel-framerate = <120>;
|
||||
qcom,mdss-dsi-panel-width = <1440>;
|
||||
qcom,mdss-dsi-panel-height = <3200>;
|
||||
qcom,mdss-dsi-h-front-porch = <100>;
|
||||
qcom,mdss-dsi-h-back-porch = <20>;
|
||||
qcom,mdss-dsi-h-pulse-width = <20>;
|
||||
qcom,mdss-dsi-h-sync-skew = <0>;
|
||||
qcom,mdss-dsi-v-back-porch = <20>;
|
||||
qcom,mdss-dsi-v-front-porch = <44>;
|
||||
qcom,mdss-dsi-v-pulse-width = <2>;
|
||||
qcom,mdss-dsi-h-left-border = <0>;
|
||||
qcom,mdss-dsi-h-right-border = <0>;
|
||||
qcom,mdss-dsi-v-top-border = <0>;
|
||||
qcom,mdss-dsi-v-bottom-border = <0>;
|
||||
qcom,mdss-dsi-panel-jitter = <0x4 0x1>;
|
||||
|
||||
qcom,mdss-dsi-on-command = [
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 01
|
||||
39 01 00 00 00 00 02 c3 19
|
||||
39 01 00 00 00 00 02 6f 01
|
||||
39 01 00 00 00 00 04 c5 0b 0b 0b
|
||||
39 01 00 00 00 00 05 ff aa 55 a5 81
|
||||
39 01 00 00 00 00 02 6f 02
|
||||
39 01 00 00 00 00 02 f5 10
|
||||
39 01 00 00 00 00 02 6f 1b
|
||||
39 01 00 00 00 00 02 f4 55
|
||||
39 01 00 00 00 00 02 6f 18
|
||||
39 01 00 00 00 00 02 f8 19
|
||||
39 01 00 00 00 00 02 6f 0f
|
||||
39 01 00 00 00 00 02 fc 00
|
||||
39 01 00 00 00 00 05 2a 00 00 05 9f
|
||||
39 01 00 00 00 00 05 2b 00 00 0c 7f
|
||||
39 01 00 00 00 00 02 90 03
|
||||
39 01 00 00 00 00 13 91 ab 28 00 28 f2
|
||||
00 02 c2 03 e1 00 0a 03 14 01 e9 10
|
||||
f0
|
||||
39 01 00 00 00 00 05 ff aa 55 a5 81
|
||||
39 01 00 00 00 00 02 6f 23
|
||||
39 01 00 00 00 00 15 fb 00 03 04 55 77
|
||||
77 77 99 9b 10 00 1e 48 9a bb bc de
|
||||
f0 11 30
|
||||
39 01 00 00 00 00 02 f3 dc
|
||||
39 01 00 00 00 00 02 26 00
|
||||
39 01 00 00 00 00 02 35 00
|
||||
39 01 00 00 00 00 05 3b 00 14 00 2c
|
||||
39 01 00 00 00 00 02 53 20
|
||||
39 01 00 00 00 00 07 51 07 ff 07 ff 0f
|
||||
ff
|
||||
39 01 00 00 00 00 02 5a 01
|
||||
39 01 00 00 00 00 02 5f 00
|
||||
39 01 00 00 00 00 02 9c 01
|
||||
05 01 00 00 00 00 01 2c
|
||||
39 01 00 00 00 00 02 2f 00
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 01
|
||||
39 01 00 00 00 00 05 b2 55 01 ff 03
|
||||
05 01 00 00 78 00 01 11
|
||||
05 01 00 00 14 00 01 29
|
||||
];
|
||||
|
||||
qcom,mdss-dsi-off-command = [
|
||||
05 01 00 00 14 00 02 28 00
|
||||
05 01 00 00 78 00 02 10 00];
|
||||
qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
|
||||
qcom,mdss-dsi-timing-switch-command-state =
|
||||
"dsi_lp_mode";
|
||||
qcom,mdss-dsi-h-sync-pulse = <0>;
|
||||
qcom,compression-mode = "dsc";
|
||||
qcom,mdss-dsc-slice-height = <40>;
|
||||
qcom,mdss-dsc-slice-width = <720>;
|
||||
qcom,mdss-dsc-slice-per-pkt = <1>;
|
||||
qcom,mdss-dsc-bit-per-component = <10>;
|
||||
qcom,mdss-dsc-bit-per-pixel = <8>;
|
||||
qcom,mdss-dsc-block-prediction-enable;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
118
display/dsi-panel-nt37801-dsc-10bit-video.dtsi
Normal file
118
display/dsi-panel-nt37801-dsc-10bit-video.dtsi
Normal file
@@ -0,0 +1,118 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&mdss_mdp {
|
||||
dsi_nt37801_amoled_dsc_10b_video: qcom,mdss_dsi_nt37801_amoled_dsc_10b_vid {
|
||||
qcom,mdss-dsi-panel-name =
|
||||
"nt37801 amoled video mode dsi csot panel with DSC 10bit";
|
||||
qcom,mdss-dsi-panel-type = "dsi_video_mode";
|
||||
qcom,mdss-dsi-panel-physical-type = "oled";
|
||||
qcom,mdss-dsi-virtual-channel-id = <0>;
|
||||
qcom,mdss-dsi-stream = <0>;
|
||||
qcom,mdss-dsi-bpp = <30>;
|
||||
qcom,mdss-dsi-border-color = <0>;
|
||||
qcom,dsi-ctrl-num = <0>;
|
||||
qcom,dsi-phy-num = <0>;
|
||||
qcom,mdss-dsi-traffic-mode = "burst_mode";
|
||||
qcom,mdss-dsi-bllp-eof-power-mode;
|
||||
qcom,mdss-dsi-bllp-power-mode;
|
||||
qcom,mdss-dsi-lane-0-state;
|
||||
qcom,mdss-dsi-lane-1-state;
|
||||
qcom,mdss-dsi-lane-2-state;
|
||||
qcom,mdss-dsi-lane-3-state;
|
||||
qcom,mdss-dsi-dma-trigger = "trigger_sw";
|
||||
qcom,mdss-dsi-mdp-trigger = "none";
|
||||
qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>;
|
||||
qcom,mdss-dsi-tx-eot-append;
|
||||
qcom,adjust-timer-wakeup-ms = <1>;
|
||||
|
||||
qcom,mdss-dsi-wr-mem-start = <0x2c>;
|
||||
qcom,mdss-dsi-wr-mem-continue = <0x3c>;
|
||||
qcom,spr-pack-type = "pentile";
|
||||
qcom,mdss-dsi-display-timings {
|
||||
timing@0 {
|
||||
cell-index = <0>;
|
||||
qcom,mdss-dsi-panel-framerate = <120>;
|
||||
qcom,mdss-dsi-panel-width = <1440>;
|
||||
qcom,mdss-dsi-panel-height = <3200>;
|
||||
qcom,mdss-dsi-h-front-porch = <100>;
|
||||
qcom,mdss-dsi-h-back-porch = <20>;
|
||||
qcom,mdss-dsi-h-pulse-width = <20>;
|
||||
qcom,mdss-dsi-h-sync-skew = <0>;
|
||||
qcom,mdss-dsi-v-back-porch = <20>;
|
||||
qcom,mdss-dsi-v-front-porch = <44>;
|
||||
qcom,mdss-dsi-v-pulse-width = <2>;
|
||||
qcom,mdss-dsi-h-left-border = <0>;
|
||||
qcom,mdss-dsi-h-right-border = <0>;
|
||||
qcom,mdss-dsi-v-top-border = <0>;
|
||||
qcom,mdss-dsi-v-bottom-border = <0>;
|
||||
|
||||
qcom,mdss-dsi-on-command = [
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 02 c2 81
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 03
|
||||
39 01 00 00 00 00 02 c6 a2
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 05
|
||||
39 01 00 00 00 00 02 6f 08
|
||||
39 01 00 00 00 00 06 ec 10 00 00 00 ff
|
||||
39 01 00 00 00 00 02 17 01
|
||||
39 01 00 00 00 00 05 3b 00 14 00 2c
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 01
|
||||
39 01 00 00 00 00 02 c3 19
|
||||
39 01 00 00 00 00 02 6f 01
|
||||
39 01 00 00 00 00 04 c5 0b 0b 0b
|
||||
39 01 00 00 00 00 05 ff aa 55 a5 81
|
||||
39 01 00 00 00 00 02 6f 02
|
||||
39 01 00 00 00 00 02 f5 10
|
||||
39 01 00 00 00 00 02 6f 1b
|
||||
39 01 00 00 00 00 02 f4 55
|
||||
39 01 00 00 00 00 02 6f 18
|
||||
39 01 00 00 00 00 02 f8 19
|
||||
39 01 00 00 00 00 02 6f 0f
|
||||
39 01 00 00 00 00 02 fc 00
|
||||
39 01 00 00 00 00 05 2a 00 00 05 9f
|
||||
39 01 00 00 00 00 05 2b 00 00 0c 7f
|
||||
39 01 00 00 00 00 02 90 03
|
||||
39 01 00 00 00 00 13 91 ab 2a 00 28 f1
|
||||
9a 02 68 03 92 00 0e 03 14 02 56 10
|
||||
ec
|
||||
39 01 00 00 00 00 02 6f 23
|
||||
39 01 00 00 00 00 15 fb 00 01 04 56 77
|
||||
77 77 99 9b f0 00 02 78 9a bb bc dd
|
||||
ee ff 00
|
||||
39 01 00 00 00 00 02 f3 dc
|
||||
39 01 00 00 00 00 02 26 00
|
||||
39 01 00 00 00 00 02 35 00
|
||||
39 01 00 00 00 00 02 53 20
|
||||
39 01 00 00 00 00 07 51 07 ff 07 ff 0f
|
||||
ff
|
||||
39 01 00 00 00 00 02 5A 01
|
||||
39 01 00 00 00 00 02 5f 00
|
||||
39 01 00 00 00 00 02 9c 01
|
||||
05 01 00 00 00 00 01 2c
|
||||
39 01 00 00 00 00 02 2f 00
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 01
|
||||
39 01 00 00 00 00 05 b2 55 01 ff 03
|
||||
05 01 00 00 78 00 01 11
|
||||
05 01 00 00 14 00 01 29
|
||||
];
|
||||
|
||||
qcom,mdss-dsi-off-command = [
|
||||
05 01 00 00 14 00 02 28 00
|
||||
05 01 00 00 78 00 02 10 00];
|
||||
qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-off-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-h-sync-pulse = <0>;
|
||||
qcom,compression-mode = "dsc";
|
||||
qcom,mdss-dsc-slice-height = <40>;
|
||||
qcom,mdss-dsc-slice-width = <720>;
|
||||
qcom,mdss-dsc-slice-per-pkt = <1>;
|
||||
qcom,mdss-dsc-bit-per-component = <10>;
|
||||
qcom,mdss-dsc-bit-per-pixel = <10>;
|
||||
qcom,mdss-dsc-block-prediction-enable;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
@@ -1,3 +1,8 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&mdss_mdp {
|
||||
dsi_nt37801_amoled_cmd_cphy: qcom,mdss_dsi_nt37801_wqhd_plus_cmd_cphy {
|
||||
qcom,mdss-dsi-panel-name =
|
||||
@@ -53,6 +58,17 @@
|
||||
qcom,mdss-dsi-v-bottom-border = <0>;
|
||||
qcom,mdss-dsi-panel-jitter = <0x4 0x1>;
|
||||
|
||||
qcom,mdss-dsi-timing-switch-command = [
|
||||
39 01 00 00 00 00 02 2f 00
|
||||
39 01 00 00 00 00 02 26 00
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 06 c0 54 c0 00 21 43
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 02
|
||||
39 01 00 00 00 00 02 cc 30
|
||||
39 01 00 00 00 00 02 ce 01
|
||||
39 01 00 00 20 00 02 cc 00
|
||||
];
|
||||
|
||||
qcom,mdss-dsi-on-command = [
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 01
|
||||
39 01 00 00 00 00 02 6F 01
|
||||
@@ -110,6 +126,208 @@
|
||||
qcom,mdss-dsc-bit-per-pixel = <8>;
|
||||
qcom,mdss-dsc-block-prediction-enable;
|
||||
};
|
||||
|
||||
timing@1 {
|
||||
cell-index = <1>;
|
||||
qcom,mdss-dsi-panel-framerate = <90>;
|
||||
qcom,mdss-dsi-panel-width = <1440>;
|
||||
qcom,mdss-dsi-panel-height = <3200>;
|
||||
qcom,mdss-dsi-h-front-porch = <22>;
|
||||
qcom,mdss-dsi-h-back-porch = <20>;
|
||||
qcom,mdss-dsi-h-pulse-width = <20>;
|
||||
qcom,mdss-dsi-h-sync-skew = <0>;
|
||||
qcom,mdss-dsi-v-back-porch = <18>;
|
||||
qcom,mdss-dsi-v-front-porch = <20>;
|
||||
qcom,mdss-dsi-v-pulse-width = <2>;
|
||||
qcom,mdss-dsi-h-left-border = <0>;
|
||||
qcom,mdss-dsi-h-right-border = <0>;
|
||||
qcom,mdss-dsi-v-top-border = <0>;
|
||||
qcom,mdss-dsi-v-bottom-border = <0>;
|
||||
qcom,mdss-dsi-panel-jitter = <0x4 0x1>;
|
||||
|
||||
qcom,mdss-dsi-timing-switch-command = [
|
||||
39 01 00 00 00 00 02 2f 01
|
||||
39 01 00 00 00 00 02 26 01
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 06 c0 54 c0 00 24 45
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 02
|
||||
39 01 00 00 00 00 02 cc 30
|
||||
39 01 00 00 00 00 02 ce 01
|
||||
39 01 00 00 20 00 02 cc 00
|
||||
];
|
||||
|
||||
qcom,mdss-dsi-on-command = [
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 01
|
||||
39 01 00 00 00 00 02 6F 01
|
||||
39 01 00 00 00 00 04 C5 0B 0B 0B
|
||||
39 01 00 00 00 00 05 FF AA 55 A5 80
|
||||
39 01 00 00 00 00 02 6F 02
|
||||
39 01 00 00 00 00 02 F5 10
|
||||
39 01 00 00 00 00 02 6F 1B
|
||||
39 01 00 00 00 00 02 F4 55
|
||||
39 01 00 00 00 00 02 6F 18
|
||||
39 01 00 00 00 00 02 F8 19
|
||||
39 01 00 00 00 00 02 6F 0F
|
||||
39 01 00 00 00 00 02 FC 00
|
||||
39 01 00 00 00 00 05 2A 00 00 05 9F
|
||||
39 01 00 00 00 00 05 2B 00 00 0C 7F
|
||||
39 01 00 00 00 00 03 90 03 03
|
||||
39 01 00 00 00 00 13 91 89 28 00 28 D2
|
||||
00 02 86 04 3A 00 0A 02 AB 01 E9 10
|
||||
F0
|
||||
39 01 00 00 00 00 02 6F 06
|
||||
39 01 00 00 00 00 02 F3 DC
|
||||
39 01 00 00 00 00 02 26 00
|
||||
39 01 00 00 00 00 02 35 00
|
||||
39 01 00 00 00 00 05 3B 00 18 00 10
|
||||
39 01 00 00 00 00 02 53 20
|
||||
39 01 00 00 00 00 07 51 07 FF 07 FF 0F
|
||||
FF
|
||||
39 01 00 00 00 00 02 5A 01
|
||||
39 01 00 00 00 00 02 5F 00
|
||||
39 01 00 00 00 00 02 9C 01
|
||||
05 01 00 00 00 00 01 2C
|
||||
39 01 00 00 00 00 02 2F 00
|
||||
39 01 00 00 00 00 02 2f 01
|
||||
39 01 00 00 00 00 02 26 01
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 06 c0 54 c0 00 24 45
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 02
|
||||
39 01 00 00 00 00 02 cc 30
|
||||
39 01 00 00 00 00 02 ce 01
|
||||
39 01 00 00 20 00 02 cc 00
|
||||
39 01 00 00 00 00 05 FF AA 55 A5 82
|
||||
39 01 00 00 00 00 02 6F 08
|
||||
39 01 00 00 00 00 03 F3 CC 0C
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 01
|
||||
39 01 00 00 00 00 05 B2 55 01 FF 03
|
||||
05 01 00 00 78 00 01 11
|
||||
05 01 00 00 14 00 01 29
|
||||
];
|
||||
|
||||
qcom,mdss-dsi-off-command = [
|
||||
05 01 00 00 14 00 02 28 00
|
||||
05 01 00 00 78 00 02 10 00];
|
||||
qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
|
||||
qcom,mdss-dsi-timing-switch-command-state =
|
||||
"dsi_lp_mode";
|
||||
qcom,mdss-dsi-h-sync-pulse = <0>;
|
||||
qcom,compression-mode = "dsc";
|
||||
qcom,mdss-dsc-slice-height = <40>;
|
||||
qcom,mdss-dsc-slice-width = <720>;
|
||||
qcom,mdss-dsc-slice-per-pkt = <1>;
|
||||
qcom,mdss-dsc-bit-per-component = <8>;
|
||||
qcom,mdss-dsc-bit-per-pixel = <8>;
|
||||
qcom,mdss-dsc-block-prediction-enable;
|
||||
};
|
||||
|
||||
timing@2 {
|
||||
cell-index = <2>;
|
||||
qcom,mdss-dsi-panel-framerate = <60>;
|
||||
qcom,mdss-dsi-panel-width = <1440>;
|
||||
qcom,mdss-dsi-panel-height = <3200>;
|
||||
qcom,mdss-dsi-h-front-porch = <22>;
|
||||
qcom,mdss-dsi-h-back-porch = <20>;
|
||||
qcom,mdss-dsi-h-pulse-width = <20>;
|
||||
qcom,mdss-dsi-h-sync-skew = <0>;
|
||||
qcom,mdss-dsi-v-back-porch = <18>;
|
||||
qcom,mdss-dsi-v-front-porch = <20>;
|
||||
qcom,mdss-dsi-v-pulse-width = <2>;
|
||||
qcom,mdss-dsi-h-left-border = <0>;
|
||||
qcom,mdss-dsi-h-right-border = <0>;
|
||||
qcom,mdss-dsi-v-top-border = <0>;
|
||||
qcom,mdss-dsi-v-bottom-border = <0>;
|
||||
qcom,mdss-dsi-panel-jitter = <0x4 0x1>;
|
||||
qcom,mdss-dsi-panel-clockrate = <808730000>;
|
||||
|
||||
qcom,mdss-dsi-timing-switch-command = [
|
||||
39 01 00 00 00 00 02 2f 00
|
||||
39 01 00 00 00 00 02 26 01
|
||||
39 01 00 00 00 00 02 5a 01
|
||||
39 01 00 00 00 00 02 2f 30
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 02 6f 1c
|
||||
39 01 00 00 00 00 09 ba 91 01 01 00 01
|
||||
01 01 00
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 06 c0 54 c0 00 21 43
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 02
|
||||
39 01 00 00 00 00 02 cc 30
|
||||
39 01 00 00 00 00 02 ce 01
|
||||
39 01 00 00 20 00 02 cc 00
|
||||
];
|
||||
|
||||
qcom,mdss-dsi-on-command = [
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 01
|
||||
39 01 00 00 00 00 02 6F 01
|
||||
39 01 00 00 00 00 04 C5 0B 0B 0B
|
||||
39 01 00 00 00 00 05 FF AA 55 A5 80
|
||||
39 01 00 00 00 00 02 6F 02
|
||||
39 01 00 00 00 00 02 F5 10
|
||||
39 01 00 00 00 00 02 6F 1B
|
||||
39 01 00 00 00 00 02 F4 55
|
||||
39 01 00 00 00 00 02 6F 18
|
||||
39 01 00 00 00 00 02 F8 19
|
||||
39 01 00 00 00 00 02 6F 0F
|
||||
39 01 00 00 00 00 02 FC 00
|
||||
39 01 00 00 00 00 05 2A 00 00 05 9F
|
||||
39 01 00 00 00 00 05 2B 00 00 0C 7F
|
||||
39 01 00 00 00 00 03 90 03 03
|
||||
39 01 00 00 00 00 13 91 89 28 00 28 D2
|
||||
00 02 86 04 3A 00 0A 02 AB 01 E9 10
|
||||
F0
|
||||
39 01 00 00 00 00 02 6F 06
|
||||
39 01 00 00 00 00 02 F3 DC
|
||||
39 01 00 00 00 00 02 26 00
|
||||
39 01 00 00 00 00 02 35 00
|
||||
39 01 00 00 00 00 05 3B 00 18 00 10
|
||||
39 01 00 00 00 00 02 53 20
|
||||
39 01 00 00 00 00 07 51 07 FF 07 FF 0F
|
||||
FF
|
||||
39 01 00 00 00 00 02 5A 01
|
||||
39 01 00 00 00 00 02 5F 00
|
||||
39 01 00 00 00 00 02 9C 01
|
||||
05 01 00 00 00 00 01 2C
|
||||
39 01 00 00 00 00 02 2f 00
|
||||
39 01 00 00 00 00 02 26 01
|
||||
39 01 00 00 00 00 02 5a 01
|
||||
39 01 00 00 00 00 02 2f 30
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 02 6f 1c
|
||||
39 01 00 00 00 00 09 ba 91 01 01 00 01
|
||||
01 01 00
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 06 c0 54 c0 00 21 43
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 02
|
||||
39 01 00 00 00 00 02 cc 30
|
||||
39 01 00 00 00 00 02 ce 01
|
||||
39 01 00 00 20 00 02 cc 00
|
||||
39 01 00 00 00 00 05 FF AA 55 A5 82
|
||||
39 01 00 00 00 00 02 6F 08
|
||||
39 01 00 00 00 00 03 F3 CC 0C
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 01
|
||||
39 01 00 00 00 00 05 B2 55 01 FF 03
|
||||
05 01 00 00 78 00 01 11
|
||||
05 01 00 00 14 00 01 29
|
||||
];
|
||||
|
||||
qcom,mdss-dsi-off-command = [
|
||||
05 01 00 00 14 00 02 28 00
|
||||
05 01 00 00 78 00 02 10 00];
|
||||
qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
|
||||
qcom,mdss-dsi-timing-switch-command-state =
|
||||
"dsi_lp_mode";
|
||||
qcom,mdss-dsi-h-sync-pulse = <0>;
|
||||
qcom,compression-mode = "dsc";
|
||||
qcom,mdss-dsc-slice-height = <40>;
|
||||
qcom,mdss-dsc-slice-width = <720>;
|
||||
qcom,mdss-dsc-slice-per-pkt = <1>;
|
||||
qcom,mdss-dsc-bit-per-component = <8>;
|
||||
qcom,mdss-dsc-bit-per-pixel = <8>;
|
||||
qcom,mdss-dsc-block-prediction-enable;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
132
display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-spr.dtsi
Normal file
132
display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-spr.dtsi
Normal file
@@ -0,0 +1,132 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&mdss_mdp {
|
||||
dsi_nt37801_amoled_cmd_spr: qcom,mdss_dsi_nt37801_wqhd_plus_cmd_spr {
|
||||
qcom,mdss-dsi-panel-name =
|
||||
"nt37801 amoled cmd mode dsi csot panel with DSC and AP SPR";
|
||||
qcom,mdss-dsi-panel-type = "dsi_cmd_mode";
|
||||
qcom,mdss-dsi-panel-physical-type = "oled";
|
||||
qcom,mdss-dsi-virtual-channel-id = <0>;
|
||||
qcom,mdss-dsi-stream = <0>;
|
||||
qcom,mdss-dsi-bpp = <24>;
|
||||
qcom,mdss-dsi-color-order = "rgb_swap_rgb";
|
||||
qcom,mdss-dsi-underflow-color = <0xff>;
|
||||
qcom,mdss-dsi-border-color = <0>;
|
||||
|
||||
qcom,dsi-ctrl-num = <0>;
|
||||
qcom,dsi-phy-num = <0>;
|
||||
qcom,dsi-sec-ctrl-num = <1>;
|
||||
qcom,dsi-sec-phy-num = <1>;
|
||||
|
||||
qcom,mdss-dsi-traffic-mode = "non_burst_sync_event";
|
||||
qcom,mdss-dsi-lane-map = "lane_map_0123";
|
||||
qcom,mdss-dsi-bllp-eof-power-mode;
|
||||
qcom,mdss-dsi-bllp-power-mode;
|
||||
qcom,mdss-dsi-lane-0-state;
|
||||
qcom,mdss-dsi-lane-1-state;
|
||||
qcom,mdss-dsi-lane-2-state;
|
||||
qcom,mdss-dsi-lane-3-state;
|
||||
qcom,mdss-dsi-dma-trigger = "trigger_sw";
|
||||
qcom,mdss-dsi-mdp-trigger = "none";
|
||||
qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>;
|
||||
|
||||
qcom,mdss-dsi-te-pin-select = <1>;
|
||||
qcom,mdss-dsi-wr-mem-start = <0x2c>;
|
||||
qcom,mdss-dsi-wr-mem-continue = <0x3c>;
|
||||
qcom,mdss-dsi-te-dcs-command = <1>;
|
||||
qcom,mdss-dsi-te-check-enable;
|
||||
qcom,mdss-dsi-te-using-te-pin;
|
||||
qcom,spr-pack-type = "pentile";
|
||||
qcom,mdss-dsi-display-timings {
|
||||
timing@0 {
|
||||
cell-index = <0>;
|
||||
qcom,mdss-dsi-panel-framerate = <120>;
|
||||
qcom,mdss-dsi-panel-width = <1440>;
|
||||
qcom,mdss-dsi-panel-height = <3200>;
|
||||
qcom,mdss-dsi-h-front-porch = <20>;
|
||||
qcom,mdss-dsi-h-back-porch = <20>;
|
||||
qcom,mdss-dsi-h-pulse-width = <4>;
|
||||
qcom,mdss-dsi-h-sync-skew = <0>;
|
||||
qcom,mdss-dsi-v-back-porch = <18>;
|
||||
qcom,mdss-dsi-v-front-porch = <20>;
|
||||
qcom,mdss-dsi-v-pulse-width = <2>;
|
||||
qcom,mdss-dsi-h-left-border = <0>;
|
||||
qcom,mdss-dsi-h-right-border = <0>;
|
||||
qcom,mdss-dsi-v-top-border = <0>;
|
||||
qcom,mdss-dsi-v-bottom-border = <0>;
|
||||
qcom,mdss-dsi-panel-jitter = <0x4 0x1>;
|
||||
|
||||
qcom,mdss-dsc-version = <0x12>;
|
||||
qcom,src-chroma-format = <1>;
|
||||
|
||||
qcom,mdss-dsi-on-command = [
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 01
|
||||
39 01 00 00 00 00 02 6F 01
|
||||
39 01 00 00 00 00 04 C5 0B 0B 0B
|
||||
39 01 00 00 00 00 05 FF AA 55 A5 80
|
||||
39 01 00 00 00 00 02 6F 02
|
||||
39 01 00 00 00 00 02 F5 10
|
||||
39 01 00 00 00 00 02 6F 1B
|
||||
39 01 00 00 00 00 02 F4 55
|
||||
39 01 00 00 00 00 02 6F 18
|
||||
39 01 00 00 00 00 02 F8 19
|
||||
39 01 00 00 00 00 02 6F 0F
|
||||
39 01 00 00 00 00 02 FC 00
|
||||
39 01 00 00 00 00 05 2A 00 00 05 9F
|
||||
39 01 00 00 00 00 05 2B 00 00 0C 7F
|
||||
39 01 00 00 00 00 03 90 03 03
|
||||
39 01 00 00 00 00 13 91 A0 F0 00 32 D1
|
||||
00 01 E2 01 9B 00 3C 02 20 08 A4 11
|
||||
50
|
||||
39 01 00 00 00 00 02 6F 06
|
||||
39 01 00 00 00 00 02 F3 DC
|
||||
39 01 00 00 00 00 02 26 00
|
||||
39 01 00 00 00 00 02 35 00
|
||||
39 01 00 00 00 00 05 3B 00 18 00 10
|
||||
39 01 00 00 00 00 02 53 20
|
||||
39 01 00 00 00 00 07 51 07 FF 07 FF 0F FF
|
||||
39 01 00 00 00 00 02 5A 01
|
||||
39 01 00 00 00 00 02 5F 00
|
||||
39 01 00 00 00 00 02 9C 01
|
||||
05 01 00 00 00 00 01 2C
|
||||
39 01 00 00 00 00 02 2F 00
|
||||
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 03
|
||||
39 01 00 00 00 00 02 6F 08
|
||||
39 01 00 00 00 00 02 DE 00
|
||||
39 01 00 00 00 00 02 6F 09
|
||||
39 01 00 00 00 00 07 DE 10 34 25 30 14 25
|
||||
39 01 00 00 00 00 05 FF AA 55 A5 81
|
||||
39 01 00 00 00 00 02 6F 1D
|
||||
39 01 00 00 00 00 02 FB 6F
|
||||
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 07
|
||||
39 01 00 00 00 00 02 B0 24
|
||||
39 01 00 00 00 00 02 03 10
|
||||
|
||||
05 01 00 00 78 00 01 11
|
||||
05 01 00 00 14 00 01 29
|
||||
];
|
||||
|
||||
qcom,mdss-dsi-off-command = [
|
||||
05 01 00 00 14 00 02 28 00
|
||||
05 01 00 00 78 00 02 10 00];
|
||||
qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
|
||||
qcom,mdss-dsi-timing-switch-command-state =
|
||||
"dsi_lp_mode";
|
||||
qcom,mdss-dsi-h-sync-pulse = <0>;
|
||||
qcom,compression-mode = "dsc";
|
||||
qcom,mdss-dsc-slice-height = <40>;
|
||||
qcom,mdss-dsc-slice-width = <720>;
|
||||
qcom,mdss-dsc-slice-per-pkt = <1>;
|
||||
qcom,mdss-dsc-bit-per-component = <8>;
|
||||
qcom,mdss-dsc-bit-per-pixel = <8>;
|
||||
qcom,mdss-dsc-block-prediction-enable;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
@@ -1,3 +1,8 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&mdss_mdp {
|
||||
dsi_nt37801_amoled_cmd: qcom,mdss_dsi_nt37801_wqhd_plus_cmd {
|
||||
qcom,mdss-dsi-panel-name =
|
||||
@@ -58,6 +63,14 @@
|
||||
39 01 00 00 00 00 05 2A 00 00 05 9F
|
||||
39 01 00 00 00 00 05 2B 00 00 0C 7F
|
||||
39 01 00 00 00 00 02 8F 00
|
||||
39 01 00 00 00 00 02 2f 00
|
||||
39 01 00 00 00 00 02 26 00
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 06 c0 54 c0 00 21 43
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 02
|
||||
39 01 00 00 00 00 02 cc 30
|
||||
39 01 00 00 00 00 02 ce 01
|
||||
39 01 00 00 20 00 02 cc 00
|
||||
];
|
||||
|
||||
qcom,mdss-dsi-on-command = [
|
||||
@@ -137,6 +150,14 @@
|
||||
39 01 00 00 00 00 05 2A 00 00 04 37
|
||||
39 01 00 00 00 00 05 2B 00 00 09 5F
|
||||
39 01 00 00 00 00 02 8F 01
|
||||
39 01 00 00 00 00 02 2f 00
|
||||
39 01 00 00 00 00 02 26 00
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 06 c0 54 c0 00 21 43
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 02
|
||||
39 01 00 00 00 00 02 cc 30
|
||||
39 01 00 00 00 00 02 ce 01
|
||||
39 01 00 00 20 00 02 cc 00
|
||||
];
|
||||
|
||||
qcom,mdss-dsi-on-command = [
|
||||
@@ -193,6 +214,636 @@
|
||||
qcom,mdss-dsc-bit-per-pixel = <8>;
|
||||
qcom,mdss-dsc-block-prediction-enable;
|
||||
};
|
||||
|
||||
timing@2 {
|
||||
cell-index = <2>;
|
||||
qcom,mdss-dsi-panel-framerate = <90>;
|
||||
qcom,mdss-dsi-panel-width = <1440>;
|
||||
qcom,mdss-dsi-panel-height = <3200>;
|
||||
qcom,mdss-dsi-h-front-porch = <20>;
|
||||
qcom,mdss-dsi-h-back-porch = <20>;
|
||||
qcom,mdss-dsi-h-pulse-width = <4>;
|
||||
qcom,mdss-dsi-h-sync-skew = <0>;
|
||||
qcom,mdss-dsi-v-back-porch = <18>;
|
||||
qcom,mdss-dsi-v-front-porch = <20>;
|
||||
qcom,mdss-dsi-v-pulse-width = <2>;
|
||||
qcom,mdss-dsi-h-left-border = <0>;
|
||||
qcom,mdss-dsi-h-right-border = <0>;
|
||||
qcom,mdss-dsi-v-top-border = <0>;
|
||||
qcom,mdss-dsi-v-bottom-border = <0>;
|
||||
qcom,mdss-dsi-panel-jitter = <0x4 0x1>;
|
||||
|
||||
qcom,mdss-dsi-timing-switch-command = [
|
||||
39 01 00 00 00 00 05 2a 00 00 05 9f
|
||||
39 01 00 00 00 00 05 2b 00 00 0c 7f
|
||||
39 01 00 00 00 00 02 8f 00
|
||||
39 01 00 00 00 00 02 2f 01
|
||||
39 01 00 00 00 00 02 26 01
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 06 c0 54 c0 00 24 45
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 02
|
||||
39 01 00 00 00 00 02 cc 30
|
||||
39 01 00 00 00 00 02 ce 01
|
||||
39 01 00 00 20 00 02 cc 00
|
||||
];
|
||||
|
||||
qcom,mdss-dsi-on-command = [
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 01
|
||||
39 01 00 00 00 00 02 6F 01
|
||||
39 01 00 00 00 00 04 C5 0B 0B 0B
|
||||
39 01 00 00 00 00 05 FF AA 55 A5 80
|
||||
39 01 00 00 00 00 02 6F 02
|
||||
39 01 00 00 00 00 02 F5 10
|
||||
39 01 00 00 00 00 02 6F 1B
|
||||
39 01 00 00 00 00 02 F4 55
|
||||
39 01 00 00 00 00 02 6F 18
|
||||
39 01 00 00 00 00 02 F8 19
|
||||
39 01 00 00 00 00 02 6F 0F
|
||||
39 01 00 00 00 00 02 FC 00
|
||||
39 01 00 00 00 00 05 2A 00 00 05 9F
|
||||
39 01 00 00 00 00 05 2B 00 00 0C 7F
|
||||
39 01 00 00 00 00 03 90 03 03
|
||||
39 01 00 00 00 00 13 91 89 28 00 28 D2
|
||||
00 02 86 04 3A 00 0A 02 AB 01 E9 10
|
||||
F0
|
||||
39 01 00 00 00 00 02 6F 06
|
||||
39 01 00 00 00 00 02 F3 DC
|
||||
39 01 00 00 00 00 02 26 00
|
||||
39 01 00 00 00 00 02 35 00
|
||||
39 01 00 00 00 00 05 3B 00 18 00 10
|
||||
39 01 00 00 00 00 02 53 20
|
||||
39 01 00 00 00 00 07 51 07 FF 07 FF 0F
|
||||
FF
|
||||
39 01 00 00 00 00 02 5A 01
|
||||
39 01 00 00 00 00 02 5F 00
|
||||
39 01 00 00 00 00 02 9C 01
|
||||
05 01 00 00 00 00 01 2C
|
||||
39 01 00 00 00 00 02 2F 00
|
||||
39 01 00 00 00 00 02 2f 01
|
||||
39 01 00 00 00 00 02 26 01
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 06 c0 54 c0 00 24 45
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 02
|
||||
39 01 00 00 00 00 02 cc 30
|
||||
39 01 00 00 00 00 02 ce 01
|
||||
39 01 00 00 20 00 02 cc 00
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 01
|
||||
39 01 00 00 00 00 05 B2 55 01 FF 03
|
||||
05 01 00 00 78 00 01 11
|
||||
05 01 00 00 14 00 01 29
|
||||
];
|
||||
|
||||
qcom,mdss-dsi-off-command = [
|
||||
05 01 00 00 14 00 02 28 00
|
||||
05 01 00 00 78 00 02 10 00];
|
||||
qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
|
||||
qcom,mdss-dsi-timing-switch-command-state =
|
||||
"dsi_lp_mode";
|
||||
qcom,mdss-dsi-h-sync-pulse = <0>;
|
||||
qcom,compression-mode = "dsc";
|
||||
qcom,mdss-dsc-slice-height = <40>;
|
||||
qcom,mdss-dsc-slice-width = <720>;
|
||||
qcom,mdss-dsc-slice-per-pkt = <1>;
|
||||
qcom,mdss-dsc-bit-per-component = <8>;
|
||||
qcom,mdss-dsc-bit-per-pixel = <8>;
|
||||
qcom,mdss-dsc-block-prediction-enable;
|
||||
};
|
||||
|
||||
timing@3 {
|
||||
cell-index = <3>;
|
||||
qcom,mdss-dsi-panel-framerate = <60>;
|
||||
qcom,mdss-dsi-panel-width = <1440>;
|
||||
qcom,mdss-dsi-panel-height = <3200>;
|
||||
qcom,mdss-dsi-h-front-porch = <20>;
|
||||
qcom,mdss-dsi-h-back-porch = <20>;
|
||||
qcom,mdss-dsi-h-pulse-width = <4>;
|
||||
qcom,mdss-dsi-h-sync-skew = <0>;
|
||||
qcom,mdss-dsi-v-back-porch = <18>;
|
||||
qcom,mdss-dsi-v-front-porch = <20>;
|
||||
qcom,mdss-dsi-v-pulse-width = <2>;
|
||||
qcom,mdss-dsi-h-left-border = <0>;
|
||||
qcom,mdss-dsi-h-right-border = <0>;
|
||||
qcom,mdss-dsi-v-top-border = <0>;
|
||||
qcom,mdss-dsi-v-bottom-border = <0>;
|
||||
qcom,mdss-dsi-panel-jitter = <0x4 0x1>;
|
||||
qcom,mdss-dsi-panel-clockrate = <1199900000>;
|
||||
|
||||
qcom,mdss-dsi-timing-switch-command = [
|
||||
39 01 00 00 00 00 05 2a 00 00 05 9f
|
||||
39 01 00 00 00 00 05 2b 00 00 0c 7f
|
||||
39 01 00 00 00 00 02 8f 00
|
||||
39 01 00 00 00 00 02 2f 00
|
||||
39 01 00 00 00 00 02 26 01
|
||||
39 01 00 00 00 00 02 5a 01
|
||||
39 01 00 00 00 00 02 2f 30
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 02 6f 1c
|
||||
39 01 00 00 00 00 09 ba 91 01 01 00 01
|
||||
01 01 00
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 06 c0 54 c0 00 21 43
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 02
|
||||
39 01 00 00 00 00 02 cc 30
|
||||
39 01 00 00 00 00 02 ce 01
|
||||
39 01 00 00 20 00 02 cc 00
|
||||
];
|
||||
|
||||
qcom,mdss-dsi-on-command = [
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 01
|
||||
39 01 00 00 00 00 02 6F 01
|
||||
39 01 00 00 00 00 04 C5 0B 0B 0B
|
||||
39 01 00 00 00 00 05 FF AA 55 A5 80
|
||||
39 01 00 00 00 00 02 6F 02
|
||||
39 01 00 00 00 00 02 F5 10
|
||||
39 01 00 00 00 00 02 6F 1B
|
||||
39 01 00 00 00 00 02 F4 55
|
||||
39 01 00 00 00 00 02 6F 18
|
||||
39 01 00 00 00 00 02 F8 19
|
||||
39 01 00 00 00 00 02 6F 0F
|
||||
39 01 00 00 00 00 02 FC 00
|
||||
39 01 00 00 00 00 05 2A 00 00 05 9F
|
||||
39 01 00 00 00 00 05 2B 00 00 0C 7F
|
||||
39 01 00 00 00 00 03 90 03 03
|
||||
39 01 00 00 00 00 13 91 89 28 00 28 D2
|
||||
00 02 86 04 3A 00 0A 02 AB 01 E9 10
|
||||
F0
|
||||
39 01 00 00 00 00 02 6F 06
|
||||
39 01 00 00 00 00 02 F3 DC
|
||||
39 01 00 00 00 00 02 26 00
|
||||
39 01 00 00 00 00 02 35 00
|
||||
39 01 00 00 00 00 05 3B 00 18 00 10
|
||||
39 01 00 00 00 00 02 53 20
|
||||
39 01 00 00 00 00 07 51 07 FF 07 FF 0F
|
||||
FF
|
||||
39 01 00 00 00 00 02 5A 01
|
||||
39 01 00 00 00 00 02 5F 00
|
||||
39 01 00 00 00 00 02 9C 01
|
||||
05 01 00 00 00 00 01 2C
|
||||
39 01 00 00 00 00 02 2f 00
|
||||
39 01 00 00 00 00 02 26 01
|
||||
39 01 00 00 00 00 02 5a 01
|
||||
39 01 00 00 00 00 02 2f 30
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 02 6f 1c
|
||||
39 01 00 00 00 00 09 ba 91 01 01 00 01
|
||||
01 01 00
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 06 c0 54 c0 00 21 43
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 02
|
||||
39 01 00 00 00 00 02 cc 30
|
||||
39 01 00 00 00 00 02 ce 01
|
||||
39 01 00 00 20 00 02 cc 00
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 01
|
||||
39 01 00 00 00 00 05 B2 55 01 FF 03
|
||||
05 01 00 00 78 00 01 11
|
||||
05 01 00 00 14 00 01 29
|
||||
];
|
||||
|
||||
qcom,mdss-dsi-off-command = [
|
||||
05 01 00 00 14 00 02 28 00
|
||||
05 01 00 00 78 00 02 10 00];
|
||||
qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
|
||||
qcom,mdss-dsi-timing-switch-command-state =
|
||||
"dsi_lp_mode";
|
||||
qcom,mdss-dsi-h-sync-pulse = <0>;
|
||||
qcom,compression-mode = "dsc";
|
||||
qcom,mdss-dsc-slice-height = <40>;
|
||||
qcom,mdss-dsc-slice-width = <720>;
|
||||
qcom,mdss-dsc-slice-per-pkt = <1>;
|
||||
qcom,mdss-dsc-bit-per-component = <8>;
|
||||
qcom,mdss-dsc-bit-per-pixel = <8>;
|
||||
qcom,mdss-dsc-block-prediction-enable;
|
||||
};
|
||||
|
||||
timing@4 {
|
||||
cell-index = <4>;
|
||||
qcom,mdss-dsi-panel-framerate = <40>;
|
||||
qcom,mdss-dsi-panel-width = <1440>;
|
||||
qcom,mdss-dsi-panel-height = <3200>;
|
||||
qcom,mdss-dsi-h-front-porch = <20>;
|
||||
qcom,mdss-dsi-h-back-porch = <20>;
|
||||
qcom,mdss-dsi-h-pulse-width = <4>;
|
||||
qcom,mdss-dsi-h-sync-skew = <0>;
|
||||
qcom,mdss-dsi-v-back-porch = <18>;
|
||||
qcom,mdss-dsi-v-front-porch = <20>;
|
||||
qcom,mdss-dsi-v-pulse-width = <2>;
|
||||
qcom,mdss-dsi-h-left-border = <0>;
|
||||
qcom,mdss-dsi-h-right-border = <0>;
|
||||
qcom,mdss-dsi-v-top-border = <0>;
|
||||
qcom,mdss-dsi-v-bottom-border = <0>;
|
||||
qcom,mdss-dsi-panel-jitter = <0x4 0x1>;
|
||||
qcom,mdss-dsi-panel-clockrate = <1199900000>;
|
||||
|
||||
qcom,mdss-dsi-timing-switch-command = [
|
||||
39 01 00 00 00 00 05 2a 00 00 05 9f
|
||||
39 01 00 00 00 00 05 2b 00 00 0c 7f
|
||||
39 01 00 00 00 00 02 8f 00
|
||||
39 01 00 00 00 00 02 2f 00
|
||||
39 01 00 00 00 00 02 26 01
|
||||
39 01 00 00 00 00 02 5a 01
|
||||
39 01 00 00 00 00 02 2f 30
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 02 6f 1c
|
||||
39 01 00 00 00 00 09 ba 91 02 02 00 01
|
||||
02 02 00
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 06 c0 54 c0 00 21 43
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 02
|
||||
39 01 00 00 00 00 02 cc 30
|
||||
39 01 00 00 00 00 02 ce 01
|
||||
39 01 00 00 20 00 02 cc 00
|
||||
];
|
||||
|
||||
qcom,mdss-dsi-on-command = [
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 01
|
||||
39 01 00 00 00 00 02 6F 01
|
||||
39 01 00 00 00 00 04 C5 0B 0B 0B
|
||||
39 01 00 00 00 00 05 FF AA 55 A5 80
|
||||
39 01 00 00 00 00 02 6F 02
|
||||
39 01 00 00 00 00 02 F5 10
|
||||
39 01 00 00 00 00 02 6F 1B
|
||||
39 01 00 00 00 00 02 F4 55
|
||||
39 01 00 00 00 00 02 6F 18
|
||||
39 01 00 00 00 00 02 F8 19
|
||||
39 01 00 00 00 00 02 6F 0F
|
||||
39 01 00 00 00 00 02 FC 00
|
||||
39 01 00 00 00 00 05 2A 00 00 05 9F
|
||||
39 01 00 00 00 00 05 2B 00 00 0C 7F
|
||||
39 01 00 00 00 00 03 90 03 03
|
||||
39 01 00 00 00 00 13 91 89 28 00 28 D2
|
||||
00 02 86 04 3A 00 0A 02 AB 01 E9 10
|
||||
F0
|
||||
39 01 00 00 00 00 02 6F 06
|
||||
39 01 00 00 00 00 02 F3 DC
|
||||
39 01 00 00 00 00 02 26 00
|
||||
39 01 00 00 00 00 02 35 00
|
||||
39 01 00 00 00 00 05 3B 00 18 00 10
|
||||
39 01 00 00 00 00 02 53 20
|
||||
39 01 00 00 00 00 07 51 07 FF 07 FF 0F
|
||||
FF
|
||||
39 01 00 00 00 00 02 5A 01
|
||||
39 01 00 00 00 00 02 5F 00
|
||||
39 01 00 00 00 00 02 9C 01
|
||||
05 01 00 00 00 00 01 2C
|
||||
39 01 00 00 00 00 02 2f 00
|
||||
39 01 00 00 00 00 02 26 01
|
||||
39 01 00 00 00 00 02 5a 01
|
||||
39 01 00 00 00 00 02 2f 30
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 02 6f 1c
|
||||
39 01 00 00 00 00 09 ba 91 02 02 00 01
|
||||
02 02 00
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 06 c0 54 c0 00 21 43
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 02
|
||||
39 01 00 00 00 00 02 cc 30
|
||||
39 01 00 00 00 00 02 ce 01
|
||||
39 01 00 00 20 00 02 cc 00
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 01
|
||||
39 01 00 00 00 00 05 B2 55 01 FF 03
|
||||
05 01 00 00 78 00 01 11
|
||||
05 01 00 00 14 00 01 29
|
||||
];
|
||||
|
||||
qcom,mdss-dsi-off-command = [
|
||||
05 01 00 00 14 00 02 28 00
|
||||
05 01 00 00 78 00 02 10 00];
|
||||
qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
|
||||
qcom,mdss-dsi-timing-switch-command-state =
|
||||
"dsi_lp_mode";
|
||||
qcom,mdss-dsi-h-sync-pulse = <0>;
|
||||
qcom,compression-mode = "dsc";
|
||||
qcom,mdss-dsc-slice-height = <40>;
|
||||
qcom,mdss-dsc-slice-width = <720>;
|
||||
qcom,mdss-dsc-slice-per-pkt = <1>;
|
||||
qcom,mdss-dsc-bit-per-component = <8>;
|
||||
qcom,mdss-dsc-bit-per-pixel = <8>;
|
||||
qcom,mdss-dsc-block-prediction-enable;
|
||||
};
|
||||
|
||||
timing@5 {
|
||||
cell-index = <5>;
|
||||
qcom,mdss-dsi-panel-framerate = <30>;
|
||||
qcom,mdss-dsi-panel-width = <1440>;
|
||||
qcom,mdss-dsi-panel-height = <3200>;
|
||||
qcom,mdss-dsi-h-front-porch = <20>;
|
||||
qcom,mdss-dsi-h-back-porch = <20>;
|
||||
qcom,mdss-dsi-h-pulse-width = <4>;
|
||||
qcom,mdss-dsi-h-sync-skew = <0>;
|
||||
qcom,mdss-dsi-v-back-porch = <18>;
|
||||
qcom,mdss-dsi-v-front-porch = <20>;
|
||||
qcom,mdss-dsi-v-pulse-width = <2>;
|
||||
qcom,mdss-dsi-h-left-border = <0>;
|
||||
qcom,mdss-dsi-h-right-border = <0>;
|
||||
qcom,mdss-dsi-v-top-border = <0>;
|
||||
qcom,mdss-dsi-v-bottom-border = <0>;
|
||||
qcom,mdss-dsi-panel-jitter = <0x4 0x1>;
|
||||
qcom,mdss-dsi-panel-clockrate = <1199900000>;
|
||||
|
||||
qcom,mdss-dsi-timing-switch-command = [
|
||||
39 01 00 00 00 00 05 2a 00 00 05 9f
|
||||
39 01 00 00 00 00 05 2b 00 00 0c 7f
|
||||
39 01 00 00 00 00 02 8f 00
|
||||
39 01 00 00 00 00 02 2f 00
|
||||
39 01 00 00 00 00 02 26 01
|
||||
39 01 00 00 00 00 02 5a 01
|
||||
39 01 00 00 00 00 02 2f 30
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 02 6f 1c
|
||||
39 01 00 00 00 00 09 ba 91 03 03 00 01
|
||||
03 03 00
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 06 c0 54 c0 00 21 43
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 02
|
||||
39 01 00 00 00 00 02 cc 30
|
||||
39 01 00 00 00 00 02 ce 01
|
||||
39 01 00 00 20 00 02 cc 00
|
||||
];
|
||||
|
||||
qcom,mdss-dsi-on-command = [
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 01
|
||||
39 01 00 00 00 00 02 6F 01
|
||||
39 01 00 00 00 00 04 C5 0B 0B 0B
|
||||
39 01 00 00 00 00 05 FF AA 55 A5 80
|
||||
39 01 00 00 00 00 02 6F 02
|
||||
39 01 00 00 00 00 02 F5 10
|
||||
39 01 00 00 00 00 02 6F 1B
|
||||
39 01 00 00 00 00 02 F4 55
|
||||
39 01 00 00 00 00 02 6F 18
|
||||
39 01 00 00 00 00 02 F8 19
|
||||
39 01 00 00 00 00 02 6F 0F
|
||||
39 01 00 00 00 00 02 FC 00
|
||||
39 01 00 00 00 00 05 2A 00 00 05 9F
|
||||
39 01 00 00 00 00 05 2B 00 00 0C 7F
|
||||
39 01 00 00 00 00 03 90 03 03
|
||||
39 01 00 00 00 00 13 91 89 28 00 28 D2
|
||||
00 02 86 04 3A 00 0A 02 AB 01 E9 10
|
||||
F0
|
||||
39 01 00 00 00 00 02 6F 06
|
||||
39 01 00 00 00 00 02 F3 DC
|
||||
39 01 00 00 00 00 02 26 00
|
||||
39 01 00 00 00 00 02 35 00
|
||||
39 01 00 00 00 00 05 3B 00 18 00 10
|
||||
39 01 00 00 00 00 02 53 20
|
||||
39 01 00 00 00 00 07 51 07 FF 07 FF 0F
|
||||
FF
|
||||
39 01 00 00 00 00 02 5A 01
|
||||
39 01 00 00 00 00 02 5F 00
|
||||
39 01 00 00 00 00 02 9C 01
|
||||
05 01 00 00 00 00 01 2C
|
||||
39 01 00 00 00 00 02 2f 00
|
||||
39 01 00 00 00 00 02 26 01
|
||||
39 01 00 00 00 00 02 5a 01
|
||||
39 01 00 00 00 00 02 2f 30
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 02 6f 1c
|
||||
39 01 00 00 00 00 09 ba 91 03 03 00 01
|
||||
03 03 00
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 06 c0 54 c0 00 21 43
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 02
|
||||
39 01 00 00 00 00 02 cc 30
|
||||
39 01 00 00 00 00 02 ce 01
|
||||
39 01 00 00 20 00 02 cc 00
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 01
|
||||
39 01 00 00 00 00 05 B2 55 01 FF 03
|
||||
05 01 00 00 78 00 01 11
|
||||
05 01 00 00 14 00 01 29
|
||||
];
|
||||
|
||||
qcom,mdss-dsi-off-command = [
|
||||
05 01 00 00 14 00 02 28 00
|
||||
05 01 00 00 78 00 02 10 00];
|
||||
qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
|
||||
qcom,mdss-dsi-timing-switch-command-state =
|
||||
"dsi_lp_mode";
|
||||
qcom,mdss-dsi-h-sync-pulse = <0>;
|
||||
qcom,compression-mode = "dsc";
|
||||
qcom,mdss-dsc-slice-height = <40>;
|
||||
qcom,mdss-dsc-slice-width = <720>;
|
||||
qcom,mdss-dsc-slice-per-pkt = <1>;
|
||||
qcom,mdss-dsc-bit-per-component = <8>;
|
||||
qcom,mdss-dsc-bit-per-pixel = <8>;
|
||||
qcom,mdss-dsc-block-prediction-enable;
|
||||
};
|
||||
|
||||
timing@6 {
|
||||
cell-index = <6>;
|
||||
qcom,mdss-dsi-panel-framerate = <24>;
|
||||
qcom,mdss-dsi-panel-width = <1440>;
|
||||
qcom,mdss-dsi-panel-height = <3200>;
|
||||
qcom,mdss-dsi-h-front-porch = <20>;
|
||||
qcom,mdss-dsi-h-back-porch = <20>;
|
||||
qcom,mdss-dsi-h-pulse-width = <4>;
|
||||
qcom,mdss-dsi-h-sync-skew = <0>;
|
||||
qcom,mdss-dsi-v-back-porch = <18>;
|
||||
qcom,mdss-dsi-v-front-porch = <20>;
|
||||
qcom,mdss-dsi-v-pulse-width = <2>;
|
||||
qcom,mdss-dsi-h-left-border = <0>;
|
||||
qcom,mdss-dsi-h-right-border = <0>;
|
||||
qcom,mdss-dsi-v-top-border = <0>;
|
||||
qcom,mdss-dsi-v-bottom-border = <0>;
|
||||
qcom,mdss-dsi-panel-jitter = <0x4 0x1>;
|
||||
qcom,mdss-dsi-panel-clockrate = <1199900000>;
|
||||
|
||||
qcom,mdss-dsi-timing-switch-command = [
|
||||
39 01 00 00 00 00 05 2a 00 00 05 9f
|
||||
39 01 00 00 00 00 05 2b 00 00 0c 7f
|
||||
39 01 00 00 00 00 02 8f 00
|
||||
39 01 00 00 00 00 02 2f 00
|
||||
39 01 00 00 00 00 02 26 01
|
||||
39 01 00 00 00 00 02 5a 01
|
||||
39 01 00 00 00 00 02 2f 30
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 02 6f 1c
|
||||
39 01 00 00 00 00 09 ba 91 04 04 00 01
|
||||
04 04 00
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 06 c0 54 c0 00 21 43
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 02
|
||||
39 01 00 00 00 00 02 cc 30
|
||||
39 01 00 00 00 00 02 ce 01
|
||||
39 01 00 00 20 00 02 cc 00
|
||||
];
|
||||
|
||||
qcom,mdss-dsi-on-command = [
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 01
|
||||
39 01 00 00 00 00 02 6F 01
|
||||
39 01 00 00 00 00 04 C5 0B 0B 0B
|
||||
39 01 00 00 00 00 05 FF AA 55 A5 80
|
||||
39 01 00 00 00 00 02 6F 02
|
||||
39 01 00 00 00 00 02 F5 10
|
||||
39 01 00 00 00 00 02 6F 1B
|
||||
39 01 00 00 00 00 02 F4 55
|
||||
39 01 00 00 00 00 02 6F 18
|
||||
39 01 00 00 00 00 02 F8 19
|
||||
39 01 00 00 00 00 02 6F 0F
|
||||
39 01 00 00 00 00 02 FC 00
|
||||
39 01 00 00 00 00 05 2A 00 00 05 9F
|
||||
39 01 00 00 00 00 05 2B 00 00 0C 7F
|
||||
39 01 00 00 00 00 03 90 03 03
|
||||
39 01 00 00 00 00 13 91 89 28 00 28 D2
|
||||
00 02 86 04 3A 00 0A 02 AB 01 E9 10
|
||||
F0
|
||||
39 01 00 00 00 00 02 6F 06
|
||||
39 01 00 00 00 00 02 F3 DC
|
||||
39 01 00 00 00 00 02 26 00
|
||||
39 01 00 00 00 00 02 35 00
|
||||
39 01 00 00 00 00 05 3B 00 18 00 10
|
||||
39 01 00 00 00 00 02 53 20
|
||||
39 01 00 00 00 00 07 51 07 FF 07 FF 0F
|
||||
FF
|
||||
39 01 00 00 00 00 02 5A 01
|
||||
39 01 00 00 00 00 02 5F 00
|
||||
39 01 00 00 00 00 02 9C 01
|
||||
05 01 00 00 00 00 01 2C
|
||||
39 01 00 00 00 00 02 2f 00
|
||||
39 01 00 00 00 00 02 26 01
|
||||
39 01 00 00 00 00 02 5a 01
|
||||
39 01 00 00 00 00 02 2f 30
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 02 6f 1c
|
||||
39 01 00 00 00 00 09 ba 91 04 04 00 01
|
||||
04 04 00
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 06 c0 54 c0 00 21 43
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 02
|
||||
39 01 00 00 00 00 02 cc 30
|
||||
39 01 00 00 00 00 02 ce 01
|
||||
39 01 00 00 20 00 02 cc 00
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 01
|
||||
39 01 00 00 00 00 05 B2 55 01 FF 03
|
||||
05 01 00 00 78 00 01 11
|
||||
05 01 00 00 14 00 01 29
|
||||
];
|
||||
|
||||
qcom,mdss-dsi-off-command = [
|
||||
05 01 00 00 14 00 02 28 00
|
||||
05 01 00 00 78 00 02 10 00];
|
||||
qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
|
||||
qcom,mdss-dsi-timing-switch-command-state =
|
||||
"dsi_lp_mode";
|
||||
qcom,mdss-dsi-h-sync-pulse = <0>;
|
||||
qcom,compression-mode = "dsc";
|
||||
qcom,mdss-dsc-slice-height = <40>;
|
||||
qcom,mdss-dsc-slice-width = <720>;
|
||||
qcom,mdss-dsc-slice-per-pkt = <1>;
|
||||
qcom,mdss-dsc-bit-per-component = <8>;
|
||||
qcom,mdss-dsc-bit-per-pixel = <8>;
|
||||
qcom,mdss-dsc-block-prediction-enable;
|
||||
};
|
||||
|
||||
timing@7 {
|
||||
cell-index = <7>;
|
||||
qcom,mdss-dsi-panel-framerate = <20>;
|
||||
qcom,mdss-dsi-panel-width = <1440>;
|
||||
qcom,mdss-dsi-panel-height = <3200>;
|
||||
qcom,mdss-dsi-h-front-porch = <20>;
|
||||
qcom,mdss-dsi-h-back-porch = <20>;
|
||||
qcom,mdss-dsi-h-pulse-width = <4>;
|
||||
qcom,mdss-dsi-h-sync-skew = <0>;
|
||||
qcom,mdss-dsi-v-back-porch = <18>;
|
||||
qcom,mdss-dsi-v-front-porch = <20>;
|
||||
qcom,mdss-dsi-v-pulse-width = <2>;
|
||||
qcom,mdss-dsi-h-left-border = <0>;
|
||||
qcom,mdss-dsi-h-right-border = <0>;
|
||||
qcom,mdss-dsi-v-top-border = <0>;
|
||||
qcom,mdss-dsi-v-bottom-border = <0>;
|
||||
qcom,mdss-dsi-panel-jitter = <0x4 0x1>;
|
||||
qcom,mdss-dsi-panel-clockrate = <1199900000>;
|
||||
|
||||
qcom,mdss-dsi-timing-switch-command = [
|
||||
39 01 00 00 00 00 05 2a 00 00 05 9f
|
||||
39 01 00 00 00 00 05 2b 00 00 0c 7f
|
||||
39 01 00 00 00 00 02 8f 00
|
||||
39 01 00 00 00 00 02 2f 00
|
||||
39 01 00 00 00 00 02 26 01
|
||||
39 01 00 00 00 00 02 5a 01
|
||||
39 01 00 00 00 00 02 2f 30
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 02 6f 1c
|
||||
39 01 00 00 00 00 09 ba 91 05 05 00 01
|
||||
05 05 00
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 06 c0 54 c0 00 21 43
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 02
|
||||
39 01 00 00 00 00 02 cc 30
|
||||
39 01 00 00 00 00 02 ce 01
|
||||
39 01 00 00 20 00 02 cc 00
|
||||
];
|
||||
|
||||
qcom,mdss-dsi-on-command = [
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 01
|
||||
39 01 00 00 00 00 02 6F 01
|
||||
39 01 00 00 00 00 04 C5 0B 0B 0B
|
||||
39 01 00 00 00 00 05 FF AA 55 A5 80
|
||||
39 01 00 00 00 00 02 6F 02
|
||||
39 01 00 00 00 00 02 F5 10
|
||||
39 01 00 00 00 00 02 6F 1B
|
||||
39 01 00 00 00 00 02 F4 55
|
||||
39 01 00 00 00 00 02 6F 18
|
||||
39 01 00 00 00 00 02 F8 19
|
||||
39 01 00 00 00 00 02 6F 0F
|
||||
39 01 00 00 00 00 02 FC 00
|
||||
39 01 00 00 00 00 05 2A 00 00 05 9F
|
||||
39 01 00 00 00 00 05 2B 00 00 0C 7F
|
||||
39 01 00 00 00 00 03 90 03 03
|
||||
39 01 00 00 00 00 13 91 89 28 00 28 D2
|
||||
00 02 86 04 3A 00 0A 02 AB 01 E9 10
|
||||
F0
|
||||
39 01 00 00 00 00 02 6F 06
|
||||
39 01 00 00 00 00 02 F3 DC
|
||||
39 01 00 00 00 00 02 26 00
|
||||
39 01 00 00 00 00 02 35 00
|
||||
39 01 00 00 00 00 05 3B 00 18 00 10
|
||||
39 01 00 00 00 00 02 53 20
|
||||
39 01 00 00 00 00 07 51 07 FF 07 FF 0F
|
||||
FF
|
||||
39 01 00 00 00 00 02 5A 01
|
||||
39 01 00 00 00 00 02 5F 00
|
||||
39 01 00 00 00 00 02 9C 01
|
||||
05 01 00 00 00 00 01 2C
|
||||
39 01 00 00 00 00 02 2f 00
|
||||
39 01 00 00 00 00 02 26 01
|
||||
39 01 00 00 00 00 02 5a 01
|
||||
39 01 00 00 00 00 02 2f 30
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 02 6f 1c
|
||||
39 01 00 00 00 00 09 ba 91 05 05 00 01
|
||||
05 05 00
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 06 c0 54 c0 00 21 43
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 02
|
||||
39 01 00 00 00 00 02 cc 30
|
||||
39 01 00 00 00 00 02 ce 01
|
||||
39 01 00 00 20 00 02 cc 00
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 01
|
||||
39 01 00 00 00 00 05 B2 55 01 FF 03
|
||||
05 01 00 00 78 00 01 11
|
||||
05 01 00 00 14 00 01 29
|
||||
];
|
||||
|
||||
qcom,mdss-dsi-off-command = [
|
||||
05 01 00 00 14 00 02 28 00
|
||||
05 01 00 00 78 00 02 10 00];
|
||||
qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
|
||||
qcom,mdss-dsi-timing-switch-command-state =
|
||||
"dsi_lp_mode";
|
||||
qcom,mdss-dsi-h-sync-pulse = <0>;
|
||||
qcom,compression-mode = "dsc";
|
||||
qcom,mdss-dsc-slice-height = <40>;
|
||||
qcom,mdss-dsc-slice-width = <720>;
|
||||
qcom,mdss-dsc-slice-per-pkt = <1>;
|
||||
qcom,mdss-dsc-bit-per-component = <8>;
|
||||
qcom,mdss-dsc-bit-per-pixel = <8>;
|
||||
qcom,mdss-dsc-block-prediction-enable;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@@ -1,3 +1,8 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&mdss_mdp {
|
||||
dsi_nt37801_amoled_video_cphy: qcom,mdss_dsi_nt37801_wqhd_plus_vid_cphy {
|
||||
qcom,mdss-dsi-panel-name =
|
||||
|
@@ -1,3 +1,8 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&mdss_mdp {
|
||||
dsi_nt37801_amoled_video: qcom,mdss_dsi_nt37801_wqhd_plus_vid {
|
||||
qcom,mdss-dsi-panel-name =
|
||||
|
138
display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-cmd-cphy.dtsi
Normal file
138
display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-cmd-cphy.dtsi
Normal file
@@ -0,0 +1,138 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&mdss_mdp {
|
||||
dsi_nt37801_amoled_qsync_cmd_cphy: qcom,mdss_dsi_nt37801_qsync_wqhd_plus_cmd_cphy {
|
||||
qcom,mdss-dsi-panel-name =
|
||||
"nt37801 amoled qsync cmd mode dsi csot panel with DSC CPHY";
|
||||
qcom,mdss-dsi-panel-type = "dsi_cmd_mode";
|
||||
qcom,mdss-dsi-panel-physical-type = "oled";
|
||||
qcom,mdss-dsi-virtual-channel-id = <0>;
|
||||
qcom,mdss-dsi-stream = <0>;
|
||||
qcom,mdss-dsi-bpp = <24>;
|
||||
qcom,mdss-dsi-color-order = "rgb_swap_rgb";
|
||||
qcom,mdss-dsi-underflow-color = <0xff>;
|
||||
qcom,mdss-dsi-border-color = <0>;
|
||||
|
||||
qcom,dsi-ctrl-num = <0>;
|
||||
qcom,dsi-phy-num = <0>;
|
||||
|
||||
qcom,mdss-dsi-traffic-mode = "non_burst_sync_event";
|
||||
qcom,mdss-dsi-lane-map = "lane_map_0123";
|
||||
qcom,mdss-dsi-bllp-eof-power-mode;
|
||||
qcom,mdss-dsi-bllp-power-mode;
|
||||
qcom,mdss-dsi-lane-0-state;
|
||||
qcom,mdss-dsi-lane-1-state;
|
||||
qcom,mdss-dsi-lane-2-state;
|
||||
qcom,mdss-dsi-dma-trigger = "trigger_sw";
|
||||
qcom,mdss-dsi-mdp-trigger = "none";
|
||||
qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>;
|
||||
|
||||
qcom,mdss-dsi-te-pin-select = <1>;
|
||||
qcom,mdss-dsi-wr-mem-start = <0x2c>;
|
||||
qcom,mdss-dsi-wr-mem-continue = <0x3c>;
|
||||
qcom,mdss-dsi-te-dcs-command = <1>;
|
||||
qcom,mdss-dsi-te-check-enable;
|
||||
qcom,mdss-dsi-te-using-te-pin;
|
||||
qcom,panel-cphy-mode;
|
||||
qcom,spr-pack-type = "pentile";
|
||||
qcom,qsync-enable;
|
||||
qcom,mdss-dsi-qsync-min-refresh-rate = <60>;
|
||||
qcom,mdss-dsi-display-timings {
|
||||
timing@0 {
|
||||
cell-index = <0>;
|
||||
qcom,mdss-dsi-panel-framerate = <120>;
|
||||
qcom,mdss-dsi-panel-width = <1440>;
|
||||
qcom,mdss-dsi-panel-height = <3200>;
|
||||
qcom,mdss-dsi-h-front-porch = <22>;
|
||||
qcom,mdss-dsi-h-back-porch = <20>;
|
||||
qcom,mdss-dsi-h-pulse-width = <20>;
|
||||
qcom,mdss-dsi-h-sync-skew = <0>;
|
||||
qcom,mdss-dsi-v-back-porch = <18>;
|
||||
qcom,mdss-dsi-v-front-porch = <20>;
|
||||
qcom,mdss-dsi-v-pulse-width = <2>;
|
||||
qcom,mdss-dsi-h-left-border = <0>;
|
||||
qcom,mdss-dsi-h-right-border = <0>;
|
||||
qcom,mdss-dsi-v-top-border = <0>;
|
||||
qcom,mdss-dsi-v-bottom-border = <0>;
|
||||
qcom,mdss-dsi-panel-jitter = <0x4 0x1>;
|
||||
|
||||
qcom,mdss-dsi-on-command = [
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 01
|
||||
39 01 00 00 00 00 02 6F 01
|
||||
39 01 00 00 00 00 04 C5 0B 0B 0B
|
||||
39 01 00 00 00 00 05 FF AA 55 A5 80
|
||||
39 01 00 00 00 00 02 6F 02
|
||||
39 01 00 00 00 00 02 F5 10
|
||||
39 01 00 00 00 00 02 6F 1B
|
||||
39 01 00 00 00 00 02 F4 55
|
||||
39 01 00 00 00 00 02 6F 18
|
||||
39 01 00 00 00 00 02 F8 19
|
||||
39 01 00 00 00 00 02 6F 0F
|
||||
39 01 00 00 00 00 02 FC 00
|
||||
39 01 00 00 00 00 05 2A 00 00 05 9F
|
||||
39 01 00 00 00 00 05 2B 00 00 0C 7F
|
||||
39 01 00 00 00 00 03 90 03 03
|
||||
39 01 00 00 00 00 13 91 89 28 00 28 D2
|
||||
00 02 86 04 3A 00 0A 02 AB 01 E9 10
|
||||
F0
|
||||
39 01 00 00 00 00 02 6F 06
|
||||
39 01 00 00 00 00 02 F3 DC
|
||||
39 01 00 00 00 00 02 26 00
|
||||
39 01 00 00 00 00 02 35 00
|
||||
39 01 00 00 00 00 05 3B 00 18 00 10
|
||||
39 01 00 00 00 00 02 53 20
|
||||
39 01 00 00 00 00 07 51 07 FF 07 FF 0F
|
||||
FF
|
||||
39 01 00 00 00 00 02 5A 01
|
||||
39 01 00 00 00 00 02 5F 00
|
||||
39 01 00 00 00 00 02 9C 01
|
||||
05 01 00 00 00 00 01 2C
|
||||
39 01 00 00 00 00 02 2F 00
|
||||
39 01 00 00 00 00 05 FF AA 55 A5 82
|
||||
39 01 00 00 00 00 02 6F 08
|
||||
39 01 00 00 00 00 03 F3 CC 0C
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 01
|
||||
39 01 00 00 00 00 05 B2 55 01 FF 03
|
||||
05 01 00 00 78 00 01 11
|
||||
05 01 00 00 14 00 01 29
|
||||
];
|
||||
|
||||
qcom,mdss-dsi-off-command = [
|
||||
05 01 00 00 14 00 02 28 00
|
||||
05 01 00 00 78 00 02 10 00];
|
||||
qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
|
||||
qcom,mdss-dsi-qsync-on-commands = [
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 02 6f 1f
|
||||
39 01 00 00 00 00 02 c0 50
|
||||
39 01 00 00 00 00 02 6f 22
|
||||
39 01 00 00 00 00 03 c0 0C bf
|
||||
39 01 00 00 00 00 02 6f 13
|
||||
39 01 00 00 00 00 03 c0 00 cc
|
||||
39 01 00 00 00 00 02 35 00
|
||||
39 01 00 00 00 00 03 44 00 00
|
||||
39 01 00 00 00 00 02 2f 10
|
||||
];
|
||||
qcom,mdss-dsi-qsync-on-commands-state =
|
||||
"dsi_hs_mode";
|
||||
qcom,mdss-dsi-qsync-off-commands = [
|
||||
39 01 00 00 00 00 02 2f 00
|
||||
];
|
||||
qcom,mdss-dsi-qsync-off-commands-state =
|
||||
"dsi_hs_mode";
|
||||
qcom,mdss-dsi-h-sync-pulse = <0>;
|
||||
qcom,compression-mode = "dsc";
|
||||
qcom,mdss-dsc-slice-height = <40>;
|
||||
qcom,mdss-dsc-slice-width = <720>;
|
||||
qcom,mdss-dsc-slice-per-pkt = <1>;
|
||||
qcom,mdss-dsc-bit-per-component = <8>;
|
||||
qcom,mdss-dsc-bit-per-pixel = <8>;
|
||||
qcom,mdss-dsc-block-prediction-enable;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
137
display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-cmd.dtsi
Normal file
137
display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-cmd.dtsi
Normal file
@@ -0,0 +1,137 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&mdss_mdp {
|
||||
dsi_nt37801_amoled_qsync_cmd: qcom,mdss_dsi_nt37801_qsync_wqhd_plus_cmd {
|
||||
qcom,mdss-dsi-panel-name =
|
||||
"nt37801 amoled qsync cmd mode dsi csot panel with DSC";
|
||||
qcom,mdss-dsi-panel-type = "dsi_cmd_mode";
|
||||
qcom,mdss-dsi-panel-physical-type = "oled";
|
||||
qcom,mdss-dsi-virtual-channel-id = <0>;
|
||||
qcom,mdss-dsi-stream = <0>;
|
||||
qcom,mdss-dsi-bpp = <24>;
|
||||
qcom,mdss-dsi-color-order = "rgb_swap_rgb";
|
||||
qcom,mdss-dsi-underflow-color = <0xff>;
|
||||
qcom,mdss-dsi-border-color = <0>;
|
||||
|
||||
qcom,dsi-ctrl-num = <0>;
|
||||
qcom,dsi-phy-num = <0>;
|
||||
qcom,dsi-sec-ctrl-num = <1>;
|
||||
qcom,dsi-sec-phy-num = <1>;
|
||||
|
||||
qcom,mdss-dsi-traffic-mode = "non_burst_sync_event";
|
||||
qcom,mdss-dsi-lane-map = "lane_map_0123";
|
||||
qcom,mdss-dsi-bllp-eof-power-mode;
|
||||
qcom,mdss-dsi-bllp-power-mode;
|
||||
qcom,mdss-dsi-lane-0-state;
|
||||
qcom,mdss-dsi-lane-1-state;
|
||||
qcom,mdss-dsi-lane-2-state;
|
||||
qcom,mdss-dsi-lane-3-state;
|
||||
qcom,mdss-dsi-dma-trigger = "trigger_sw";
|
||||
qcom,mdss-dsi-mdp-trigger = "none";
|
||||
qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>;
|
||||
|
||||
qcom,mdss-dsi-te-pin-select = <1>;
|
||||
qcom,mdss-dsi-wr-mem-start = <0x2c>;
|
||||
qcom,mdss-dsi-wr-mem-continue = <0x3c>;
|
||||
qcom,mdss-dsi-te-dcs-command = <1>;
|
||||
qcom,mdss-dsi-te-check-enable;
|
||||
qcom,mdss-dsi-te-using-te-pin;
|
||||
qcom,spr-pack-type = "pentile";
|
||||
qcom,qsync-enable;
|
||||
qcom,mdss-dsi-qsync-min-refresh-rate = <60>;
|
||||
qcom,mdss-dsi-display-timings {
|
||||
timing@0 {
|
||||
cell-index = <0>;
|
||||
qcom,mdss-dsi-panel-framerate = <120>;
|
||||
qcom,mdss-dsi-panel-width = <1440>;
|
||||
qcom,mdss-dsi-panel-height = <3200>;
|
||||
qcom,mdss-dsi-h-front-porch = <20>;
|
||||
qcom,mdss-dsi-h-back-porch = <20>;
|
||||
qcom,mdss-dsi-h-pulse-width = <4>;
|
||||
qcom,mdss-dsi-h-sync-skew = <0>;
|
||||
qcom,mdss-dsi-v-back-porch = <18>;
|
||||
qcom,mdss-dsi-v-front-porch = <20>;
|
||||
qcom,mdss-dsi-v-pulse-width = <2>;
|
||||
qcom,mdss-dsi-h-left-border = <0>;
|
||||
qcom,mdss-dsi-h-right-border = <0>;
|
||||
qcom,mdss-dsi-v-top-border = <0>;
|
||||
qcom,mdss-dsi-v-bottom-border = <0>;
|
||||
qcom,mdss-dsi-panel-jitter = <0x4 0x1>;
|
||||
|
||||
qcom,mdss-dsi-on-command = [
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 01
|
||||
39 01 00 00 00 00 02 6F 01
|
||||
39 01 00 00 00 00 04 C5 0B 0B 0B
|
||||
39 01 00 00 00 00 05 FF AA 55 A5 80
|
||||
39 01 00 00 00 00 02 6F 02
|
||||
39 01 00 00 00 00 02 F5 10
|
||||
39 01 00 00 00 00 02 6F 1B
|
||||
39 01 00 00 00 00 02 F4 55
|
||||
39 01 00 00 00 00 02 6F 18
|
||||
39 01 00 00 00 00 02 F8 19
|
||||
39 01 00 00 00 00 02 6F 0F
|
||||
39 01 00 00 00 00 02 FC 00
|
||||
39 01 00 00 00 00 05 2A 00 00 05 9F
|
||||
39 01 00 00 00 00 05 2B 00 00 0C 7F
|
||||
39 01 00 00 00 00 03 90 03 03
|
||||
39 01 00 00 00 00 13 91 89 28 00 28 D2
|
||||
00 02 86 04 3A 00 0A 02 AB 01 E9 10
|
||||
F0
|
||||
39 01 00 00 00 00 02 6F 06
|
||||
39 01 00 00 00 00 02 F3 DC
|
||||
39 01 00 00 00 00 02 26 00
|
||||
39 01 00 00 00 00 02 35 00
|
||||
39 01 00 00 00 00 05 3B 00 18 00 10
|
||||
39 01 00 00 00 00 02 53 20
|
||||
39 01 00 00 00 00 07 51 07 FF 07 FF 0F
|
||||
FF
|
||||
39 01 00 00 00 00 02 5A 01
|
||||
39 01 00 00 00 00 02 5F 00
|
||||
39 01 00 00 00 00 02 9C 01
|
||||
05 01 00 00 00 00 01 2C
|
||||
39 01 00 00 00 00 02 2F 00
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 01
|
||||
39 01 00 00 00 00 05 B2 55 01 FF 03
|
||||
05 01 00 00 78 00 01 11
|
||||
05 01 00 00 14 00 01 29
|
||||
];
|
||||
|
||||
qcom,mdss-dsi-off-command = [
|
||||
05 01 00 00 14 00 02 28 00
|
||||
05 01 00 00 78 00 02 10 00];
|
||||
qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
|
||||
qcom,mdss-dsi-qsync-on-commands = [
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 02 6f 1f
|
||||
39 01 00 00 00 00 02 c0 50
|
||||
39 01 00 00 00 00 02 6f 22
|
||||
39 01 00 00 00 00 03 c0 0C bf
|
||||
39 01 00 00 00 00 02 6f 13
|
||||
39 01 00 00 00 00 03 c0 00 cc
|
||||
39 01 00 00 00 00 02 35 00
|
||||
39 01 00 00 00 00 03 44 00 00
|
||||
39 01 00 00 00 00 02 2f 10
|
||||
];
|
||||
qcom,mdss-dsi-qsync-on-commands-state =
|
||||
"dsi_hs_mode";
|
||||
qcom,mdss-dsi-qsync-off-commands = [
|
||||
39 01 00 00 00 00 02 2f 00
|
||||
];
|
||||
qcom,mdss-dsi-qsync-off-commands-state =
|
||||
"dsi_hs_mode";
|
||||
qcom,mdss-dsi-h-sync-pulse = <0>;
|
||||
qcom,compression-mode = "dsc";
|
||||
qcom,mdss-dsc-slice-height = <40>;
|
||||
qcom,mdss-dsc-slice-width = <720>;
|
||||
qcom,mdss-dsc-slice-per-pkt = <1>;
|
||||
qcom,mdss-dsc-bit-per-component = <8>;
|
||||
qcom,mdss-dsc-bit-per-pixel = <8>;
|
||||
qcom,mdss-dsc-block-prediction-enable;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
120
display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-video-cphy.dtsi
Normal file
120
display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-video-cphy.dtsi
Normal file
@@ -0,0 +1,120 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&mdss_mdp {
|
||||
dsi_nt37801_amoled_qsync_video_cphy: qcom,mdss_dsi_nt37801_qsync_wqhd_plus_vid_cphy {
|
||||
qcom,mdss-dsi-panel-name =
|
||||
"nt37801 amoled qsync video mode dsi csot panel with DSC CPHY";
|
||||
qcom,mdss-dsi-panel-type = "dsi_video_mode";
|
||||
qcom,mdss-dsi-panel-physical-type = "oled";
|
||||
qcom,mdss-dsi-virtual-channel-id = <0>;
|
||||
qcom,mdss-dsi-stream = <0>;
|
||||
qcom,mdss-dsi-bpp = <24>;
|
||||
qcom,mdss-dsi-border-color = <0>;
|
||||
qcom,dsi-ctrl-num = <0>;
|
||||
qcom,dsi-phy-num = <0>;
|
||||
qcom,mdss-dsi-traffic-mode = "burst_mode";
|
||||
qcom,mdss-dsi-bllp-eof-power-mode;
|
||||
qcom,mdss-dsi-bllp-power-mode;
|
||||
qcom,mdss-dsi-lane-0-state;
|
||||
qcom,mdss-dsi-lane-1-state;
|
||||
qcom,mdss-dsi-lane-2-state;
|
||||
qcom,mdss-dsi-dma-trigger = "trigger_sw";
|
||||
qcom,mdss-dsi-mdp-trigger = "none";
|
||||
qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>;
|
||||
qcom,mdss-dsi-tx-eot-append;
|
||||
qcom,adjust-timer-wakeup-ms = <1>;
|
||||
qcom,panel-cphy-mode;
|
||||
qcom,spr-pack-type = "pentile";
|
||||
|
||||
qcom,mdss-dsi-wr-mem-start = <0x2c>;
|
||||
qcom,mdss-dsi-wr-mem-continue = <0x3c>;
|
||||
qcom,qsync-enable;
|
||||
qcom,mdss-dsi-qsync-min-refresh-rate = <80>;
|
||||
qcom,mdss-dsi-display-timings {
|
||||
timing@0 {
|
||||
cell-index = <0>;
|
||||
qcom,mdss-dsi-panel-framerate = <120>;
|
||||
qcom,mdss-dsi-panel-width = <1440>;
|
||||
qcom,mdss-dsi-panel-height = <3200>;
|
||||
qcom,mdss-dsi-h-front-porch = <100>;
|
||||
qcom,mdss-dsi-h-back-porch = <20>;
|
||||
qcom,mdss-dsi-h-pulse-width = <20>;
|
||||
qcom,mdss-dsi-h-sync-skew = <0>;
|
||||
qcom,mdss-dsi-v-back-porch = <20>;
|
||||
qcom,mdss-dsi-v-front-porch = <44>;
|
||||
qcom,mdss-dsi-v-pulse-width = <2>;
|
||||
qcom,mdss-dsi-h-left-border = <0>;
|
||||
qcom,mdss-dsi-h-right-border = <0>;
|
||||
qcom,mdss-dsi-v-top-border = <0>;
|
||||
qcom,mdss-dsi-v-bottom-border = <0>;
|
||||
|
||||
qcom,mdss-dsi-on-command = [
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 00
|
||||
39 01 00 00 00 00 02 C2 81
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 03
|
||||
39 01 00 00 00 00 02 C6 A2
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 05
|
||||
39 01 00 00 00 00 02 6F 08
|
||||
39 01 00 00 00 00 06 EC 10 00 00 00 FF
|
||||
39 01 00 00 00 00 02 17 01
|
||||
39 01 00 00 00 00 05 3B 00 14 00 2C
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 01
|
||||
39 01 00 00 00 00 02 C3 19
|
||||
39 01 00 00 00 00 02 6F 01
|
||||
39 01 00 00 00 00 04 C5 0B 0B 0B
|
||||
39 01 00 00 00 00 05 FF AA 55 A5 80
|
||||
39 01 00 00 00 00 02 6F 02
|
||||
39 01 00 00 00 00 02 F5 10
|
||||
39 01 00 00 00 00 02 6F 1B
|
||||
39 01 00 00 00 00 02 F4 55
|
||||
39 01 00 00 00 00 02 6F 18
|
||||
39 01 00 00 00 00 02 F8 19
|
||||
39 01 00 00 00 00 02 6F 0F
|
||||
39 01 00 00 00 00 02 FC 00
|
||||
39 01 00 00 00 00 05 2A 00 00 05 9F
|
||||
39 01 00 00 00 00 05 2B 00 00 0C 7F
|
||||
39 01 00 00 00 00 03 90 03 03
|
||||
39 01 00 00 00 00 13 91 89 28 00 28 D2
|
||||
00 02 86 04 3A 00 0A 02 AB 01 E9 10
|
||||
F0
|
||||
39 01 00 00 00 00 02 6F 06
|
||||
39 01 00 00 00 00 02 F3 DC
|
||||
39 01 00 00 00 00 02 26 00
|
||||
39 01 00 00 00 00 02 35 00
|
||||
39 01 00 00 00 00 02 53 20
|
||||
39 01 00 00 00 00 07 51 07 FF 07 FF 0F
|
||||
FF
|
||||
39 01 00 00 00 00 02 5A 01
|
||||
39 01 00 00 00 00 02 5F 00
|
||||
39 01 00 00 00 00 02 9C 01
|
||||
05 01 00 00 00 00 01 2C
|
||||
39 01 00 00 00 00 02 2f 00
|
||||
39 01 00 00 00 00 05 FF AA 55 A5 82
|
||||
39 01 00 00 00 00 02 6F 08
|
||||
39 01 00 00 00 00 03 F3 CC 0C
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 01
|
||||
39 01 00 00 00 00 05 B2 55 01 FF 03
|
||||
05 01 00 00 78 00 01 11
|
||||
05 01 00 00 14 00 01 29
|
||||
];
|
||||
|
||||
qcom,mdss-dsi-off-command = [
|
||||
05 01 00 00 14 00 02 28 00
|
||||
05 01 00 00 78 00 02 10 00];
|
||||
qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-off-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-h-sync-pulse = <0>;
|
||||
qcom,compression-mode = "dsc";
|
||||
qcom,mdss-dsc-slice-height = <40>;
|
||||
qcom,mdss-dsc-slice-width = <720>;
|
||||
qcom,mdss-dsc-slice-per-pkt = <1>;
|
||||
qcom,mdss-dsc-bit-per-component = <8>;
|
||||
qcom,mdss-dsc-bit-per-pixel = <8>;
|
||||
qcom,mdss-dsc-block-prediction-enable;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
119
display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-video.dtsi
Normal file
119
display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-video.dtsi
Normal file
@@ -0,0 +1,119 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&mdss_mdp {
|
||||
dsi_nt37801_amoled_qsync_video: qcom,mdss_dsi_nt37801_qsync_wqhd_plus_vid {
|
||||
qcom,mdss-dsi-panel-name =
|
||||
"nt37801 amoled qsync video mode dsi csot panel with DSC";
|
||||
qcom,mdss-dsi-panel-type = "dsi_video_mode";
|
||||
qcom,mdss-dsi-panel-physical-type = "oled";
|
||||
qcom,mdss-dsi-virtual-channel-id = <0>;
|
||||
qcom,mdss-dsi-stream = <0>;
|
||||
qcom,mdss-dsi-bpp = <24>;
|
||||
qcom,mdss-dsi-border-color = <0>;
|
||||
qcom,dsi-ctrl-num = <0>;
|
||||
qcom,dsi-phy-num = <0>;
|
||||
qcom,dsi-sec-ctrl-num = <1>;
|
||||
qcom,dsi-sec-phy-num = <1>;
|
||||
qcom,mdss-dsi-traffic-mode = "burst_mode";
|
||||
qcom,mdss-dsi-bllp-eof-power-mode;
|
||||
qcom,mdss-dsi-bllp-power-mode;
|
||||
qcom,mdss-dsi-lane-0-state;
|
||||
qcom,mdss-dsi-lane-1-state;
|
||||
qcom,mdss-dsi-lane-2-state;
|
||||
qcom,mdss-dsi-lane-3-state;
|
||||
qcom,mdss-dsi-dma-trigger = "trigger_sw";
|
||||
qcom,mdss-dsi-mdp-trigger = "none";
|
||||
qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>;
|
||||
qcom,mdss-dsi-tx-eot-append;
|
||||
qcom,adjust-timer-wakeup-ms = <1>;
|
||||
|
||||
qcom,mdss-dsi-wr-mem-start = <0x2c>;
|
||||
qcom,mdss-dsi-wr-mem-continue = <0x3c>;
|
||||
qcom,spr-pack-type = "pentile";
|
||||
qcom,qsync-enable;
|
||||
qcom,mdss-dsi-qsync-min-refresh-rate = <80>;
|
||||
qcom,mdss-dsi-display-timings {
|
||||
timing@0 {
|
||||
cell-index = <0>;
|
||||
qcom,mdss-dsi-panel-framerate = <120>;
|
||||
qcom,mdss-dsi-panel-width = <1440>;
|
||||
qcom,mdss-dsi-panel-height = <3200>;
|
||||
qcom,mdss-dsi-h-front-porch = <100>;
|
||||
qcom,mdss-dsi-h-back-porch = <20>;
|
||||
qcom,mdss-dsi-h-pulse-width = <20>;
|
||||
qcom,mdss-dsi-h-sync-skew = <0>;
|
||||
qcom,mdss-dsi-v-back-porch = <20>;
|
||||
qcom,mdss-dsi-v-front-porch = <44>;
|
||||
qcom,mdss-dsi-v-pulse-width = <2>;
|
||||
qcom,mdss-dsi-h-left-border = <0>;
|
||||
qcom,mdss-dsi-h-right-border = <0>;
|
||||
qcom,mdss-dsi-v-top-border = <0>;
|
||||
qcom,mdss-dsi-v-bottom-border = <0>;
|
||||
|
||||
qcom,mdss-dsi-on-command = [
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 00
|
||||
39 01 00 00 00 00 02 C2 81
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 03
|
||||
39 01 00 00 00 00 02 C6 A2
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 05
|
||||
39 01 00 00 00 00 02 6F 08
|
||||
39 01 00 00 00 00 06 EC 10 00 00 00 FF
|
||||
39 01 00 00 00 00 02 17 01
|
||||
39 01 00 00 00 00 05 3B 00 14 00 2C
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 01
|
||||
39 01 00 00 00 00 02 C3 19
|
||||
39 01 00 00 00 00 02 6F 01
|
||||
39 01 00 00 00 00 04 C5 0B 0B 0B
|
||||
39 01 00 00 00 00 05 FF AA 55 A5 80
|
||||
39 01 00 00 00 00 02 6F 02
|
||||
39 01 00 00 00 00 02 F5 10
|
||||
39 01 00 00 00 00 02 6F 1B
|
||||
39 01 00 00 00 00 02 F4 55
|
||||
39 01 00 00 00 00 02 6F 18
|
||||
39 01 00 00 00 00 02 F8 19
|
||||
39 01 00 00 00 00 02 6F 0F
|
||||
39 01 00 00 00 00 02 FC 00
|
||||
39 01 00 00 00 00 05 2A 00 00 05 9F
|
||||
39 01 00 00 00 00 05 2B 00 00 0C 7F
|
||||
39 01 00 00 00 00 03 90 03 03
|
||||
39 01 00 00 00 00 13 91 89 28 00 28 D2
|
||||
00 02 86 04 3A 00 0A 02 AB 01 E9 10
|
||||
F0
|
||||
39 01 00 00 00 00 02 6F 06
|
||||
39 01 00 00 00 00 02 F3 DC
|
||||
39 01 00 00 00 00 02 26 00
|
||||
39 01 00 00 00 00 02 35 00
|
||||
39 01 00 00 00 00 02 53 20
|
||||
39 01 00 00 00 00 07 51 07 FF 07 FF 0F
|
||||
FF
|
||||
39 01 00 00 00 00 02 5A 01
|
||||
39 01 00 00 00 00 02 5F 00
|
||||
39 01 00 00 00 00 02 9C 01
|
||||
05 01 00 00 00 00 01 2C
|
||||
39 01 00 00 00 00 02 2f 00
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 01
|
||||
39 01 00 00 00 00 05 B2 55 01 FF 03
|
||||
05 01 00 00 78 00 01 11
|
||||
05 01 00 00 14 00 01 29
|
||||
];
|
||||
|
||||
qcom,mdss-dsi-off-command = [
|
||||
05 01 00 00 14 00 02 28 00
|
||||
05 01 00 00 78 00 02 10 00];
|
||||
qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-off-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-h-sync-pulse = <0>;
|
||||
qcom,compression-mode = "dsc";
|
||||
qcom,mdss-dsc-slice-height = <40>;
|
||||
qcom,mdss-dsc-slice-width = <720>;
|
||||
qcom,mdss-dsc-slice-per-pkt = <1>;
|
||||
qcom,mdss-dsc-bit-per-component = <8>;
|
||||
qcom,mdss-dsc-bit-per-pixel = <8>;
|
||||
qcom,mdss-dsc-block-prediction-enable;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
@@ -1,3 +1,8 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&mdss_mdp {
|
||||
dsi_sharp_4k_dsc_cmd: qcom,mdss_dsi_sharp_4k_dsc_cmd {
|
||||
qcom,mdss-dsi-panel-name = "Sharp 4k cmd mode dsc dsi panel";
|
||||
|
@@ -1,3 +1,8 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&mdss_mdp {
|
||||
dsi_sharp_4k_dsc_video: qcom,mdss_dsi_sharp_4k_dsc_video {
|
||||
qcom,mdss-dsi-panel-name = "Sharp 4k video mode dsc dsi panel";
|
||||
|
@@ -1,3 +1,8 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&mdss_mdp {
|
||||
dsi_sim_panel_au: qcom,mdss_dsi_cmd_sim_panel_au {
|
||||
qcom,mdss-dsi-panel-name = "cmd mode dsi sim panel au";
|
||||
|
@@ -1,3 +1,8 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&mdss_mdp {
|
||||
dsi_sim_cmd: qcom,mdss_dsi_sim_cmd {
|
||||
qcom,mdss-dsi-panel-name = "Simulator cmd mode dsi panel";
|
||||
|
@@ -1,3 +1,8 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&mdss_mdp {
|
||||
dsi_sim_dsc_10b_cmd: qcom,mdss_dsi_sim_dsc_10b_cmd {
|
||||
qcom,mdss-dsi-panel-name =
|
||||
|
@@ -1,3 +1,8 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&mdss_mdp {
|
||||
dsi_sim_dsc_375_cmd: qcom,mdss_dsi_sim_dsc_375_cmd {
|
||||
qcom,mdss-dsi-panel-name =
|
||||
|
@@ -1,3 +1,8 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&mdss_mdp {
|
||||
dsi_dual_sim_cmd: qcom,mdss_dsi_dual_sim_cmd {
|
||||
qcom,mdss-dsi-panel-name = "Sim dual cmd mode dsi panel";
|
||||
|
@@ -1,3 +1,8 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&mdss_mdp {
|
||||
dsi_dual_sim_dsc_375_cmd: qcom,mdss_dsi_dual_sim_dsc_375_cmd {
|
||||
qcom,mdss-dsi-panel-name =
|
||||
|
@@ -1,3 +1,8 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&mdss_mdp {
|
||||
dsi_dual_sim_vid: qcom,mdss_dsi_dual_sim_video {
|
||||
qcom,mdss-dsi-panel-name = "Sim dual video mode dsi panel";
|
||||
|
@@ -1,3 +1,8 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&mdss_mdp {
|
||||
dsi_sim_sec_hd_cmd: qcom,mdss_dsi_sim_sec_hd_cmd {
|
||||
qcom,mdss-dsi-panel-name =
|
||||
|
@@ -1,3 +1,8 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&mdss_mdp {
|
||||
dsi_sim_vid: qcom,mdss_dsi_sim_video {
|
||||
qcom,mdss-dsi-panel-name = "Simulator video mode dsi panel";
|
||||
|
@@ -1,3 +1,8 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&mdss_mdp {
|
||||
dsi_vtdr6130_amoled_120hz_cmd: qcom,mdss_dsi_vtdr6130_fhd_plus_120hz_cmd {
|
||||
qcom,mdss-dsi-panel-name =
|
||||
|
@@ -1,3 +1,8 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&mdss_mdp {
|
||||
dsi_vtdr6130_amoled_120hz_video: qcom,mdss_dsi_vtdr6130_fhd_plus_120hz_vid {
|
||||
qcom,mdss-dsi-panel-name =
|
||||
|
@@ -1,3 +1,8 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&mdss_mdp {
|
||||
dsi_vtdr6130_amoled_cmd: qcom,mdss_dsi_vtdr6130_fhd_plus_cmd {
|
||||
qcom,mdss-dsi-panel-name =
|
||||
|
@@ -1,3 +1,8 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&mdss_mdp {
|
||||
dsi_vtdr6130_amoled_video: qcom,mdss_dsi_vtdr6130_fhd_plus_vid {
|
||||
qcom,mdss-dsi-panel-name =
|
||||
|
@@ -1,3 +1,8 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&mdss_mdp {
|
||||
dsi_vtdr6130_amoled_qsync_144hz_cmd: qcom,mdss_dsi_vtdr6130_qsync_fhd_plus_144hz_cmd {
|
||||
qcom,mdss-dsi-panel-name =
|
||||
|
@@ -1,3 +1,8 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&mdss_mdp {
|
||||
dsi_vtdr6130_amoled_qsync_144hz_video: qcom,mdss_dsi_vtdr6130_qsync_fhd_plus_144hz_video {
|
||||
qcom,mdss-dsi-panel-name =
|
||||
|
@@ -13,11 +13,13 @@
|
||||
reg = <0x0ae00000 0x93800>,
|
||||
<0x0aeb0000 0x2008>,
|
||||
<0x0af80000 0x7000>,
|
||||
<0x400000 0x2000>;
|
||||
<0x400000 0x2000>,
|
||||
<0x0af08000 0x24>;
|
||||
reg-names = "mdp_phys",
|
||||
"vbif_phys",
|
||||
"regdma_phys",
|
||||
"ipcc_reg";
|
||||
"ipcc_reg",
|
||||
"disp_cc";
|
||||
|
||||
/* interrupt config */
|
||||
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@@ -192,8 +194,8 @@
|
||||
qcom,sde-dspp-spr-version = <0x00020000>;
|
||||
|
||||
qcom,sde-dspp-demura-off = <0x15600 0x14600 0x13600 0x12600>;
|
||||
qcom,sde-dspp-demura-size = <0xe4>;
|
||||
qcom,sde-dspp-demura-version = <0x00020000>;
|
||||
qcom,sde-dspp-demura-size = <0x150>;
|
||||
qcom,sde-dspp-demura-version = <0x00030000>;
|
||||
|
||||
qcom,sde-dspp-aiqe-off = <0x39000 0xffffffff 0x3a000 0xffffffff>;
|
||||
qcom,sde-dspp-aiqe-version = <0x00010000>;
|
||||
@@ -265,7 +267,6 @@
|
||||
|
||||
qcom,sde-ipcc-protocol-id = <0x4>;
|
||||
qcom,sde-ipcc-client-dpu-phys-id = <0x14>;
|
||||
qcom,sde-soccp-controller = <&soccp_pas>;
|
||||
qcom,sde-hw-fence-mdp-ctl-offset = <0x20000>;
|
||||
|
||||
/* offsets are relative to "mdp_phys + qcom,sde-off */
|
||||
|
16
display/sun-sde-display-atp-overlay.dts
Normal file
16
display/sun-sde-display-atp-overlay.dts
Normal file
@@ -0,0 +1,16 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "sun-sde-display-mtp.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Sun ATP";
|
||||
compatible = "qcom,sun-atp", "qcom,sun", "qcom,sunp-atp", "qcom,sunp", "qcom,atp";
|
||||
qcom,msm-id = <618 0x10000>, <618 0x20000>;
|
||||
qcom,board-id = <0x10021 0>;
|
||||
};
|
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
@@ -10,7 +10,7 @@
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Sun CDP Kiwi WLAN";
|
||||
compatible = "qcom,sun-cdp", "qcom,sun", "qcom,cdp";
|
||||
qcom,msm-id = <618 0x10000>, <618 0x20000>;
|
||||
compatible = "qcom,sun-cdp", "qcom,sun", "qcom,sunp-cdp", "qcom,sunp", "qcom,cdp";
|
||||
qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
|
||||
qcom,board-id = <0x20001 0>;
|
||||
};
|
||||
|
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
#include "sun-sde-display.dtsi"
|
||||
@@ -67,6 +67,65 @@
|
||||
qcom,platform-sec-reset-gpio = <&tlmm 97 0>;
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_dsc_10b_cmd {
|
||||
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <10>;
|
||||
qcom,mdss-dsi-bl-max-level = <4095>;
|
||||
qcom,mdss-brightness-max-level = <8191>;
|
||||
qcom,mdss-dsi-bl-inverted-dbv;
|
||||
qcom,platform-reset-gpio = <&tlmm 98 0>;
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_dsc_10b_video {
|
||||
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <10>;
|
||||
qcom,mdss-dsi-bl-max-level = <4095>;
|
||||
qcom,mdss-brightness-max-level = <8191>;
|
||||
qcom,mdss-dsi-bl-inverted-dbv;
|
||||
qcom,platform-reset-gpio = <&tlmm 98 0>;
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_cmd_spr {
|
||||
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
||||
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <10>;
|
||||
qcom,mdss-dsi-bl-max-level = <4095>;
|
||||
qcom,mdss-brightness-max-level = <8191>;
|
||||
qcom,mdss-dsi-bl-inverted-dbv;
|
||||
qcom,platform-reset-gpio = <&tlmm 98 0>;
|
||||
qcom,platform-sec-reset-gpio = <&tlmm 97 0>;
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_qsync_cmd {
|
||||
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
||||
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <10>;
|
||||
qcom,mdss-dsi-bl-max-level = <4095>;
|
||||
qcom,mdss-brightness-max-level = <8191>;
|
||||
qcom,mdss-dsi-bl-inverted-dbv;
|
||||
qcom,platform-reset-gpio = <&tlmm 98 0>;
|
||||
qcom,platform-sec-reset-gpio = <&tlmm 97 0>;
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_qsync_video {
|
||||
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
||||
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <10>;
|
||||
qcom,mdss-dsi-bl-max-level = <4095>;
|
||||
qcom,mdss-brightness-max-level = <8191>;
|
||||
qcom,mdss-dsi-bl-inverted-dbv;
|
||||
qcom,platform-reset-gpio = <&tlmm 98 0>;
|
||||
qcom,platform-sec-reset-gpio = <&tlmm 97 0>;
|
||||
};
|
||||
|
||||
&dsi_vtdr6130_amoled_120hz_video {
|
||||
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
@@ -175,7 +234,12 @@
|
||||
panel = <&dsi_nt37801_amoled_cmd
|
||||
&dsi_nt37801_amoled_cmd_cphy
|
||||
&dsi_nt37801_amoled_video
|
||||
&dsi_nt37801_amoled_video_cphy>;
|
||||
&dsi_nt37801_amoled_dsc_10b_cmd
|
||||
&dsi_nt37801_amoled_dsc_10b_video
|
||||
&dsi_nt37801_amoled_video_cphy
|
||||
&dsi_nt37801_amoled_cmd_spr
|
||||
&dsi_nt37801_amoled_qsync_cmd
|
||||
&dsi_nt37801_amoled_qsync_video>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -185,6 +249,7 @@
|
||||
panel = <&dsi_nt37801_amoled_cmd
|
||||
&dsi_nt37801_amoled_cmd_cphy
|
||||
&dsi_nt37801_amoled_video
|
||||
&dsi_nt37801_amoled_video_cphy>;
|
||||
&dsi_nt37801_amoled_video_cphy
|
||||
&dsi_nt37801_amoled_cmd_spr>;
|
||||
};
|
||||
};
|
||||
|
@@ -7,6 +7,13 @@
|
||||
#include "dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi"
|
||||
#include "dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi"
|
||||
#include "dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi"
|
||||
#include "dsi-panel-nt37801-dsc-10bit-cmd.dtsi"
|
||||
#include "dsi-panel-nt37801-dsc-10bit-video.dtsi"
|
||||
#include "dsi-panel-nt37801-dsc-wqhd-plus-cmd-spr.dtsi"
|
||||
#include "dsi-panel-nt37801-qsync-dsc-wqhd-plus-cmd.dtsi"
|
||||
#include "dsi-panel-nt37801-qsync-dsc-wqhd-plus-cmd-cphy.dtsi"
|
||||
#include "dsi-panel-nt37801-qsync-dsc-wqhd-plus-video.dtsi"
|
||||
#include "dsi-panel-nt37801-qsync-dsc-wqhd-plus-video-cphy.dtsi"
|
||||
#include "dsi-panel-sharp-dsc-4k-cmd.dtsi"
|
||||
#include "dsi-panel-sharp-dsc-4k-video.dtsi"
|
||||
#include "dsi-panel-sim-cmd-au.dtsi"
|
||||
@@ -84,7 +91,7 @@
|
||||
qcom,supply-max-voltage = <1800000>;
|
||||
qcom,supply-enable-load = <0>;
|
||||
qcom,supply-disable-load = <0>;
|
||||
qcom,supply-post-on-sleep = <2000>;
|
||||
qcom,supply-post-on-sleep = <20>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -370,11 +377,57 @@
|
||||
qcom,display-topology = <2 2 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
|
||||
timing@2 {
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 1f 08 07 18 22 08
|
||||
08 08 08 02 04 1a 0d];
|
||||
qcom,display-topology = <2 2 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
|
||||
timing@3 {
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 16 05 05 14 1f 06
|
||||
06 06 06 02 04 13 0b];
|
||||
qcom,display-topology = <2 2 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
|
||||
timing@4 {
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 11 03 04 12 1e 04
|
||||
04 04 03 02 04 0e 09];
|
||||
qcom,display-topology = <2 2 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
|
||||
timing@5 {
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 0d 03 03 10 1d 03
|
||||
03 03 02 02 04 0c 08];
|
||||
qcom,display-topology = <2 2 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
|
||||
timing@6 {
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 0c 02 02 10 1c 03
|
||||
03 03 02 02 04 0b 08];
|
||||
qcom,display-topology = <2 2 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
|
||||
timing@7 {
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 0a 02 02 0f 1c 02
|
||||
02 02 02 02 04 0a 07];
|
||||
qcom,display-topology = <2 2 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_video_cphy {
|
||||
qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
|
||||
qcom,dsi-supported-dfps-list = <120 110 100 90 80>;
|
||||
qcom,mdss-dsi-pan-enable-dynamic-fps;
|
||||
qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp";
|
||||
|
||||
qcom,esd-check-enabled;
|
||||
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
|
||||
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
|
||||
@@ -408,10 +461,91 @@
|
||||
qcom,display-topology = <2 2 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
|
||||
timing@1 {
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 00 00 00 20 1c 06
|
||||
19 06 02 04 00 00 00];
|
||||
qcom,display-topology = <2 2 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
|
||||
timing@2 {
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 00 00 00 1e 17 03
|
||||
19 03 02 04 00 00 00];
|
||||
qcom,display-topology = <2 2 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_video {
|
||||
qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
|
||||
qcom,dsi-select-sec-clocks = "pll_byte_clk1", "pll_dsi_clk1";
|
||||
qcom,dsi-supported-dfps-list = <120 110 100 90 80>;
|
||||
qcom,mdss-dsi-pan-enable-dynamic-fps;
|
||||
qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp";
|
||||
|
||||
qcom,esd-check-enabled;
|
||||
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
|
||||
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
|
||||
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-panel-status-value = <0x9c>;
|
||||
qcom,mdss-dsi-panel-status-read-length = <1>;
|
||||
|
||||
qcom,mdss-dsi-display-timings {
|
||||
timing@0 {
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 28 0a 0b 1b 1a 0a
|
||||
0b 0a 02 04 00 21 0f];
|
||||
qcom,display-topology = <2 2 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_dsc_10b_cmd {
|
||||
qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
|
||||
qcom,dsi-select-sec-clocks = "pll_byte_clk1", "pll_dsi_clk1";
|
||||
qcom,esd-check-enabled;
|
||||
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
|
||||
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
|
||||
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-panel-status-value = <0x9c>;
|
||||
qcom,mdss-dsi-panel-status-read-length = <1>;
|
||||
|
||||
qcom,mdss-dsi-display-timings {
|
||||
timing@0 {
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 35 0d 0d 1f 1c 0d
|
||||
0e 0e 0c 02 04 2a 12];
|
||||
qcom,display-topology = <2 2 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_dsc_10b_video {
|
||||
qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
|
||||
qcom,dsi-supported-dfps-list = <120 110 100 90 80>;
|
||||
qcom,mdss-dsi-pan-enable-dynamic-fps;
|
||||
qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp";
|
||||
|
||||
qcom,esd-check-enabled;
|
||||
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
|
||||
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
|
||||
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-panel-status-value = <0x9c>;
|
||||
qcom,mdss-dsi-panel-status-read-length = <1>;
|
||||
|
||||
qcom,mdss-dsi-display-timings {
|
||||
timing@0 {
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 3e 0f 0f 22 1f 0f
|
||||
10 0e 02 04 00 30 14];
|
||||
qcom,display-topology = <2 2 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_cmd_spr {
|
||||
qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
|
||||
qcom,dsi-select-sec-clocks = "pll_byte_clk1", "pll_dsi_clk1";
|
||||
qcom,esd-check-enabled;
|
||||
@@ -431,6 +565,84 @@
|
||||
};
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_qsync_cmd {
|
||||
qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
|
||||
qcom,dsi-select-sec-clocks = "pll_byte_clk1", "pll_dsi_clk1";
|
||||
qcom,esd-check-enabled;
|
||||
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
|
||||
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
|
||||
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-panel-status-value = <0x9c>;
|
||||
qcom,mdss-dsi-panel-status-read-length = <1>;
|
||||
|
||||
qcom,mdss-dsi-display-timings {
|
||||
timing@0 {
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 28 0a 0b 1b 1a 0a
|
||||
0b 0a 02 04 00 21 0f];
|
||||
qcom,display-topology = <2 2 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_qsync_cmd_cphy {
|
||||
qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
|
||||
qcom,esd-check-enabled;
|
||||
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
|
||||
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
|
||||
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-panel-status-value = <0x9c>;
|
||||
qcom,mdss-dsi-panel-status-read-length = <1>;
|
||||
|
||||
qcom,mdss-dsi-display-timings {
|
||||
timing@0 {
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 00 00 00 23 22 08
|
||||
19 08 02 04 00 00 00];
|
||||
qcom,display-topology = <2 2 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_qsync_video {
|
||||
qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
|
||||
qcom,dsi-select-sec-clocks = "pll_byte_clk1", "pll_dsi_clk1";
|
||||
qcom,esd-check-enabled;
|
||||
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
|
||||
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
|
||||
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-panel-status-value = <0x9c>;
|
||||
qcom,mdss-dsi-panel-status-read-length = <1>;
|
||||
|
||||
qcom,mdss-dsi-display-timings {
|
||||
timing@0 {
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 28 0a 0b 1b 1a 0a
|
||||
0b 0a 02 04 00 21 0f];
|
||||
qcom,display-topology = <2 2 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_qsync_video_cphy {
|
||||
qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
|
||||
qcom,esd-check-enabled;
|
||||
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
|
||||
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
|
||||
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-panel-status-value = <0x9c>;
|
||||
qcom,mdss-dsi-panel-status-read-length = <1>;
|
||||
|
||||
qcom,mdss-dsi-display-timings {
|
||||
timing@0 {
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 00 00 00 25 25 08
|
||||
19 09 02 04 00 00 00];
|
||||
qcom,display-topology = <2 2 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dsi_sharp_4k_dsc_cmd {
|
||||
qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
|
||||
|
||||
|
16
display/sun-sde-display-mtp-3-5mm-overlay.dts
Normal file
16
display/sun-sde-display-mtp-3-5mm-overlay.dts
Normal file
@@ -0,0 +1,16 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "sun-sde-display-mtp.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Sun MTP with 3.5mm";
|
||||
compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", "qcom,mtp";
|
||||
qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
|
||||
qcom,board-id = <0x60008 0>;
|
||||
};
|
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
@@ -10,7 +10,7 @@
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Sun MTP Kiwi WLAN";
|
||||
compatible = "qcom,sun-mtp", "qcom,sun", "qcom,mtp";
|
||||
qcom,msm-id = <618 0x10000>, <618 0x20000>;
|
||||
compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", "qcom,mtp";
|
||||
qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
|
||||
qcom,board-id = <0x20008 0>;
|
||||
};
|
||||
|
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
@@ -10,7 +10,7 @@
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Sun MTP";
|
||||
compatible = "qcom,sun-mtp", "qcom,sun", "qcom,mtp";
|
||||
compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", "qcom,mtp";
|
||||
qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
|
||||
qcom,board-id = <8 0>;
|
||||
};
|
||||
|
16
display/sun-sde-display-mtp-qmp1000-overlay.dts
Normal file
16
display/sun-sde-display-mtp-qmp1000-overlay.dts
Normal file
@@ -0,0 +1,16 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "sun-sde-display-mtp.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Sun MTP QMP1000";
|
||||
compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", "qcom,mtp";
|
||||
qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
|
||||
qcom,board-id = <0x10108 0>;
|
||||
};
|
16
display/sun-sde-display-mtp-qmp1000-v8-overlay.dts
Normal file
16
display/sun-sde-display-mtp-qmp1000-v8-overlay.dts
Normal file
@@ -0,0 +1,16 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "sun-sde-display-mtp.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Sun MTP QMP1000 V8 Power Grid";
|
||||
compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", "qcom,mtp";
|
||||
qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
|
||||
qcom,board-id = <0x40108 0>;
|
||||
};
|
@@ -61,6 +61,56 @@
|
||||
qcom,platform-reset-gpio = <&tlmm 98 0>;
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_dsc_10b_cmd {
|
||||
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <10>;
|
||||
qcom,mdss-dsi-bl-max-level = <4095>;
|
||||
qcom,mdss-brightness-max-level = <8191>;
|
||||
qcom,mdss-dsi-bl-inverted-dbv;
|
||||
qcom,platform-reset-gpio = <&tlmm 98 0>;
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_dsc_10b_video {
|
||||
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <10>;
|
||||
qcom,mdss-dsi-bl-max-level = <4095>;
|
||||
qcom,mdss-brightness-max-level = <8191>;
|
||||
qcom,mdss-dsi-bl-inverted-dbv;
|
||||
qcom,platform-reset-gpio = <&tlmm 98 0>;
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_cmd_spr {
|
||||
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <10>;
|
||||
qcom,mdss-dsi-bl-max-level = <4095>;
|
||||
qcom,mdss-brightness-max-level = <8191>;
|
||||
qcom,mdss-dsi-bl-inverted-dbv;
|
||||
qcom,platform-reset-gpio = <&tlmm 98 0>;
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_qsync_cmd {
|
||||
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <10>;
|
||||
qcom,mdss-dsi-bl-max-level = <4095>;
|
||||
qcom,mdss-brightness-max-level = <8191>;
|
||||
qcom,mdss-dsi-bl-inverted-dbv;
|
||||
qcom,platform-reset-gpio = <&tlmm 98 0>;
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_qsync_video {
|
||||
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <10>;
|
||||
qcom,mdss-dsi-bl-max-level = <4095>;
|
||||
qcom,mdss-brightness-max-level = <8191>;
|
||||
qcom,mdss-dsi-bl-inverted-dbv;
|
||||
qcom,platform-reset-gpio = <&tlmm 98 0>;
|
||||
};
|
||||
|
||||
&dsi_vtdr6130_amoled_120hz_video {
|
||||
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
@@ -168,7 +218,12 @@
|
||||
panel = <&dsi_nt37801_amoled_cmd
|
||||
&dsi_nt37801_amoled_cmd_cphy
|
||||
&dsi_nt37801_amoled_video
|
||||
&dsi_nt37801_amoled_video_cphy>;
|
||||
&dsi_nt37801_amoled_video_cphy
|
||||
&dsi_nt37801_amoled_dsc_10b_cmd
|
||||
&dsi_nt37801_amoled_dsc_10b_video
|
||||
&dsi_nt37801_amoled_cmd_spr
|
||||
&dsi_nt37801_amoled_qsync_cmd
|
||||
&dsi_nt37801_amoled_qsync_video>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -176,5 +231,6 @@
|
||||
qcom,display-panels = <&dsi_nt37801_amoled_cmd
|
||||
&dsi_nt37801_amoled_cmd_cphy
|
||||
&dsi_nt37801_amoled_video
|
||||
&dsi_nt37801_amoled_video_cphy>;
|
||||
&dsi_nt37801_amoled_video_cphy
|
||||
&dsi_nt37801_amoled_cmd_spr>;
|
||||
};
|
||||
|
@@ -81,6 +81,26 @@
|
||||
qcom,platform-reset-gpio = <&tlmm 98 0>;
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_qsync_cmd_cphy {
|
||||
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <10>;
|
||||
qcom,mdss-dsi-bl-max-level = <4095>;
|
||||
qcom,mdss-brightness-max-level = <8191>;
|
||||
qcom,mdss-dsi-bl-inverted-dbv;
|
||||
qcom,platform-reset-gpio = <&tlmm 98 0>;
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_qsync_video_cphy {
|
||||
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <10>;
|
||||
qcom,mdss-dsi-bl-max-level = <4095>;
|
||||
qcom,mdss-brightness-max-level = <8191>;
|
||||
qcom,mdss-dsi-bl-inverted-dbv;
|
||||
qcom,platform-reset-gpio = <&tlmm 98 0>;
|
||||
};
|
||||
|
||||
&dsi_vtdr6130_amoled_120hz_video {
|
||||
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
@@ -188,7 +208,9 @@
|
||||
panel = <&dsi_nt37801_amoled_cmd_cphy
|
||||
&dsi_nt37801_amoled_video_cphy
|
||||
&dsi_nt37801_amoled_cmd
|
||||
&dsi_nt37801_amoled_video>;
|
||||
&dsi_nt37801_amoled_video
|
||||
&dsi_nt37801_amoled_qsync_cmd_cphy
|
||||
&dsi_nt37801_amoled_qsync_video_cphy>;
|
||||
};
|
||||
};
|
||||
|
||||
|
16
display/sun-sde-display-rcm-kiwi-overlay.dts
Normal file
16
display/sun-sde-display-rcm-kiwi-overlay.dts
Normal file
@@ -0,0 +1,16 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "sun-sde-display-rcm.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Sun RCM Kiwi WLAN";
|
||||
compatible = "qcom,sun-rcm", "qcom,sun", "qcom,sunp-rcm", "qcom,sunp", "qcom,rcm";
|
||||
qcom,msm-id = <618 0x10000>, <618 0x20000>;
|
||||
qcom,board-id = <0x40015 0>;
|
||||
};
|
16
display/sun-sde-display-rcm-kiwi-v8-overlay.dts
Normal file
16
display/sun-sde-display-rcm-kiwi-v8-overlay.dts
Normal file
@@ -0,0 +1,16 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "sun-sde-display-rcm.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Sun RCM Kiwi WLAN V8 Power Grid";
|
||||
compatible = "qcom,sun-rcm", "qcom,sun", "qcom,sunp-rcm", "qcom,sunp", "qcom,rcm";
|
||||
qcom,msm-id = <618 0x10000>, <618 0x20000>;
|
||||
qcom,board-id = <0x20015 0>;
|
||||
};
|
16
display/sun-sde-display-rcm-v8-overlay.dts
Normal file
16
display/sun-sde-display-rcm-v8-overlay.dts
Normal file
@@ -0,0 +1,16 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "sun-sde-display-rcm.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Sun RCM V8 Power Grid";
|
||||
compatible = "qcom,sun-rcm", "qcom,sun", "qcom,sunp-rcm", "qcom,sunp", "qcom,rcm";
|
||||
qcom,msm-id = <618 0x10000>, <618 0x20000>;
|
||||
qcom,board-id = <0x30015 0>;
|
||||
};
|
@@ -48,14 +48,14 @@
|
||||
};
|
||||
|
||||
disp_rdump_memory: disp_rdump_region@0xd5500000 {
|
||||
reg = <0xd5500000 0x00800000>;
|
||||
reg = <0xfc800000 0x00800000>;
|
||||
label = "disp_rdump_region";
|
||||
};
|
||||
};
|
||||
|
||||
&reserved_memory {
|
||||
splash_memory: splash_region {
|
||||
reg = <0x0 0xd5500000 0x0 0x02b00000>;
|
||||
reg = <0x0 0xfc800000 0x0 0x02b00000>;
|
||||
label = "cont_splash_region";
|
||||
};
|
||||
};
|
||||
@@ -155,12 +155,42 @@
|
||||
qcom,mdss-dsi-display-timings {
|
||||
timing@0 {
|
||||
qcom,partial-update-enabled = "single_roi";
|
||||
qcom,panel-roi-alignment = <720 40 40 40 720 40>;
|
||||
qcom,panel-roi-alignment = <0 0 720 40 1440 40>;
|
||||
};
|
||||
|
||||
timing@1 {
|
||||
qcom,partial-update-enabled = "single_roi";
|
||||
qcom,panel-roi-alignment = <540 40 40 40 540 40>;
|
||||
qcom,panel-roi-alignment = <0 0 540 40 1080 40>;
|
||||
};
|
||||
|
||||
timing@2 {
|
||||
qcom,partial-update-enabled = "single_roi";
|
||||
qcom,panel-roi-alignment = <0 0 720 40 1440 40>;
|
||||
};
|
||||
|
||||
timing@3 {
|
||||
qcom,partial-update-enabled = "single_roi";
|
||||
qcom,panel-roi-alignment = <0 0 720 40 1440 40>;
|
||||
};
|
||||
|
||||
timing@4 {
|
||||
qcom,partial-update-enabled = "single_roi";
|
||||
qcom,panel-roi-alignment = <0 0 720 40 1440 40>;
|
||||
};
|
||||
|
||||
timing@5 {
|
||||
qcom,partial-update-enabled = "single_roi";
|
||||
qcom,panel-roi-alignment = <0 0 720 40 1440 40>;
|
||||
};
|
||||
|
||||
timing@6 {
|
||||
qcom,partial-update-enabled = "single_roi";
|
||||
qcom,panel-roi-alignment = <0 0 720 40 1440 40>;
|
||||
};
|
||||
|
||||
timing@7 {
|
||||
qcom,partial-update-enabled = "single_roi";
|
||||
qcom,panel-roi-alignment = <0 0 720 40 1440 40>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -169,7 +199,17 @@
|
||||
qcom,mdss-dsi-display-timings {
|
||||
timing@0 {
|
||||
qcom,partial-update-enabled = "single_roi";
|
||||
qcom,panel-roi-alignment = <720 40 40 40 720 40>;
|
||||
qcom,panel-roi-alignment = <0 0 720 40 1440 40>;
|
||||
};
|
||||
|
||||
timing@1 {
|
||||
qcom,partial-update-enabled = "single_roi";
|
||||
qcom,panel-roi-alignment = <0 0 720 40 1440 40>;
|
||||
};
|
||||
|
||||
timing@2 {
|
||||
qcom,partial-update-enabled = "single_roi";
|
||||
qcom,panel-roi-alignment = <0 0 720 40 1440 40>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@@ -183,7 +183,8 @@
|
||||
|
||||
smmu_sde_iommu_region_partition: smmu_sde_iommu_region_partition {
|
||||
iommu-addresses = <&smmu_sde_unsec 0x0 0x00060000>,
|
||||
<&smmu_sde_unsec 0xd5500000 0x02b00000>,
|
||||
<&smmu_sde_unsec 0xd4e23000 0x002dd000>,
|
||||
<&smmu_sde_unsec 0xfc800000 0x02b00000>,
|
||||
<&smmu_sde_sec 0x0 0x00020000>;
|
||||
};
|
||||
|
||||
@@ -218,12 +219,17 @@
|
||||
"lut_clk";
|
||||
clock-rate = <0 0 575000000 575000000 19200000 575000000>;
|
||||
clock-max-rate = <0 0 575000000 575000000 19200000 575000000>;
|
||||
clock-mmrm = <0 0 0 DISP_CC_MDSS_MDP_CLK_SRC 0 0>;
|
||||
|
||||
qcom,hw-fence-sw-version = <0x1>;
|
||||
|
||||
vdd-supply = <&disp_cc_mdss_core_gdsc>;
|
||||
mmcx-supply = <&VDD_MMCX_LEVEL>;
|
||||
|
||||
qti,smmu-proxy-cb-id = <QTI_SMMU_PROXY_DISPLAY_CB>;
|
||||
|
||||
qcom,sde-soccp-controller = <&soccp_pas>;
|
||||
|
||||
qcom,sde-vm-exclude-reg-names = "ipcc_reg";
|
||||
|
||||
/* data and reg bus scale settings */
|
||||
|
@@ -54,6 +54,15 @@
|
||||
qcom,platform-reset-gpio = <&tlmm 98 0>;
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_cmd_spr {
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <10>;
|
||||
qcom,mdss-dsi-bl-max-level = <4095>;
|
||||
qcom,mdss-brightness-max-level = <8191>;
|
||||
qcom,mdss-dsi-bl-inverted-dbv;
|
||||
qcom,platform-reset-gpio = <&tlmm 98 0>;
|
||||
};
|
||||
|
||||
&dsi_vtdr6130_amoled_120hz_video {
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <10>;
|
||||
|
@@ -13,5 +13,5 @@
|
||||
model = "Qualcomm Technologies, Inc. Sun MTP - TrustedVM";
|
||||
compatible = "qcom,sun-mtp", "qcom,sun", "qcom,mtp";
|
||||
qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
|
||||
qcom,board-id = <8 0>;
|
||||
qcom,board-id = <8 0>, <0x40008 0>;
|
||||
};
|
||||
|
@@ -23,6 +23,15 @@
|
||||
qcom,platform-reset-gpio = <&tlmm 98 0>;
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_cmd_spr {
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <10>;
|
||||
qcom,mdss-dsi-bl-max-level = <4095>;
|
||||
qcom,mdss-brightness-max-level = <8191>;
|
||||
qcom,mdss-dsi-bl-inverted-dbv;
|
||||
qcom,platform-reset-gpio = <&tlmm 98 0>;
|
||||
};
|
||||
|
||||
&dsi_sim_panel_au {
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <10>;
|
||||
|
Reference in New Issue
Block a user