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arm64: dts: qcom: sun: Add devicetree files to opensource project

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dsp-devicetree files are currently a part of a proprietary project
and there is a requirement to move them to an opensource project.
This change adds the required files to opensource project with
the compilation disabled until the files are merged.

Change-Id: I9838c13afbcadec7c5a18bab1ccf867e32070cea
Signed-off-by: Anirudh Raghavendra <quic_araghave@quicinc.com>
This commit is contained in:
Anirudh Raghavendra
2024-01-26 16:59:41 -08:00
parent 6f17fc6154
commit 68b5b87364
10 changed files with 669 additions and 0 deletions
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10
sun/sun-dsp-trustedvm.dts Normal file
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/dts-v1/;
/plugin/;
#include "sun-dsp-trustedvm.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Sun - TrustedVM";
compatible = "qcom,sun";
qcom,msm-id = <618 0x10000>;
};

26
sun/sun-dsp-trustedvm.dtsi Normal file
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#include <dt-bindings/soc/qcom,ipcc.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
&soc {
fastrpc_compute_cb1: compute-cb@13 {
compatible = "qcom,fastrpc-compute-cb";
reg = <11>;
iommus = <&apps_smmu 0xC0B 0x0>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qrtr-gen-pool = <&fastrpc_compute_cb1>;
frpc-gen-addr-pool = <0x8000 0x9000>;
pd-type = <4>; /* SECURE_STATICPD */
};
qrtr-genpool {
compatible = "qcom,qrtr-genpool";
gen-pool = <&fastrpc_compute_cb1>;
interrupt-parent = <&ipcc_mproc_ns1>;
interrupts = <IPCC_CLIENT_CDSP 0 IRQ_TYPE_EDGE_RISING>,
<IPCC_CLIENT_CDSP 1 IRQ_TYPE_EDGE_RISING>;
mboxes = <&ipcc_mproc_ns1 IPCC_CLIENT_CDSP 0>,
<&ipcc_mproc_ns1 IPCC_CLIENT_CDSP 1>;
};
};

10
sun/sun-dsp.dts Normal file
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/dts-v1/;
/plugin/;
#include "sun-dsp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. sun v1 SoC";
compatible = "qcom,sun";
qcom,board-id = <0 0>;
};

248
sun/sun-dsp.dtsi Normal file
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&remoteproc_adsp_glink {
qcom,fastrpc {
compatible = "qcom,fastrpc";
qcom,glink-channels = "fastrpcglink-apps-dsp";
qcom,intents = <0x64 64>;
label = "adsp";
memory-region = <&adsp_mem_heap>;
qcom,vmids = <22 37>;
compute-cb@1 {
compatible = "qcom,fastrpc-compute-cb";
reg = <3>;
iommus = <&apps_smmu 0x1003 0x0080>,
<&apps_smmu 0x1043 0x0020>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <1>; /* ROOT_PD */
};
compute-cb@2 {
compatible = "qcom,fastrpc-compute-cb";
reg = <4>;
iommus = <&apps_smmu 0x1004 0x0080>,
<&apps_smmu 0x1044 0x0020>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
qcom,nsessions = <8>;
dma-coherent;
pd-type = <3>; /* SENSORS_STATICPD */
};
compute-cb@3 {
compatible = "qcom,fastrpc-compute-cb";
reg = <5>;
iommus = <&apps_smmu 0x1005 0x0080>,
<&apps_smmu 0x1045 0x0020>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <2>; /* AUDIO_STATICPD */
};
compute-cb@4 {
compatible = "qcom,fastrpc-compute-cb";
reg = <6>;
iommus = <&apps_smmu 0x1006 0x0080>,
<&apps_smmu 0x1046 0x0020>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <5>; /* OIS_STATICPD */
};
compute-cb@5 {
compatible = "qcom,fastrpc-compute-cb";
reg = <7>;
iommus = <&apps_smmu 0x1007 0x0040>,
<&apps_smmu 0x1067 0x0000>,
<&apps_smmu 0x1087 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <7>; /* USERPD */
};
compute-cb@6 {
compatible = "qcom,fastrpc-compute-cb";
reg = <8>;
iommus = <&apps_smmu 0x1008 0x0080>,
<&apps_smmu 0x1048 0x0020>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <7>; /* USERPD */
};
};
};
&remoteproc_cdsp_glink {
qcom,fastrpc {
compatible = "qcom,fastrpc";
qcom,glink-channels = "fastrpcglink-apps-dsp";
qcom,intents = <0x64 64>;
label = "cdsp";
qcom,fastrpc-gids = <2908>;
qcom,rpc-latency-us = <235>;
qcom,single-core-latency-vote;
compute-cb@1 {
compatible = "qcom,fastrpc-compute-cb";
reg = <1>;
iommus = <&apps_smmu 0x19C1 0x0000>,
<&apps_smmu 0x0C21 0x0000>,
<&apps_smmu 0x0C01 0x0040>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <1>; /* ROOT_PD */
};
compute-cb@2 {
compatible = "qcom,fastrpc-compute-cb";
reg = <2>;
iommus = <&apps_smmu 0x1962 0x0000>,
<&apps_smmu 0x0C02 0x0020>,
<&apps_smmu 0x0C42 0x0000>,
<&apps_smmu 0x19C2 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <7>; /* USERPD */
};
compute-cb@3 {
compatible = "qcom,fastrpc-compute-cb";
reg = <3>;
iommus = <&apps_smmu 0x1963 0x0000>,
<&apps_smmu 0x0C23 0x0000>,
<&apps_smmu 0x0C03 0x0040>,
<&apps_smmu 0x19C3 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <7>; /* USERPD */
};
compute-cb@4 {
compatible = "qcom,fastrpc-compute-cb";
reg = <4>;
iommus = <&apps_smmu 0x1964 0x0000>,
<&apps_smmu 0x0C24 0x0000>,
<&apps_smmu 0x0C04 0x0040>,
<&apps_smmu 0x19C4 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <7>; /* USERPD */
};
compute-cb@5 {
compatible = "qcom,fastrpc-compute-cb";
reg = <5>;
iommus = <&apps_smmu 0x1965 0x0000>,
<&apps_smmu 0x0C25 0x0000>,
<&apps_smmu 0x0C05 0x0040>,
<&apps_smmu 0x19C5 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <7>; /* USERPD */
};
compute-cb@6 {
compatible = "qcom,fastrpc-compute-cb";
reg = <6>;
iommus = <&apps_smmu 0x1966 0x0000>,
<&apps_smmu 0x0C06 0x0020>,
<&apps_smmu 0x0C46 0x0000>,
<&apps_smmu 0x19C6 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <7>; /* USERPD */
};
compute-cb@7 {
compatible = "qcom,fastrpc-compute-cb";
reg = <7>;
iommus = <&apps_smmu 0x1967 0x0000>,
<&apps_smmu 0x0C27 0x0000>,
<&apps_smmu 0x0C07 0x0040>,
<&apps_smmu 0x19C7 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <7>; /* USERPD */
};
compute-cb@8 {
compatible = "qcom,fastrpc-compute-cb";
reg = <8>;
iommus = <&apps_smmu 0x1968 0x0000>,
<&apps_smmu 0x0C08 0x0020>,
<&apps_smmu 0x0C48 0x0000>,
<&apps_smmu 0x19C8 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <7>; /* USERPD */
};
compute-cb@9 {
compatible = "qcom,fastrpc-compute-cb";
reg = <9>;
qcom,secure-context-bank;
iommus = <&apps_smmu 0x1969 0x0000>,
<&apps_smmu 0x0C29 0x0000>,
<&apps_smmu 0x0C09 0x0040>,
<&apps_smmu 0x19C9 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */
qcom,nsessions = <3>;
dma-coherent;
pd-type = <6>; /* CPZ_USERPD */
};
compute-cb@10 {
compatible = "qcom,fastrpc-compute-cb";
reg = <12>;
iommus = <&apps_smmu 0x196C 0x0000>,
<&apps_smmu 0x0C2C 0x0000>,
<&apps_smmu 0x0C0C 0x0040>,
<&apps_smmu 0x19CC 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <7>; /* USERPD */
};
compute-cb@11 {
compatible = "qcom,fastrpc-compute-cb";
reg = <13>;
iommus = <&apps_smmu 0x196D 0x0000>,
<&apps_smmu 0x0C0D 0x0020>,
<&apps_smmu 0x0C2E 0x0000>,
<&apps_smmu 0x0C4D 0x0000>,
<&apps_smmu 0x19CD 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <7>; /* USERPD */
};
compute-cb@12 {
compatible = "qcom,fastrpc-compute-cb";
reg = <14>;
iommus = <&apps_smmu 0x196E 0x0000>,
<&apps_smmu 0x0C0E 0x0040>,
<&apps_smmu 0x19CE 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <7>; /* USERPD */
};
};
};