diff --git a/Kbuild b/Kbuild new file mode 100644 index 00000000..199cee42 --- /dev/null +++ b/Kbuild @@ -0,0 +1,15 @@ +#ifeq ($(CONFIG_ARCH_SUN), y) +#ifeq ($(CONFIG_ARCH_QTI_VM), y) +#dtbo-y += sun-dsp-trustedvm.dtbo +#else +#dtbo-y += sun-dsp.dtbo +#endif +#endif + +#ifeq ($(CONFIG_ARCH_NIOBE), y) +#dtbo-y += niobe-dsp.dtbo +#endif + +always-y := $(dtb-y) $(dtbo-y) +subdir-y := $(dts-dirs) +clean-files := *.dtb *.dtbo diff --git a/Makefile b/Makefile new file mode 100644 index 00000000..b1e0dfe9 --- /dev/null +++ b/Makefile @@ -0,0 +1,9 @@ +KBUILD_OPTIONS+=KBUILD_EXTMOD_DTS=. + +all: dtbs + +clean: + $(MAKE) -C $(KERNEL_SRC) M=$(M) clean + +%: + $(MAKE) -C $(KERNEL_SRC) M=$(M) $@ $(KBUILD_OPTIONS) diff --git a/bindings/msm-cdsp-loader.txt b/bindings/msm-cdsp-loader.txt new file mode 100644 index 00000000..8e0d4f25 --- /dev/null +++ b/bindings/msm-cdsp-loader.txt @@ -0,0 +1,16 @@ +Qualcomm Technologies, Inc. CDSP Loader Driver + +msm-cdsp-loader driver implements a mechanism to load the Compute DSP firmware images. + +Required properties: + + - compatible: This must be "qcom,msm-cdsp-loader". + - qcom,proc-img-to-load: CDSP firmware name, must be "cdsp". + +Example: + The following is an example: + + qcom,msm-cdsp-loader { + compatible = "qcom,cdsp-loader"; + qcom,proc-img-to-load = "cdsp"; + }; diff --git a/bindings/msm-fastrpc.txt b/bindings/msm-fastrpc.txt new file mode 100644 index 00000000..d839212b --- /dev/null +++ b/bindings/msm-fastrpc.txt @@ -0,0 +1,100 @@ +Qualcomm Technologies, Inc. FastRPC Driver + +The MSM FastRPC driver implements an IPC (Inter-Processor Communication) +mechanism that allows for clients to transparently make remote method +invocations across DSP and APPS boundaries. This enables developers +to offload tasks to the DSP and free up the application processor for +other tasks. + +Required properties: +- compatible : Must be one of "qcom,msm-fastrpc-adsp" or "qcom,msm-fastrpc-compute" + +Optional properties: +- qcom,rpc-latency-us : FastRPC QoS latency vote +- qcom,adsp-remoteheap-vmid : FastRPC remote heap VMID list +- qcom,secure-context-bank : Bool indicating secure FastRPC context bank. +- qcom,fastrpc-legacy-remote-heap : Bool indicating hypervisor is not supported. +- qcom,fastrpc-adsp-audio-pdr : Flag to enable ADSP Audio PDR +- qcom,secure-domains : FastRPC secure domain configuration +- qcom,fastrpc-adsp-sensors-pdr : Flag to enable Sensors PDR + +Optional subnodes: +- qcom,msm_fastrpc_compute_cb : Child nodes representing the compute context banks +- qcom,msm-fastrpc-rpmsg : Child node for rpmsg instead of glink for IPC + +Subnode Required properties: +- compatible : Must be "qcom,msm-fastrpc-compute-cb" +- label : Label describing the channel this context bank belongs to +- iommus : A list of phandle and IOMMU specifier pairs that describe the + IOMMU master interfaces of the device +- dma-coherent : A flag marking a context bank as I/O coherent +- shared-cb : A value indicating how many fastrpc sessions can share a + context bank + +Example: + qcom,msm_fastrpc { + compatible = "qcom,msm-fastrpc-compute"; + qcom,fastrpc-rpmsg; + qcom,rpc-latency-us = <235>; + qcom,adsp-remoteheap-vmid = <22 37>; + qcom,fastrpc-adsp-sensors-pdr; + + qcom,msm_fastrpc_rpmsg { + compatible = "qcom,msm-fastrpc-rpmsg"; + qcom,glink-channels = "fastrpcglink-apps-dsp"; + intents = <0x64 64>; + }; + + qcom,msm_fastrpc_compute_cb_1 { + compatible = "qcom,msm-fastrpc-compute-cb"; + label = "cdsprpc-smd"; + qcom,secure-context-bank; + iommus = <&apps_smmu 0x1401 0x0>; + dma-coherent; + }; + qcom,msm_fastrpc_compute_cb_2 { + compatible = "qcom,msm-fastrpc-compute-cb"; + label = "sdsprpc-smd"; + iommus = <&apps_smmu 0x1402 0x0>; + shared-cb = <5>; + }; + }; + +Legacy SMMU v1/v2: + +Required properties: +- compatible : Must be "qcom,msm-fastprc-legacy-compute-cb" + +Required subnode: +- qcom,msm_fastrpc_compute_cb : Child nodes representing the compute context + banks + +Required subnode properties: +- qcom,adsp-shared-phandle : phandle that describe the context bank handle +- qcom,adsp-shared-sids : A list of SID associated with the context bank +- qcom,virtual-addr-pool : Virtual address range that the context bank + will be using + +Example: + qcom,adsprpc_domains { + compatible = "qcom,msm-fastrpc-legacy-compute-cb"; + qcom,msm_fastrpc_compute_cb { + qcom,adsp-shared-phandle = <&adsp_shared>; + qcom,adsp-shared-sids = <0x8 0x9>; + qcom,virtual-addr-pool = <0x80000000 0x7FFFFFFF>; + }; + }; + +Remote Heap: + +Required properties: +- compatible : Must be "qcom,msm-adsprpc-mem-region" +- memory-region : CMA region which is owned by this device +- restrict-access : Blocking vote for hyp_assign_phys function call + +Example: + qcom,adsprpc-mem { + compatible = "qcom,msm-adsprpc-mem-region"; + memory-region = <&adsp_mem>; + restrict-access; + }; diff --git a/niobe/niobe-dsp.dts b/niobe/niobe-dsp.dts new file mode 100644 index 00000000..43e3be92 --- /dev/null +++ b/niobe/niobe-dsp.dts @@ -0,0 +1,11 @@ +/dts-v1/; +/plugin/; + +#include "niobe-dsp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Niobe SoC"; + compatible = "qcom,niobe"; + qcom,msm-id = <629 0x10000>; + qcom,board-id = <0 0>; +}; diff --git a/niobe/niobe-dsp.dtsi b/niobe/niobe-dsp.dtsi new file mode 100644 index 00000000..f061ca4f --- /dev/null +++ b/niobe/niobe-dsp.dtsi @@ -0,0 +1,224 @@ +&remoteproc_adsp_glink { + qcom,fastrpc { + compatible = "qcom,fastrpc"; + qcom,glink-channels = "fastrpcglink-apps-dsp"; + qcom,intents = <0x64 64>; + label = "adsp"; + memory-region = <&adsp_mem_heap>; + qcom,vmids = <22 37>; + + compute-cb@1 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <3>; + iommus = <&apps_smmu 0x1003 0x0000>, + <&apps_smmu 0x1063 0x0000>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <1>; /* ROOT_PD */ + }; + + compute-cb@2 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <4>; + iommus = <&apps_smmu 0x1004 0x0000>, + <&apps_smmu 0x1064 0x0000>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <2>; /* AUDIO_STATICPD */ + }; + + compute-cb@3 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <5>; + iommus = <&apps_smmu 0x1005 0x0000>, + <&apps_smmu 0x1065 0x0000>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + qcom,nsessions = <8>; + dma-coherent; + pd-type = <3>; /* SENSORS_STATICPD */ + }; + + compute-cb@4 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <6>; + iommus = <&apps_smmu 0x1006 0x0000>, + <&apps_smmu 0x1066 0x0000>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <7>; /* USERPD */ + }; + + compute-cb@5 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <7>; + iommus = <&apps_smmu 0x1007 0x0000>, + <&apps_smmu 0x1067 0x0000>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <7>; /* USERPD */ + }; + }; +}; + +&remoteproc_cdsp_glink { + qcom,fastrpc { + compatible = "qcom,fastrpc"; + qcom,glink-channels = "fastrpcglink-apps-dsp"; + qcom,intents = <0x64 64>; + label = "cdsp"; + qcom,fastrpc-gids = <2908>; + qcom,rpc-latency-us = <235>; + + compute-cb@1 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <1>; + iommus = <&apps_smmu 0x0C01 0x0040>, + <&apps_smmu 0x0C21 0x0000>, + <&apps_smmu 0x0C41 0x0040>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <1>; /* ROOT_PD */ + }; + + compute-cb@2 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <2>; + iommus = <&apps_smmu 0x0C02 0x0040>, + <&apps_smmu 0x0C22 0x0000>, + <&apps_smmu 0x0C42 0x0040>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <7>; /* USERPD */ + }; + + compute-cb@3 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <3>; + iommus = <&apps_smmu 0x0C03 0x0040>, + <&apps_smmu 0x0C23 0x0000>, + <&apps_smmu 0x0C43 0x0040>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <7>; /* USERPD */ + }; + + compute-cb@4 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <4>; + iommus = <&apps_smmu 0x0C04 0x0040>, + <&apps_smmu 0x0C24 0x0000>, + <&apps_smmu 0x0C44 0x0040>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <7>; /* USERPD */ + }; + + compute-cb@5 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <5>; + iommus = <&apps_smmu 0x0C05 0x0040>, + <&apps_smmu 0x0C25 0x0000>, + <&apps_smmu 0x0C45 0x0040>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <7>; /* USERPD */ + }; + + compute-cb@6 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <6>; + iommus = <&apps_smmu 0x0C06 0x0040>, + <&apps_smmu 0x0C26 0x0000>, + <&apps_smmu 0x0C46 0x0040>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <7>; /* USERPD */ + }; + + compute-cb@7 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <7>; + iommus = <&apps_smmu 0x0C07 0x0040>, + <&apps_smmu 0x0C27 0x0000>, + <&apps_smmu 0x0C47 0x0040>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <7>; /* USERPD */ + }; + + compute-cb@8 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <8>; + iommus = <&apps_smmu 0x0C08 0x0040>, + <&apps_smmu 0x0C28 0x0000>, + <&apps_smmu 0x0C48 0x0040>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <7>; /* USERPD */ + }; + + compute-cb@9 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <9>; + qcom,secure-context-bank; + iommus = <&apps_smmu 0x0C09 0x0040>, + <&apps_smmu 0x0C29 0x0000>, + <&apps_smmu 0x0C49 0x0040>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */ + qcom,nsessions = <3>; + dma-coherent; + pd-type = <6>; /* CPZ_USERPD */ + }; + + compute-cb@10 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <12>; + iommus = <&apps_smmu 0x0C0C 0x0040>, + <&apps_smmu 0x0C2C 0x0000>, + <&apps_smmu 0x0C4C 0x0040>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <7>; /* USERPD */ + }; + + compute-cb@11 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <13>; + iommus = <&apps_smmu 0x0C0D 0x0040>, + <&apps_smmu 0x0C2D 0x0000>, + <&apps_smmu 0x0C4D 0x0040>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <7>; /* USERPD */ + }; + + compute-cb@12 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <14>; + iommus = <&apps_smmu 0x0C0E 0x0040>, + <&apps_smmu 0x0C2E 0x0000>, + <&apps_smmu 0x0C4E 0x0040>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <7>; /* USERPD */ + }; + }; +}; \ No newline at end of file diff --git a/sun/sun-dsp-trustedvm.dts b/sun/sun-dsp-trustedvm.dts new file mode 100644 index 00000000..3304725f --- /dev/null +++ b/sun/sun-dsp-trustedvm.dts @@ -0,0 +1,10 @@ +/dts-v1/; +/plugin/; + +#include "sun-dsp-trustedvm.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun - TrustedVM"; + compatible = "qcom,sun"; + qcom,msm-id = <618 0x10000>; +}; diff --git a/sun/sun-dsp-trustedvm.dtsi b/sun/sun-dsp-trustedvm.dtsi new file mode 100644 index 00000000..6f78bdf2 --- /dev/null +++ b/sun/sun-dsp-trustedvm.dtsi @@ -0,0 +1,26 @@ +#include +#include + +&soc { + fastrpc_compute_cb1: compute-cb@13 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <11>; + iommus = <&apps_smmu 0xC0B 0x0>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + qrtr-gen-pool = <&fastrpc_compute_cb1>; + frpc-gen-addr-pool = <0x8000 0x9000>; + pd-type = <4>; /* SECURE_STATICPD */ + }; + + qrtr-genpool { + compatible = "qcom,qrtr-genpool"; + gen-pool = <&fastrpc_compute_cb1>; + interrupt-parent = <&ipcc_mproc_ns1>; + interrupts = , + ; + mboxes = <&ipcc_mproc_ns1 IPCC_CLIENT_CDSP 0>, + <&ipcc_mproc_ns1 IPCC_CLIENT_CDSP 1>; + }; +}; diff --git a/sun/sun-dsp.dts b/sun/sun-dsp.dts new file mode 100644 index 00000000..21b53118 --- /dev/null +++ b/sun/sun-dsp.dts @@ -0,0 +1,10 @@ +/dts-v1/; +/plugin/; + +#include "sun-dsp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. sun v1 SoC"; + compatible = "qcom,sun"; + qcom,board-id = <0 0>; +}; diff --git a/sun/sun-dsp.dtsi b/sun/sun-dsp.dtsi new file mode 100644 index 00000000..53bbbac2 --- /dev/null +++ b/sun/sun-dsp.dtsi @@ -0,0 +1,248 @@ +&remoteproc_adsp_glink { + qcom,fastrpc { + compatible = "qcom,fastrpc"; + qcom,glink-channels = "fastrpcglink-apps-dsp"; + qcom,intents = <0x64 64>; + label = "adsp"; + memory-region = <&adsp_mem_heap>; + qcom,vmids = <22 37>; + + compute-cb@1 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <3>; + iommus = <&apps_smmu 0x1003 0x0080>, + <&apps_smmu 0x1043 0x0020>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <1>; /* ROOT_PD */ + }; + + compute-cb@2 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <4>; + iommus = <&apps_smmu 0x1004 0x0080>, + <&apps_smmu 0x1044 0x0020>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + qcom,nsessions = <8>; + dma-coherent; + pd-type = <3>; /* SENSORS_STATICPD */ + }; + + compute-cb@3 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <5>; + iommus = <&apps_smmu 0x1005 0x0080>, + <&apps_smmu 0x1045 0x0020>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <2>; /* AUDIO_STATICPD */ + }; + + compute-cb@4 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <6>; + iommus = <&apps_smmu 0x1006 0x0080>, + <&apps_smmu 0x1046 0x0020>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <5>; /* OIS_STATICPD */ + }; + + compute-cb@5 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <7>; + iommus = <&apps_smmu 0x1007 0x0040>, + <&apps_smmu 0x1067 0x0000>, + <&apps_smmu 0x1087 0x0000>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <7>; /* USERPD */ + }; + + compute-cb@6 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <8>; + iommus = <&apps_smmu 0x1008 0x0080>, + <&apps_smmu 0x1048 0x0020>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <7>; /* USERPD */ + }; + }; +}; + +&remoteproc_cdsp_glink { + qcom,fastrpc { + compatible = "qcom,fastrpc"; + qcom,glink-channels = "fastrpcglink-apps-dsp"; + qcom,intents = <0x64 64>; + label = "cdsp"; + qcom,fastrpc-gids = <2908>; + qcom,rpc-latency-us = <235>; + qcom,single-core-latency-vote; + + compute-cb@1 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <1>; + iommus = <&apps_smmu 0x19C1 0x0000>, + <&apps_smmu 0x0C21 0x0000>, + <&apps_smmu 0x0C01 0x0040>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <1>; /* ROOT_PD */ + }; + + compute-cb@2 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <2>; + iommus = <&apps_smmu 0x1962 0x0000>, + <&apps_smmu 0x0C02 0x0020>, + <&apps_smmu 0x0C42 0x0000>, + <&apps_smmu 0x19C2 0x0000>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <7>; /* USERPD */ + }; + + compute-cb@3 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <3>; + iommus = <&apps_smmu 0x1963 0x0000>, + <&apps_smmu 0x0C23 0x0000>, + <&apps_smmu 0x0C03 0x0040>, + <&apps_smmu 0x19C3 0x0000>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <7>; /* USERPD */ + }; + + compute-cb@4 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <4>; + iommus = <&apps_smmu 0x1964 0x0000>, + <&apps_smmu 0x0C24 0x0000>, + <&apps_smmu 0x0C04 0x0040>, + <&apps_smmu 0x19C4 0x0000>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <7>; /* USERPD */ + }; + + compute-cb@5 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <5>; + iommus = <&apps_smmu 0x1965 0x0000>, + <&apps_smmu 0x0C25 0x0000>, + <&apps_smmu 0x0C05 0x0040>, + <&apps_smmu 0x19C5 0x0000>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <7>; /* USERPD */ + }; + + compute-cb@6 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <6>; + iommus = <&apps_smmu 0x1966 0x0000>, + <&apps_smmu 0x0C06 0x0020>, + <&apps_smmu 0x0C46 0x0000>, + <&apps_smmu 0x19C6 0x0000>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <7>; /* USERPD */ + }; + + compute-cb@7 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <7>; + iommus = <&apps_smmu 0x1967 0x0000>, + <&apps_smmu 0x0C27 0x0000>, + <&apps_smmu 0x0C07 0x0040>, + <&apps_smmu 0x19C7 0x0000>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <7>; /* USERPD */ + }; + + compute-cb@8 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <8>; + iommus = <&apps_smmu 0x1968 0x0000>, + <&apps_smmu 0x0C08 0x0020>, + <&apps_smmu 0x0C48 0x0000>, + <&apps_smmu 0x19C8 0x0000>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <7>; /* USERPD */ + }; + + compute-cb@9 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <9>; + qcom,secure-context-bank; + iommus = <&apps_smmu 0x1969 0x0000>, + <&apps_smmu 0x0C29 0x0000>, + <&apps_smmu 0x0C09 0x0040>, + <&apps_smmu 0x19C9 0x0000>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */ + qcom,nsessions = <3>; + dma-coherent; + pd-type = <6>; /* CPZ_USERPD */ + }; + + compute-cb@10 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <12>; + iommus = <&apps_smmu 0x196C 0x0000>, + <&apps_smmu 0x0C2C 0x0000>, + <&apps_smmu 0x0C0C 0x0040>, + <&apps_smmu 0x19CC 0x0000>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <7>; /* USERPD */ + }; + + compute-cb@11 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <13>; + iommus = <&apps_smmu 0x196D 0x0000>, + <&apps_smmu 0x0C0D 0x0020>, + <&apps_smmu 0x0C2E 0x0000>, + <&apps_smmu 0x0C4D 0x0000>, + <&apps_smmu 0x19CD 0x0000>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <7>; /* USERPD */ + }; + + compute-cb@12 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <14>; + iommus = <&apps_smmu 0x196E 0x0000>, + <&apps_smmu 0x0C0E 0x0040>, + <&apps_smmu 0x19CE 0x0000>; + qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <7>; /* USERPD */ + }; + }; +}; \ No newline at end of file