ARM: dts: msm: add disp_cc vote for all components

Sync state will remove the disp_cc device vote once the device
driver probe is complete. It removes the DSI clock vote early
for continuous splash usecase because DSI driver takes its vote
in component binding instead of device driver probe.

It is better to keep disp_cc vote for components till respective
device probe complete and they register themselves to master
component. This change adds disp_cc vote for smmu_sde_unsec,
smmu_sde_sec, sde_wb1 and sde_wb2 devices to retain vote till
bind_all API is called.

Change-Id: Ie6e39cb53c4fdd93a1ce7d07a0fc99a250235902
Signed-off-by: Lei Chen <quic_chenlei@quicinc.com>
This commit is contained in:
Lei Chen
2024-07-29 20:55:23 +08:00
committed by Linux Display Service Account
parent 304733efa4
commit 60fb428708
2 changed files with 8 additions and 0 deletions

View File

@@ -24,12 +24,16 @@
compatible = "qcom,wb-display"; compatible = "qcom,wb-display";
cell-index = <0>; cell-index = <0>;
label = "wb_display1"; label = "wb_display1";
clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>;
clock-names = "mdp_core_clk";
}; };
sde_wb2: qcom,wb-display@2 { sde_wb2: qcom,wb-display@2 {
compatible = "qcom,wb-display"; compatible = "qcom,wb-display";
cell-index = <1>; cell-index = <1>;
label = "wb_display2"; label = "wb_display2";
clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>;
clock-names = "mdp_core_clk";
}; };

View File

@@ -197,6 +197,8 @@
qcom,iommu-faults = "non-fatal"; qcom,iommu-faults = "non-fatal";
qcom,iommu-earlymap; /* for cont-splash */ qcom,iommu-earlymap; /* for cont-splash */
dma-coherent; dma-coherent;
clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>;
clock-names = "mdp_core_clk";
}; };
smmu_sde_sec: qcom,smmu_sde_sec_cb { smmu_sde_sec: qcom,smmu_sde_sec_cb {
@@ -205,6 +207,8 @@
memory-region = <&smmu_sde_iommu_region_partition>; memory-region = <&smmu_sde_iommu_region_partition>;
qcom,iommu-faults = "non-fatal"; qcom,iommu-faults = "non-fatal";
qcom,iommu-vmid = <0xa>; qcom,iommu-vmid = <0xa>;
clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>;
clock-names = "mdp_core_clk";
}; };
sde_cesta: qcom,sde_cesta@0x0af30000 { sde_cesta: qcom,sde_cesta@0x0af30000 {