diff --git a/display/sun-sde-display.dtsi b/display/sun-sde-display.dtsi
index 03774135..a1a671ef 100644
--- a/display/sun-sde-display.dtsi
+++ b/display/sun-sde-display.dtsi
@@ -24,12 +24,16 @@
 		compatible = "qcom,wb-display";
 		cell-index = <0>;
 		label = "wb_display1";
+		clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>;
+		clock-names = "mdp_core_clk";
 	};
 
 	sde_wb2: qcom,wb-display@2 {
 		compatible = "qcom,wb-display";
 		cell-index = <1>;
 		label = "wb_display2";
+		clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>;
+		clock-names = "mdp_core_clk";
 	};
 
 
diff --git a/display/sun-sde.dtsi b/display/sun-sde.dtsi
index 3c3f1462..29503362 100644
--- a/display/sun-sde.dtsi
+++ b/display/sun-sde.dtsi
@@ -197,6 +197,8 @@
 		qcom,iommu-faults = "non-fatal";
 		qcom,iommu-earlymap; /* for cont-splash */
 		dma-coherent;
+		clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>;
+		clock-names = "mdp_core_clk";
 	};
 
 	smmu_sde_sec: qcom,smmu_sde_sec_cb {
@@ -205,6 +207,8 @@
 		memory-region = <&smmu_sde_iommu_region_partition>;
 		qcom,iommu-faults = "non-fatal";
 		qcom,iommu-vmid = <0xa>;
+		clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>;
+		clock-names = "mdp_core_clk";
 	};
 
 	sde_cesta: qcom,sde_cesta@0x0af30000 {