Merge "ARM: dts: msm: Add llcc perfmon node for tuna SOC"

This commit is contained in:
QCTECMDR Service
2024-10-17 23:33:02 -07:00
committed by Gerrit - the friendly Code Review server

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@@ -20,6 +20,8 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/spmi/spmi.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h>
#include <dt-bindings/power/qcom-aoss-qmp.h>
#include <dt-bindings/clock/qcom,aop-qmp.h>
/ {
model = "Qualcomm Technologies, Inc. Tuna";
@@ -655,6 +657,12 @@
interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
cap-based-alloc-and-pwr-collapse;
llcc_perfmon {
compatible = "qcom,llcc-perfmon";
clocks = <&aoss_qmp QDSS_CLK>;
clock-names = "qdss_clk";
};
};
gic-interrupt-router {