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ARM: dts: msm: Add ipcc_mproc_ns1 for kera TUIVM

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Add ipcc_mproc_n1 device tree node and entries to enable IPCC and mbox
communication between TUIVM and CDSP SecurePD on kera TUIVM.

Change-Id: Ib06f11a0a8e218af0cd94288531f9789de9630d9
Signed-off-by: Pranav Mahesh Phansalkar <quic_pphansal@quicinc.com>
This commit is contained in:
Pranav Mahesh Phansalkar
2024-12-01 22:11:38 +05:30
committed by Pranav Phansalkar
parent 19fbf066ae
commit 58d15eeee5
1 changed files with 11 additions and 1 deletions
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12
qcom/kera-vm.dtsi
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@@ -96,7 +96,8 @@
vm-attrs = "context-dump", "crash-restart"; vm-attrs = "context-dump", "crash-restart";
iomemory-ranges = <0x0 0xa24000 0x0 0xa24000 0x0 0x4000 0x0 iomemory-ranges = <0x0 0xa24000 0x0 0xa24000 0x0 0x4000 0x0
0x0 0x824000 0x0 0x824000 0x0 0x4000 0x0>; 0x0 0x824000 0x0 0x824000 0x0 0x4000 0x0
0x0 0x407000 0x0 0x407000 0x0 0x1000 0x0>;
/* For LEVM por usecases is QUP1_SE4 and QUP2_SE7. /* For LEVM por usecases is QUP1_SE4 and QUP2_SE7.
* QUP1_SE4: GPII5 : IRQ_316 * QUP1_SE4: GPII5 : IRQ_316
@@ -405,6 +406,15 @@
method = "smc"; method = "smc";
}; };
ipcc_mproc_ns1: qcom,ipcc@407000 {
compatible = "qcom,ipcc";
reg = <0x407000 0x1000>;
interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <3>;
#mbox-cells = <2>;
};
vgic: interrupt-controller@17100000 { vgic: interrupt-controller@17100000 {
compatible = "arm,gic-v3"; compatible = "arm,gic-v3";
interrupt-controller; interrupt-controller;