ARM: dts: msm: Add a node for cpufreq cycle counter driver

Add cpufreq cycle counter register information to devicetree in a
separate node for use by associated driver.

Change-Id: Idadbf45cfaf1fec6ee9187d28f6b939fceb76bd0
Signed-off-by: Swetha Chikkaboraiah <quic_schikk@quicinc.com>
This commit is contained in:
Swetha Chikkaboraiah
2024-04-17 14:36:31 +05:30
parent 58683657d9
commit 559f423dfd
2 changed files with 21 additions and 0 deletions

20
qcom/parrot-walt.dtsi Normal file
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@@ -0,0 +1,20 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
&soc {
walt {
#address-cells = <1>;
#size-cells = <1>;
ranges;
qcom,cycle-cntr {
compatible = "qcom,epss";
reg = <0x17D91000 0x1000>,
<0x17D92000 0x1000>;
reg-names = "freq-domain0",
"freq-domain1";
};
};
};

View File

@@ -2839,6 +2839,7 @@
#include "parrot-qupv3.dtsi" #include "parrot-qupv3.dtsi"
#include "parrot-dma-heaps.dtsi" #include "parrot-dma-heaps.dtsi"
#include "msm-arm-smmu-parrot.dtsi" #include "msm-arm-smmu-parrot.dtsi"
#include "parrot-walt.dtsi"
&qupv3_se3_2uart { &qupv3_se3_2uart {
status = "ok"; status = "ok";