From 559f423dfd270f936fe3d9903412385e05fee745 Mon Sep 17 00:00:00 2001
From: Swetha Chikkaboraiah <quic_schikk@quicinc.com>
Date: Wed, 17 Apr 2024 14:36:31 +0530
Subject: [PATCH] ARM: dts: msm: Add a node for cpufreq cycle counter driver

Add cpufreq cycle counter register information to devicetree in a
separate node for use by associated driver.

Change-Id: Idadbf45cfaf1fec6ee9187d28f6b939fceb76bd0
Signed-off-by: Swetha Chikkaboraiah <quic_schikk@quicinc.com>
---
 qcom/parrot-walt.dtsi | 20 ++++++++++++++++++++
 qcom/parrot.dtsi      |  1 +
 2 files changed, 21 insertions(+)
 create mode 100644 qcom/parrot-walt.dtsi

diff --git a/qcom/parrot-walt.dtsi b/qcom/parrot-walt.dtsi
new file mode 100644
index 00000000..e6756b88
--- /dev/null
+++ b/qcom/parrot-walt.dtsi
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&soc {
+	walt {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		qcom,cycle-cntr {
+			compatible = "qcom,epss";
+			reg = <0x17D91000 0x1000>,
+				<0x17D92000 0x1000>;
+			reg-names = "freq-domain0",
+				"freq-domain1";
+		};
+	};
+};
diff --git a/qcom/parrot.dtsi b/qcom/parrot.dtsi
index 2c9b4bd1..bd76eb9f 100644
--- a/qcom/parrot.dtsi
+++ b/qcom/parrot.dtsi
@@ -2839,6 +2839,7 @@
 #include "parrot-qupv3.dtsi"
 #include "parrot-dma-heaps.dtsi"
 #include "msm-arm-smmu-parrot.dtsi"
+#include "parrot-walt.dtsi"
 
 &qupv3_se3_2uart {
 	status = "ok";