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ARM: dts: msm: add disp_cc io and ctl hyp DT property

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To enable and disable mdp clock gating functionality with
cesta immediate vote approach, add disp_cc_io memory to
sde cesta. Add ctl hyp DT property for reserve reservation
on a datapath used in VM.

Change-Id: I4c1b900dfb5e1a7d725aea80b4519bc1f9472e03
Signed-off-by: Sampurna Bolloju <quic_sampboll@quicinc.com>
This commit is contained in:
Sampurna Bolloju
2025-02-11 14:51:22 +05:30
committed by Sailesh Reddy Male
parent d56825f5c4
commit 54b12f3ac1
2 changed files with 8 additions and 3 deletions
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5
display/tuna-sde-common.dtsi
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@@ -1,6 +1,6 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -31,6 +31,9 @@
qcom,sde-off = <0x1000>;
qcom,sde-len = <0x488>;
qcom,sde-ctl-hyp-off = <0x15000>;
qcom,sde-ctl-hyp-size = <0xc00>;
qcom,sde-ctl-off = <0x16000 0x17000 0x18000 0x19000>;
qcom,sde-ctl-size = <0x1000>;
qcom,sde-ctl-display-pref = "primary", "none", "none", "none";

6
display/tuna-sde.dtsi
View File

@@ -218,8 +218,10 @@
<0xaf33000 0x30>,
<0xaf34000 0x30>,
<0xaf35000 0x30>,
<0xaf36000 0x30>;
reg-names = "rscc", "wrapper", "scc_0", "scc_1", "scc_2", "scc_3", "scc_4", "scc_5";
<0xaf36000 0x30>,
<0xaf0f000 0x10>;
reg-names = "rscc", "wrapper", "scc_0", "scc_1", "scc_2", "scc_3", "scc_4", "scc_5",
"disp_cc";
clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>,
<&dispcc DISP_CC_MDSS_MDP_CLK_SRC>,