samsung_sm8750/android_kernel_samsung_sm8750-devicetrees
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

bindings: pinctrl: Add device-tree bindings for Ravelin pinctrl driver

Browse Source 
Add documentation describing the device-tree properties for the Ravelin
pinctrl driver.

Change-Id: Iedc4f70d5aa8b387d9fbe99753438ba322106b2b
Signed-off-by: Yue Liu <quic_yueliu@quicinc.com>
Signed-off-by: Swetha Chikkaboraiah <quic_schikk@quicinc.com>
This commit is contained in:
Yue Liu
2022-05-13 14:57:18 +08:00
committed by Swetha Chikkaboraiah
parent 6551f93dd2
commit 4d0ca60906
1 changed files with 168 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

168
bindings/pinctrl/qcom,ravelin-tlmm.yaml Normal file
View File

@@ -0,0 +1,168 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/qcom,ravelin-tlmm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Technologies, Inc. RAVELIN TLMM block
maintainers:
- Yue Liu <quic_yueliu@quicinc.com>
description: |
This binding describes the Top Level Mode Multiplexer block found in the
RAVELIN platform.
allOf:
- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
properties:
compatible:
const: "qcom,ravelin-tlmm"
reg:
maxItems: 1
interrupts: true
interrupt-controller: true
'#interrupt-cells': true
gpio-controller: true
gpio-reserved-ranges:
minItems: 1
maxItems: 105
gpio-line-names:
maxItems: 135
'#gpio-cells': true
gpio-ranges: true
wakeup-parent: true
required:
- compatible
- reg
additionalProperties: false
# PIN CONFIGURATION NODES:
patternProperties:
'-state$':
oneOf:
- $ref: "#/$defs/qcom-ravelin-tlmm-state"
- patternProperties:
"-pins$":
$ref: "#/$defs/qcom-ravelin-tlmm-state"
additionalProperties: false
$defs:
qcom-ravelin-tlmm-state:
type: object
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
properties:
pins:
description:
List of gpio pins affected by the properties specified in
this subnode.
items:
oneOf:
- pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-9])"
- enum: [ ufs_reset, sdc2_clk, sdc2_cmd, sdc2_data ]
minItems: 1
maxItems: 36
function:
description:
Specify the alternative function to be configured for the
specified pins. Functions are only valid for gpio pins.
enum: [ atest_char_start, atest_char_status0, atest_char_status1,
atest_char_status2, atest_char_status3, atest_usb0_atereset,
atest_usb0_testdataout00, atest_usb0_testdataout01,
atest_usb0_testdataout02, atest_usb0_testdataout03,
audio_ref_clk, cam_mclk, cci_async_in0, cci_i2c_scl0,
cci_i2c_scl1, cci_i2c_scl2, cci_i2c_sda0, cci_i2c_sda1,
cci_i2c_sda2, cci_timer0, cci_timer1, cci_timer2,
cci_timer3, cmu_rng_entropy0, cmu_rng_entropy1,
cmu_rng_entropy2, cmu_rng_entropy3, coex_uart1_rx,
coex_uart1_tx, cri_trng_rosc, cri_trng_rosc0, cri_trng_rosc1,
dbg_out_clk, ddr_bist_complete, ddr_bist_fail, ddr_bist_start,
ddr_bist_stop, ddr_pxi0_test, ddr_pxi1_test, gcc_gp1_clk,
gcc_gp2_clk, gcc_gp3_clk, gpio, host2wlan_sol, ibi_i3c_qup0,
ibi_i3c_qup1, jitter_bist_ref, mdp_vsync_e, mdp_vsync_p,
mdp_vsync_s, mdp_vsync0_out, mdp_vsync1_out, mdp_vsync2_out,
mdp_vsync3_out, nav_gpio0, nav_gpio1, nav_gpio2, pcie0_clk_req,
phase_flag_status0, phase_flag_status1, phase_flag_status10,
phase_flag_status11, phase_flag_status12, phase_flag_status13,
phase_flag_status14, phase_flag_status15, phase_flag_status16,
phase_flag_status17, phase_flag_status18, phase_flag_status19,
phase_flag_status2, phase_flag_status20, phase_flag_status21,
phase_flag_status22, phase_flag_status23, phase_flag_status24,
phase_flag_status25, phase_flag_status26, phase_flag_status27,
phase_flag_status28, phase_flag_status29, phase_flag_status3,
phase_flag_status30, phase_flag_status31, phase_flag_status4,
phase_flag_status5, phase_flag_status6, phase_flag_status7,
phase_flag_status8, phase_flag_status9, pll_bist_sync,
pll_clk_aux, prng_rosc_test0, prng_rosc_test1, prng_rosc_test2,
prng_rosc_test3, qdss_cti_trig0, qdss_cti_trig1,
qdss_gpio_traceclk, qdss_gpio_tracectl, qdss_gpio_tracedata0,
qdss_gpio_tracedata1, qdss_gpio_tracedata10, qdss_gpio_tracedata11,
qdss_gpio_tracedata12, qdss_gpio_tracedata13, qdss_gpio_tracedata14,
qdss_gpio_tracedata15, qdss_gpio_tracedata2, qdss_gpio_tracedata3,
qdss_gpio_tracedata4, qdss_gpio_tracedata5, qdss_gpio_tracedata6,
qdss_gpio_tracedata7, qdss_gpio_tracedata8, qdss_gpio_tracedata9,
qlink0_enable, qlink0_request, qlink0_wmss_reset, qup0_se0_l0,
qup0_se0_l1, qup0_se0_l2, qup0_se0_l3, qup0_se1_l0, qup0_se1_l1,
qup0_se1_l2, qup0_se1_l3, qup0_se2_l0, qup0_se2_l1, qup0_se2_l2,
qup0_se2_l3, qup0_se3_l0, qup0_se3_l1, qup0_se3_l2, qup0_se3_l3,
qup0_se4_l0, qup0_se4_l1, qup0_se4_l2, qup0_se4_l3, qup0_se4_l4,
qup1_se0_l0, qup1_se0_l1, qup1_se0_l2, qup1_se0_l3, qup1_se1_l0,
qup1_se1_l1, qup1_se1_l2, qup1_se1_l3, qup1_se2_l0, qup1_se2_l1,
qup1_se2_l2, qup1_se2_l3, qup1_se3_l0, qup1_se3_l1, qup1_se3_l2,
qup1_se3_l3, qup1_se4_l0, qup1_se4_l1, qup1_se4_l2, qup1_se4_l3,
qup1_se4_l4, sd_write_protect, tb_trig_sdc1, tb_trig_sdc2,
tgu_ch0_trigout, tgu_ch1_trigout, tgu_ch2_trigout,
tgu_ch3_trigout, tmess_prng_rosc0, tmess_prng_rosc1,
tmess_prng_rosc2, tmess_prng_rosc3, tsense_pwm1_out,
tsense_pwm2_out, uim0_clk, uim0_data, uim0_present, uim0_reset,
uim1_clk, uim1_data, uim1_present, uim1_reset, usb0_hs_ac,
usb0_phy_ps, vfr_0_mira, vfr_0_mirb, vfr_1,
vsense_trigger_mirnat, wlan1_adc_dtest0, wlan1_adc_dtest1]
bias-disable: true
bias-pull-down: true
bias-pull-up: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
allOf:
- $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
- if:
properties:
pins:
pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-9])$"
then:
required:
- function
additionalProperties: false
examples:
- |
tlmm: pinctrl@f000000 {
compatible = "qcom,ravelin-tlmm";
reg = <0x0F000000 0x1000000>;
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};