Merge remote-tracking branch 'quic/display-kernel-dev.lnx.1.0' into display-kernel.lnx.11.0
CRs SHA_ID Commit Message ---------------------------------------------------------------------- 3745717 I94cfc215 ARM: dts: msm: add CSOT with SPR config 3744272,3738786 Iafdbe002 ARM: dts: msm: update partial update roi for csot panel 3739912 I7c82b55e ARM: dts: msm: add NT37801 10 bits video mode panel support 3707570 Ie3a71c6a ARM: dts: msm: updates demura version and size 3738151 I88eb0860 ARM: dts: msm: introduce disp cc memory region CRs-Included: 3707570,3745717,3744272,3738786,3739912,3738151 . Change-Id: I7c80b49c99abe628d5bda1ecb54ade3a999ecf29 Signed-off-by: Linux Display <lnxdisplay@localhost>
This commit is contained in:
118
display/dsi-panel-nt37801-dsc-10bit-video.dtsi
Normal file
118
display/dsi-panel-nt37801-dsc-10bit-video.dtsi
Normal file
@@ -0,0 +1,118 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&mdss_mdp {
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||||
dsi_nt37801_amoled_dsc_10b_video: qcom,mdss_dsi_nt37801_amoled_dsc_10b_vid {
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qcom,mdss-dsi-panel-name =
|
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"nt37801 amoled video mode dsi csot panel with DSC 10bit";
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qcom,mdss-dsi-panel-type = "dsi_video_mode";
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qcom,mdss-dsi-panel-physical-type = "oled";
|
||||
qcom,mdss-dsi-virtual-channel-id = <0>;
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||||
qcom,mdss-dsi-stream = <0>;
|
||||
qcom,mdss-dsi-bpp = <30>;
|
||||
qcom,mdss-dsi-border-color = <0>;
|
||||
qcom,dsi-ctrl-num = <0>;
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||||
qcom,dsi-phy-num = <0>;
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qcom,mdss-dsi-traffic-mode = "burst_mode";
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qcom,mdss-dsi-bllp-eof-power-mode;
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qcom,mdss-dsi-bllp-power-mode;
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qcom,mdss-dsi-lane-0-state;
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||||
qcom,mdss-dsi-lane-1-state;
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||||
qcom,mdss-dsi-lane-2-state;
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qcom,mdss-dsi-lane-3-state;
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qcom,mdss-dsi-dma-trigger = "trigger_sw";
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qcom,mdss-dsi-mdp-trigger = "none";
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qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>;
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qcom,mdss-dsi-tx-eot-append;
|
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qcom,adjust-timer-wakeup-ms = <1>;
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||||
|
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qcom,mdss-dsi-wr-mem-start = <0x2c>;
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qcom,mdss-dsi-wr-mem-continue = <0x3c>;
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||||
qcom,spr-pack-type = "pentile";
|
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qcom,mdss-dsi-display-timings {
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||||
timing@0 {
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cell-index = <0>;
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||||
qcom,mdss-dsi-panel-framerate = <120>;
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qcom,mdss-dsi-panel-width = <1440>;
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qcom,mdss-dsi-panel-height = <3200>;
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qcom,mdss-dsi-h-front-porch = <100>;
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qcom,mdss-dsi-h-back-porch = <20>;
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qcom,mdss-dsi-h-pulse-width = <20>;
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qcom,mdss-dsi-h-sync-skew = <0>;
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qcom,mdss-dsi-v-back-porch = <20>;
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qcom,mdss-dsi-v-front-porch = <44>;
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qcom,mdss-dsi-v-pulse-width = <2>;
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qcom,mdss-dsi-h-left-border = <0>;
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qcom,mdss-dsi-h-right-border = <0>;
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qcom,mdss-dsi-v-top-border = <0>;
|
||||
qcom,mdss-dsi-v-bottom-border = <0>;
|
||||
|
||||
qcom,mdss-dsi-on-command = [
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 00
|
||||
39 01 00 00 00 00 02 c2 81
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 03
|
||||
39 01 00 00 00 00 02 c6 a2
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 05
|
||||
39 01 00 00 00 00 02 6f 08
|
||||
39 01 00 00 00 00 06 ec 10 00 00 00 ff
|
||||
39 01 00 00 00 00 02 17 01
|
||||
39 01 00 00 00 00 05 3b 00 14 00 2c
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 01
|
||||
39 01 00 00 00 00 02 c3 19
|
||||
39 01 00 00 00 00 02 6f 01
|
||||
39 01 00 00 00 00 04 c5 0b 0b 0b
|
||||
39 01 00 00 00 00 05 ff aa 55 a5 81
|
||||
39 01 00 00 00 00 02 6f 02
|
||||
39 01 00 00 00 00 02 f5 10
|
||||
39 01 00 00 00 00 02 6f 1b
|
||||
39 01 00 00 00 00 02 f4 55
|
||||
39 01 00 00 00 00 02 6f 18
|
||||
39 01 00 00 00 00 02 f8 19
|
||||
39 01 00 00 00 00 02 6f 0f
|
||||
39 01 00 00 00 00 02 fc 00
|
||||
39 01 00 00 00 00 05 2a 00 00 05 9f
|
||||
39 01 00 00 00 00 05 2b 00 00 0c 7f
|
||||
39 01 00 00 00 00 02 90 03
|
||||
39 01 00 00 00 00 13 91 ab 2a 00 28 f1
|
||||
9a 02 68 03 92 00 0e 03 14 02 56 10
|
||||
ec
|
||||
39 01 00 00 00 00 02 6f 23
|
||||
39 01 00 00 00 00 15 fb 00 01 04 56 77
|
||||
77 77 99 9b f0 00 02 78 9a bb bc dd
|
||||
ee ff 00
|
||||
39 01 00 00 00 00 02 f3 dc
|
||||
39 01 00 00 00 00 02 26 00
|
||||
39 01 00 00 00 00 02 35 00
|
||||
39 01 00 00 00 00 02 53 20
|
||||
39 01 00 00 00 00 07 51 07 ff 07 ff 0f
|
||||
ff
|
||||
39 01 00 00 00 00 02 5A 01
|
||||
39 01 00 00 00 00 02 5f 00
|
||||
39 01 00 00 00 00 02 9c 01
|
||||
05 01 00 00 00 00 01 2c
|
||||
39 01 00 00 00 00 02 2f 00
|
||||
39 01 00 00 00 00 06 f0 55 aa 52 08 01
|
||||
39 01 00 00 00 00 05 b2 55 01 ff 03
|
||||
05 01 00 00 78 00 01 11
|
||||
05 01 00 00 14 00 01 29
|
||||
];
|
||||
|
||||
qcom,mdss-dsi-off-command = [
|
||||
05 01 00 00 14 00 02 28 00
|
||||
05 01 00 00 78 00 02 10 00];
|
||||
qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
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qcom,mdss-dsi-off-command-state = "dsi_lp_mode";
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qcom,mdss-dsi-h-sync-pulse = <0>;
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||||
qcom,compression-mode = "dsc";
|
||||
qcom,mdss-dsc-slice-height = <40>;
|
||||
qcom,mdss-dsc-slice-width = <720>;
|
||||
qcom,mdss-dsc-slice-per-pkt = <1>;
|
||||
qcom,mdss-dsc-bit-per-component = <10>;
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||||
qcom,mdss-dsc-bit-per-pixel = <10>;
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||||
qcom,mdss-dsc-block-prediction-enable;
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};
|
||||
};
|
||||
};
|
||||
};
|
132
display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-spr.dtsi
Normal file
132
display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-spr.dtsi
Normal file
@@ -0,0 +1,132 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&mdss_mdp {
|
||||
dsi_nt37801_amoled_cmd_spr: qcom,mdss_dsi_nt37801_wqhd_plus_cmd_spr {
|
||||
qcom,mdss-dsi-panel-name =
|
||||
"nt37801 amoled cmd mode dsi csot panel with DSC and AP SPR";
|
||||
qcom,mdss-dsi-panel-type = "dsi_cmd_mode";
|
||||
qcom,mdss-dsi-panel-physical-type = "oled";
|
||||
qcom,mdss-dsi-virtual-channel-id = <0>;
|
||||
qcom,mdss-dsi-stream = <0>;
|
||||
qcom,mdss-dsi-bpp = <24>;
|
||||
qcom,mdss-dsi-color-order = "rgb_swap_rgb";
|
||||
qcom,mdss-dsi-underflow-color = <0xff>;
|
||||
qcom,mdss-dsi-border-color = <0>;
|
||||
|
||||
qcom,dsi-ctrl-num = <0>;
|
||||
qcom,dsi-phy-num = <0>;
|
||||
qcom,dsi-sec-ctrl-num = <1>;
|
||||
qcom,dsi-sec-phy-num = <1>;
|
||||
|
||||
qcom,mdss-dsi-traffic-mode = "non_burst_sync_event";
|
||||
qcom,mdss-dsi-lane-map = "lane_map_0123";
|
||||
qcom,mdss-dsi-bllp-eof-power-mode;
|
||||
qcom,mdss-dsi-bllp-power-mode;
|
||||
qcom,mdss-dsi-lane-0-state;
|
||||
qcom,mdss-dsi-lane-1-state;
|
||||
qcom,mdss-dsi-lane-2-state;
|
||||
qcom,mdss-dsi-lane-3-state;
|
||||
qcom,mdss-dsi-dma-trigger = "trigger_sw";
|
||||
qcom,mdss-dsi-mdp-trigger = "none";
|
||||
qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>;
|
||||
|
||||
qcom,mdss-dsi-te-pin-select = <1>;
|
||||
qcom,mdss-dsi-wr-mem-start = <0x2c>;
|
||||
qcom,mdss-dsi-wr-mem-continue = <0x3c>;
|
||||
qcom,mdss-dsi-te-dcs-command = <1>;
|
||||
qcom,mdss-dsi-te-check-enable;
|
||||
qcom,mdss-dsi-te-using-te-pin;
|
||||
qcom,spr-pack-type = "pentile";
|
||||
qcom,mdss-dsi-display-timings {
|
||||
timing@0 {
|
||||
cell-index = <0>;
|
||||
qcom,mdss-dsi-panel-framerate = <120>;
|
||||
qcom,mdss-dsi-panel-width = <1440>;
|
||||
qcom,mdss-dsi-panel-height = <3200>;
|
||||
qcom,mdss-dsi-h-front-porch = <20>;
|
||||
qcom,mdss-dsi-h-back-porch = <20>;
|
||||
qcom,mdss-dsi-h-pulse-width = <4>;
|
||||
qcom,mdss-dsi-h-sync-skew = <0>;
|
||||
qcom,mdss-dsi-v-back-porch = <18>;
|
||||
qcom,mdss-dsi-v-front-porch = <20>;
|
||||
qcom,mdss-dsi-v-pulse-width = <2>;
|
||||
qcom,mdss-dsi-h-left-border = <0>;
|
||||
qcom,mdss-dsi-h-right-border = <0>;
|
||||
qcom,mdss-dsi-v-top-border = <0>;
|
||||
qcom,mdss-dsi-v-bottom-border = <0>;
|
||||
qcom,mdss-dsi-panel-jitter = <0x4 0x1>;
|
||||
|
||||
qcom,mdss-dsc-version = <0x12>;
|
||||
qcom,src-chroma-format = <1>;
|
||||
|
||||
qcom,mdss-dsi-on-command = [
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 01
|
||||
39 01 00 00 00 00 02 6F 01
|
||||
39 01 00 00 00 00 04 C5 0B 0B 0B
|
||||
39 01 00 00 00 00 05 FF AA 55 A5 80
|
||||
39 01 00 00 00 00 02 6F 02
|
||||
39 01 00 00 00 00 02 F5 10
|
||||
39 01 00 00 00 00 02 6F 1B
|
||||
39 01 00 00 00 00 02 F4 55
|
||||
39 01 00 00 00 00 02 6F 18
|
||||
39 01 00 00 00 00 02 F8 19
|
||||
39 01 00 00 00 00 02 6F 0F
|
||||
39 01 00 00 00 00 02 FC 00
|
||||
39 01 00 00 00 00 05 2A 00 00 05 9F
|
||||
39 01 00 00 00 00 05 2B 00 00 0C 7F
|
||||
39 01 00 00 00 00 03 90 03 03
|
||||
39 01 00 00 00 00 13 91 A0 F0 00 32 D1
|
||||
00 01 E2 01 9B 00 3C 02 20 08 A4 11
|
||||
50
|
||||
39 01 00 00 00 00 02 6F 06
|
||||
39 01 00 00 00 00 02 F3 DC
|
||||
39 01 00 00 00 00 02 26 00
|
||||
39 01 00 00 00 00 02 35 00
|
||||
39 01 00 00 00 00 05 3B 00 18 00 10
|
||||
39 01 00 00 00 00 02 53 20
|
||||
39 01 00 00 00 00 07 51 07 FF 07 FF 0F FF
|
||||
39 01 00 00 00 00 02 5A 01
|
||||
39 01 00 00 00 00 02 5F 00
|
||||
39 01 00 00 00 00 02 9C 01
|
||||
05 01 00 00 00 00 01 2C
|
||||
39 01 00 00 00 00 02 2F 00
|
||||
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 03
|
||||
39 01 00 00 00 00 02 6F 08
|
||||
39 01 00 00 00 00 02 DE 00
|
||||
39 01 00 00 00 00 02 6F 09
|
||||
39 01 00 00 00 00 07 DE 10 34 25 30 14 25
|
||||
39 01 00 00 00 00 05 FF AA 55 A5 81
|
||||
39 01 00 00 00 00 02 6F 1D
|
||||
39 01 00 00 00 00 02 FB 6F
|
||||
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 07
|
||||
39 01 00 00 00 00 02 B0 24
|
||||
39 01 00 00 00 00 02 03 10
|
||||
|
||||
05 01 00 00 78 00 01 11
|
||||
05 01 00 00 14 00 01 29
|
||||
];
|
||||
|
||||
qcom,mdss-dsi-off-command = [
|
||||
05 01 00 00 14 00 02 28 00
|
||||
05 01 00 00 78 00 02 10 00];
|
||||
qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
|
||||
qcom,mdss-dsi-timing-switch-command-state =
|
||||
"dsi_lp_mode";
|
||||
qcom,mdss-dsi-h-sync-pulse = <0>;
|
||||
qcom,compression-mode = "dsc";
|
||||
qcom,mdss-dsc-slice-height = <40>;
|
||||
qcom,mdss-dsc-slice-width = <720>;
|
||||
qcom,mdss-dsc-slice-per-pkt = <1>;
|
||||
qcom,mdss-dsc-bit-per-component = <8>;
|
||||
qcom,mdss-dsc-bit-per-pixel = <8>;
|
||||
qcom,mdss-dsc-block-prediction-enable;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
@@ -13,11 +13,13 @@
|
||||
reg = <0x0ae00000 0x93800>,
|
||||
<0x0aeb0000 0x2008>,
|
||||
<0x0af80000 0x7000>,
|
||||
<0x400000 0x2000>;
|
||||
<0x400000 0x2000>,
|
||||
<0x0af08000 0x24>;
|
||||
reg-names = "mdp_phys",
|
||||
"vbif_phys",
|
||||
"regdma_phys",
|
||||
"ipcc_reg";
|
||||
"ipcc_reg",
|
||||
"disp_cc";
|
||||
|
||||
/* interrupt config */
|
||||
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@@ -192,8 +194,8 @@
|
||||
qcom,sde-dspp-spr-version = <0x00020000>;
|
||||
|
||||
qcom,sde-dspp-demura-off = <0x15600 0x14600 0x13600 0x12600>;
|
||||
qcom,sde-dspp-demura-size = <0xe4>;
|
||||
qcom,sde-dspp-demura-version = <0x00020000>;
|
||||
qcom,sde-dspp-demura-size = <0x150>;
|
||||
qcom,sde-dspp-demura-version = <0x00030000>;
|
||||
|
||||
qcom,sde-dspp-aiqe-off = <0x39000 0xffffffff 0x3a000 0xffffffff>;
|
||||
qcom,sde-dspp-aiqe-version = <0x00010000>;
|
||||
|
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
#include "sun-sde-display.dtsi"
|
||||
@@ -67,6 +67,29 @@
|
||||
qcom,platform-sec-reset-gpio = <&tlmm 97 0>;
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_dsc_10b_video {
|
||||
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <10>;
|
||||
qcom,mdss-dsi-bl-max-level = <4095>;
|
||||
qcom,mdss-brightness-max-level = <8191>;
|
||||
qcom,mdss-dsi-bl-inverted-dbv;
|
||||
qcom,platform-reset-gpio = <&tlmm 98 0>;
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_cmd_spr {
|
||||
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
||||
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <10>;
|
||||
qcom,mdss-dsi-bl-max-level = <4095>;
|
||||
qcom,mdss-brightness-max-level = <8191>;
|
||||
qcom,mdss-dsi-bl-inverted-dbv;
|
||||
qcom,platform-reset-gpio = <&tlmm 98 0>;
|
||||
qcom,platform-sec-reset-gpio = <&tlmm 97 0>;
|
||||
};
|
||||
|
||||
&dsi_vtdr6130_amoled_120hz_video {
|
||||
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
@@ -175,7 +198,9 @@
|
||||
panel = <&dsi_nt37801_amoled_cmd
|
||||
&dsi_nt37801_amoled_cmd_cphy
|
||||
&dsi_nt37801_amoled_video
|
||||
&dsi_nt37801_amoled_video_cphy>;
|
||||
&dsi_nt37801_amoled_dsc_10b_video
|
||||
&dsi_nt37801_amoled_video_cphy
|
||||
&dsi_nt37801_amoled_cmd_spr>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -185,6 +210,7 @@
|
||||
panel = <&dsi_nt37801_amoled_cmd
|
||||
&dsi_nt37801_amoled_cmd_cphy
|
||||
&dsi_nt37801_amoled_video
|
||||
&dsi_nt37801_amoled_video_cphy>;
|
||||
&dsi_nt37801_amoled_video_cphy
|
||||
&dsi_nt37801_amoled_cmd_spr>;
|
||||
};
|
||||
};
|
||||
|
@@ -7,6 +7,8 @@
|
||||
#include "dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi"
|
||||
#include "dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi"
|
||||
#include "dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi"
|
||||
#include "dsi-panel-nt37801-dsc-10bit-video.dtsi"
|
||||
#include "dsi-panel-nt37801-dsc-wqhd-plus-cmd-spr.dtsi"
|
||||
#include "dsi-panel-sharp-dsc-4k-cmd.dtsi"
|
||||
#include "dsi-panel-sharp-dsc-4k-video.dtsi"
|
||||
#include "dsi-panel-sim-cmd-au.dtsi"
|
||||
@@ -495,6 +497,49 @@
|
||||
};
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_dsc_10b_video {
|
||||
qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
|
||||
qcom,dsi-supported-dfps-list = <120 110 100 90 80>;
|
||||
qcom,mdss-dsi-pan-enable-dynamic-fps;
|
||||
qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp";
|
||||
|
||||
qcom,esd-check-enabled;
|
||||
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
|
||||
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
|
||||
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-panel-status-value = <0x9c>;
|
||||
qcom,mdss-dsi-panel-status-read-length = <1>;
|
||||
|
||||
qcom,mdss-dsi-display-timings {
|
||||
timing@0 {
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 3e 0f 0f 22 1f 0f
|
||||
10 0e 02 04 00 30 14];
|
||||
qcom,display-topology = <2 2 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_cmd_spr {
|
||||
qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
|
||||
qcom,dsi-select-sec-clocks = "pll_byte_clk1", "pll_dsi_clk1";
|
||||
qcom,esd-check-enabled;
|
||||
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
|
||||
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
|
||||
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-panel-status-value = <0x9c>;
|
||||
qcom,mdss-dsi-panel-status-read-length = <1>;
|
||||
|
||||
qcom,mdss-dsi-display-timings {
|
||||
timing@0 {
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 28 0a 0b 1b 1a 0a
|
||||
0b 0a 02 04 00 21 0f];
|
||||
qcom,display-topology = <2 2 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dsi_sharp_4k_dsc_cmd {
|
||||
qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
|
||||
|
||||
|
@@ -61,6 +61,26 @@
|
||||
qcom,platform-reset-gpio = <&tlmm 98 0>;
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_dsc_10b_video {
|
||||
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <10>;
|
||||
qcom,mdss-dsi-bl-max-level = <4095>;
|
||||
qcom,mdss-brightness-max-level = <8191>;
|
||||
qcom,mdss-dsi-bl-inverted-dbv;
|
||||
qcom,platform-reset-gpio = <&tlmm 98 0>;
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_cmd_spr {
|
||||
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <10>;
|
||||
qcom,mdss-dsi-bl-max-level = <4095>;
|
||||
qcom,mdss-brightness-max-level = <8191>;
|
||||
qcom,mdss-dsi-bl-inverted-dbv;
|
||||
qcom,platform-reset-gpio = <&tlmm 98 0>;
|
||||
};
|
||||
|
||||
&dsi_vtdr6130_amoled_120hz_video {
|
||||
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
@@ -168,7 +188,9 @@
|
||||
panel = <&dsi_nt37801_amoled_cmd
|
||||
&dsi_nt37801_amoled_cmd_cphy
|
||||
&dsi_nt37801_amoled_video
|
||||
&dsi_nt37801_amoled_video_cphy>;
|
||||
&dsi_nt37801_amoled_video_cphy
|
||||
&dsi_nt37801_amoled_dsc_10b_video
|
||||
&dsi_nt37801_amoled_cmd_spr>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -176,5 +198,6 @@
|
||||
qcom,display-panels = <&dsi_nt37801_amoled_cmd
|
||||
&dsi_nt37801_amoled_cmd_cphy
|
||||
&dsi_nt37801_amoled_video
|
||||
&dsi_nt37801_amoled_video_cphy>;
|
||||
&dsi_nt37801_amoled_video_cphy
|
||||
&dsi_nt37801_amoled_cmd_spr>;
|
||||
};
|
||||
|
@@ -155,42 +155,42 @@
|
||||
qcom,mdss-dsi-display-timings {
|
||||
timing@0 {
|
||||
qcom,partial-update-enabled = "single_roi";
|
||||
qcom,panel-roi-alignment = <720 40 40 40 720 40>;
|
||||
qcom,panel-roi-alignment = <0 0 720 40 1440 40>;
|
||||
};
|
||||
|
||||
timing@1 {
|
||||
qcom,partial-update-enabled = "single_roi";
|
||||
qcom,panel-roi-alignment = <540 40 40 40 540 40>;
|
||||
qcom,panel-roi-alignment = <0 0 540 40 1080 40>;
|
||||
};
|
||||
|
||||
timing@2 {
|
||||
qcom,partial-update-enabled = "single_roi";
|
||||
qcom,panel-roi-alignment = <720 40 40 40 720 40>;
|
||||
qcom,panel-roi-alignment = <0 0 720 40 1440 40>;
|
||||
};
|
||||
|
||||
timing@3 {
|
||||
qcom,partial-update-enabled = "single_roi";
|
||||
qcom,panel-roi-alignment = <720 40 40 40 720 40>;
|
||||
qcom,panel-roi-alignment = <0 0 720 40 1440 40>;
|
||||
};
|
||||
|
||||
timing@4 {
|
||||
qcom,partial-update-enabled = "single_roi";
|
||||
qcom,panel-roi-alignment = <720 40 40 40 720 40>;
|
||||
qcom,panel-roi-alignment = <0 0 720 40 1440 40>;
|
||||
};
|
||||
|
||||
timing@5 {
|
||||
qcom,partial-update-enabled = "single_roi";
|
||||
qcom,panel-roi-alignment = <720 40 40 40 720 40>;
|
||||
qcom,panel-roi-alignment = <0 0 720 40 1440 40>;
|
||||
};
|
||||
|
||||
timing@6 {
|
||||
qcom,partial-update-enabled = "single_roi";
|
||||
qcom,panel-roi-alignment = <720 40 40 40 720 40>;
|
||||
qcom,panel-roi-alignment = <0 0 720 40 1440 40>;
|
||||
};
|
||||
|
||||
timing@7 {
|
||||
qcom,partial-update-enabled = "single_roi";
|
||||
qcom,panel-roi-alignment = <720 40 40 40 720 40>;
|
||||
qcom,panel-roi-alignment = <0 0 720 40 1440 40>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -199,17 +199,17 @@
|
||||
qcom,mdss-dsi-display-timings {
|
||||
timing@0 {
|
||||
qcom,partial-update-enabled = "single_roi";
|
||||
qcom,panel-roi-alignment = <720 40 40 40 720 40>;
|
||||
qcom,panel-roi-alignment = <0 0 720 40 1440 40>;
|
||||
};
|
||||
|
||||
timing@1 {
|
||||
qcom,partial-update-enabled = "single_roi";
|
||||
qcom,panel-roi-alignment = <720 40 40 40 720 40>;
|
||||
qcom,panel-roi-alignment = <0 0 720 40 1440 40>;
|
||||
};
|
||||
|
||||
timing@2 {
|
||||
qcom,partial-update-enabled = "single_roi";
|
||||
qcom,panel-roi-alignment = <720 40 40 40 720 40>;
|
||||
qcom,panel-roi-alignment = <0 0 720 40 1440 40>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@@ -54,6 +54,15 @@
|
||||
qcom,platform-reset-gpio = <&tlmm 98 0>;
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_cmd_spr {
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <10>;
|
||||
qcom,mdss-dsi-bl-max-level = <4095>;
|
||||
qcom,mdss-brightness-max-level = <8191>;
|
||||
qcom,mdss-dsi-bl-inverted-dbv;
|
||||
qcom,platform-reset-gpio = <&tlmm 98 0>;
|
||||
};
|
||||
|
||||
&dsi_vtdr6130_amoled_120hz_video {
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <10>;
|
||||
|
@@ -23,6 +23,15 @@
|
||||
qcom,platform-reset-gpio = <&tlmm 98 0>;
|
||||
};
|
||||
|
||||
&dsi_nt37801_amoled_cmd_spr {
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <10>;
|
||||
qcom,mdss-dsi-bl-max-level = <4095>;
|
||||
qcom,mdss-brightness-max-level = <8191>;
|
||||
qcom,mdss-dsi-bl-inverted-dbv;
|
||||
qcom,platform-reset-gpio = <&tlmm 98 0>;
|
||||
};
|
||||
|
||||
&dsi_sim_panel_au {
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <10>;
|
||||
|
Reference in New Issue
Block a user