Merge "ARM: dts: msm: Add soccp controller phandle for sun"
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@@ -66,6 +66,7 @@ GMU GDSC/regulators:
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baseAddr - base address of the IPC region
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size - size of the IPC region
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- qcom,soccp-controller: Phandle of the soccp controller
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Example:
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@@ -192,5 +192,6 @@
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qcom,iommu-dma = "disabled";
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qcom,ipc-core = <0x00400000 0x140000>;
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qcom,soccp-controller = <&soccp_pas>;
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};
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};
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