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ARM: dts: msm: Update the pcie BAR address in ranges property

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Update the pcie BAR address in ranges property for sun.

ADSP subsystem is not having access to the previously given
(0x60300000) memory region. So, moving to the lower memory
region to avoid NOC errors for adsp.

Change-Id: Id8223a78cf13d8f2c83095de30b193e85da6829d
Signed-off-by: Prudhvi Yarlagadda <quic_pyarlaga@quicinc.com>
This commit is contained in:
Prudhvi Yarlagadda
2023-11-21 15:31:56 -08:00
parent e83dd7572b
commit 3f805a805c
1 changed files with 2 additions and 2 deletions
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4
qcom/sun-pcie.dtsi
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@@ -24,8 +24,8 @@
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
ranges = <0x01000000 0x0 0x60200000 0x60200000 0x0 0x100000>, ranges = <0x01000000 0x0 0x40200000 0x40200000 0x0 0x100000>,
<0x02000000 0x0 0x60300000 0x60300000 0x0 0x3d00000>; <0x02000000 0x0 0x40300000 0x40300000 0x0 0x3d00000>;
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH