Merge "dt-bindings: pci: qcom: Add MHI DT Bindings on sdxkova"
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112
bindings/pci/qcom,msm_mhi_dev.yaml
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112
bindings/pci/qcom,msm_mhi_dev.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pci/qcom,msm_mhi_dev.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Technologies, Inc. (QTI) MSM MHI Device
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maintainers:
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- Anvita T <quic_atadepal@quicinc.com>
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properties:
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compatible:
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enum:
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- qcom,msm-mhi-dev
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reg:
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minItems: 1
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items:
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- description: MHI MMIO physical register space.
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- description: IPA uC Command Ring doorbell mail box address.
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- description: IPA uC Event Ring doorbell mail box address.
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reg-names:
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minItems: 1
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items:
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- const: mhi_mmio_base
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- const: ipa_uc_mbox_crdb
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- const: ipa_uc_mbox_erdb
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interrupts:
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items:
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- description: Interrupt line for the device.
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interrupt-names:
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items:
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- const: mhi-device-inta
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qcom,mhi-ifc-id:
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description: ID of HW interface via which MHI on device side communicates with host side.
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qcom,mhi-ep-msi:
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description: End point MSI number.
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qcom,mhi-version:
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description: MHI specification version supported by the device.
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qcom,use-mhi-dma-software-channel:
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description: Uses IPA hardware accelerated path for MHI software channel data transfers between host and device.
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qcom,mhi-config-iatu:
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description: Maps the control and data region between host and device using iatu.
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qcom,mhi-interrupt:
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description: Registers for mhi interrupt.
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qcom,mhi-local-pa-base:
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description: The physical base address on the device used by the MHI device driver to map
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the control and data region with the MHI driver on the host. This property is
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required if iatu property qcom,mhi-config-iatu is present.
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qcom,enable-m2:
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description: M2 autonomous is enabled.
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qcom,mhi-has-smmu:
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description: Uses mapped address to route the doorbell addresses to IPA.
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qcom,mhi-num-ipc-pages-dev-fac:
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description: Reduces the MHI ipc logging size based on the divisor factor.
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This property also represents the divisor factor.
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qcom,no-m0-timeout:
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description: Device waits for M0 state without any timeout period.
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mhi-virt-device-int-x:
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description: To be used if the target supports virtual functions.
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The property lists the interrupt number for the virtual functions.
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Replace x with the appropriate interrupt number.
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qcom,use-pcie-edma:
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description: Uses eDMA as DMA for MHI software channel data transfers between host and device.
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qcom,mhi-chan-hw-base:
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description: If the target uses any other h/w channel than ch-100 as the start of the hardware
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accelerated channel, then use this property to mention the start h/w channel.
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qcom,mhi-is-flashless:
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description: If the target uses flashless boot (boot over PCIe) then mention this property.
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required:
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- compatible
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- reg
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- reg-names
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- qcom,mhi-ifc-id
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- qcom,mhi-ep-msi
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- qcom,mhi-version
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unevaluatedProperties: false
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examples:
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- |
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mhi: qcom,msm-mhi-dev {
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compatible = "qcom,msm-mhi-dev";
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reg = <0xfc527000 0x1000>,
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<0xfd4fa000 0x1>,
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<0xfd4fa080 0x1>;
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reg-names = "mhi_mmio_base", "ipa_uc_mbox_crdb","ipa_uc_mbox_erdb";
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qcom,mhi-ifc-id = <0x030017cb>;
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qcom,mhi-ep-msi = <1>;
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qcom,mhi-version = <0x1000000>;
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};
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35
bindings/pci/qcom,msm_mhi_net_dev.yaml
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35
bindings/pci/qcom,msm_mhi_net_dev.yaml
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@@ -0,0 +1,35 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pci/qcom,msm_mhi_net_dev.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Technologies, Inc. (QTI) MSM MHI NET Device
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maintainers:
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- Anvita T <quic_atadepal@quicinc.com>
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properties:
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compatible:
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enum:
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- qcom,msm-mhi-dev-net
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qcom,mhi-ethernet-interface-ch-list:
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description: Channels list which expects Ethernet packet parsing support.
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qcom,tx_rx_reqs:
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description: If property present it will override the number of elements in
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rx and tx queues for mhi_dev_net device.(Default:128)
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required:
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- compatible
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unevaluatedProperties: false
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examples:
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- |
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qcom,mhi_net_dev {
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compatible = "qcom,msm-mhi-dev-net";
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qcom,mhi-ethernet-interface;
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};
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