ARM: dts: msm: Add charger PMIC devices to kera

Add charger PMIC changes to the kera variants.

While at it add ADC channels for pmic_glink_adc and
debug channels for pmic_glink_debug for kera platforms.

Change-Id: Iab9f94b44eca9365b84bc78c2666e4f66a344455
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>

qcom/kera-atp-overlay.dts

@@ -6,6 +6,7 @@
 /dts-v1/;
 /plugin/;
 
+#include "kera-pm7550ba.dtsi"
 #include "kera-atp.dtsi"
 
 / {

qcom/kera-atp.dtsi

@@ -23,3 +23,11 @@
 
 	status = "ok";
 };
+
+&pmic_glink_debug {
+	status = "disabled";
+};
+
+&pmic_glink_adc {
+	status = "disabled";
+};

qcom/kera-cdp-overlay.dts

@@ -7,6 +7,7 @@
 /plugin/;
 
 #include "kera-cdp.dtsi"
+#include "kera-pmiv0102.dtsi"
 
 / {
 	model = "Qualcomm Technologies, Inc. Kera CDP";

qcom/kera-cdp-qca6750-ufs2-overlay.dts

@@ -7,6 +7,7 @@
 /plugin/;
 
 #include "kera-cdp-qca6750-ufs2.dtsi"
+#include "kera-pmiv0102.dtsi"
 
 / {
 	model = "Qualcomm Technologies, Inc. Kera CDP + QCA6750 + UFS2.0";

qcom/kera-cdp-qca6750-ufs3-overlay.dts

@@ -7,6 +7,7 @@
 /plugin/;
 
 #include "kera-cdp-qca6750-ufs3.dtsi"
+#include "kera-pmiv0102.dtsi"
 
 / {
 	model = "Qualcomm Technologies, Inc. Kera CDP + QCA6750 + UFS3.0";

qcom/kera-cdp-qca6750-ufs4-overlay.dts

@@ -7,6 +7,7 @@
 /plugin/;
 
 #include "kera-cdp-qca6750-ufs4.dtsi"
+#include "kera-pmiv0102.dtsi"
 
 / {
 	model = "Qualcomm Technologies, Inc. Kera CDP + QCA6750 + UFS4.0";

qcom/kera-mtp-overlay.dts

@@ -7,6 +7,7 @@
 /plugin/;
 
 #include "kera-mtp.dtsi"
+#include "kera-pm7550ba.dtsi"
 
 / {
 	model = "Qualcomm Technologies, Inc. Kera MTP";

qcom/kera-mtp-qca6750-overlay.dts

@@ -7,6 +7,7 @@
 /plugin/;
 
 #include "kera-mtp-qca6750.dtsi"
+#include "kera-pm7550ba.dtsi"
 
 / {
 	model = "Qualcomm Technologies, Inc. Kera MTP + QCA6750";

qcom/kera-mtp-qca6750-qmp1000-overlay.dts

@@ -7,6 +7,7 @@
 /plugin/;
 
 #include "kera-mtp-qca6750-qmp1000.dtsi"
+#include "kera-pm7550ba.dtsi"
 
 / {
 	model = "Qualcomm Technologies, Inc. Kera MTP + QCA6750 + QMP1000";

qcom/kera-mtp-wcn7750-qmp1000-overlay.dts

@@ -7,6 +7,7 @@
 /plugin/;
 
 #include "kera-mtp-wcn7750-qmp1000.dtsi"
+#include "kera-pm7550ba.dtsi"
 
 / {
 	model = "Qualcomm Technologies, Inc. Kera MTP + WCN7750 + QMP1000";

qcom/kera-mtp-wcn7750-ufs3-overlay.dts

@@ -7,6 +7,7 @@
 /plugin/;
 
 #include "kera-mtp-wcn7750-ufs3.dtsi"
+#include "kera-pm7550ba.dtsi"
 
 / {
 	model = "Qualcomm Technologies, Inc. Kera MTP + WCN7750 + UFS3.0";

qcom/kera-mtp-wcn7750-ufs4-overlay.dts

@@ -7,6 +7,7 @@
 /plugin/;
 
 #include "kera-mtp-wcn7750-ufs4.dtsi"
+#include "kera-pm7550ba.dtsi"
 
 / {
 	model = "Qualcomm Technologies, Inc. Kera MTP + WCN7750 + UFS4.0";

qcom/kera-pm7550ba.dtsi

@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "tuna-pm7550ba.dtsi"
+
+&pmic_glink_debug {
+	/delete-node/ i2c@104;
+	/delete-node/ spmi@200;
+
+		i2c@104 {
+		reg = <0x104>;  /* I2C instance 4 in ADSP for SE5 */
+		#address-cells = <1>;
+		#size-cells = <0>;
+		qcom,bus-type = "i2c";
+
+		qcom,smb1500@69 {
+			compatible = "qcom,i2c-pmic";
+			reg = <0x69>;
+			qcom,can-sleep;
+		};
+
+		qcom,smb1500@68 {
+			compatible = "qcom,i2c-pmic";
+			reg = <0x68>;
+			qcom,can-sleep;
+		};
+	};
+};
+
+&pmic_glink_adc {
+	/delete-node/ smb1398_1_iin;
+	/delete-node/ smb1398_1_ichg;
+	/delete-node/ smb1398_1_die_temp;
+
+	smb1500_1_iin {
+		reg = <0x1046901>;
+		label = "smb1393_1_iin";
+	};
+
+	smb1500_1_ichg {
+		reg = <0x1046902>;
+		label = "smb1393_1_ichg";
+	};
+
+	smb1500_1_die_temp {
+		reg = <0x1046903>;
+		label = "smb1393_1_die_temp";
+	};
+
+	smb1500_2_iin {
+		reg = <0x1046801>;
+		label = "smb1393_2_iin";
+	};
+
+	smb1500_2_ichg {
+		reg = <0x1046802>;
+		label = "smb1393_2_ichg";
+	};
+
+	smb1500_2_die_temp {
+		reg = <0x1046803>;
+		label = "smb1393_2_die_temp";
+	};
+};
+

qcom/kera-pmiv0102.dtsi

@@ -10,7 +10,5 @@
 };
 
 &pmiv010x_amoled_ecm {
-	status = "ok"
+	status = "ok";
 };
-
-

qcom/kera-qrd-overlay.dts

@@ -7,6 +7,7 @@
 /plugin/;
 
 #include "kera-qrd.dtsi"
+#include "kera-pmiv0102.dtsi"
 
 / {
 	model = "Qualcomm Technologies, Inc. Kera QRD";

qcom/kera-qrd.dtsi

@@ -72,3 +72,37 @@
 						&tlmm 3 0 &tlmm 16 0 &tlmm 13 0x2008>;
 	};
 };
+
+&pmic_glink_debug {
+	i2c@104 {
+		reg = <0x104>;  /* I2C instance 4 in ADSP for SE5 */
+		#address-cells = <1>;
+		#size-cells = <0>;
+		qcom,bus-type = "i2c";
+
+		qcom,smb1393@34 {
+			compatible = "qcom,i2c-pmic";
+			reg = <0x34>;
+			qcom,can-sleep;
+		};
+	};
+};
+
+&pmic_glink_adc {
+	status = "ok";
+
+	smb1393_1_iin {
+		reg = <0x1043401>;
+		label = "smb1393_1_iin";
+	};
+
+	smb1393_1_ichg {
+		reg = <0x1043402>;
+		label = "smb1393_1_ichg";
+	};
+
+	smb1393_1_die_temp {
+		reg = <0x1043403>;
+		label = "smb1393_1_die_temp";
+	};
+};

qcom/kera-rcm-overlay.dts

@@ -7,6 +7,7 @@
 /plugin/;
 
 #include "kera-rcm.dtsi"
+#include "kera-pmiv0102.dtsi"
 
 / {
 	model = "Qualcomm Technologies, Inc. Kera RCM";

qcom/kera-rcm-qca6750-ufs2-overlay.dts

@@ -7,6 +7,7 @@
 /plugin/;
 
 #include "kera-rcm-qca6750-ufs2.dtsi"
+#include "kera-pmiv0102.dtsi"
 
 / {
 	model = "Qualcomm Technologies, Inc. Kera RCM + QCA6750 + UFS2.0";

qcom/kera-rcm-qca6750-ufs3-overlay.dts

@@ -7,6 +7,7 @@
 /plugin/;
 
 #include "kera-rcm-qca6750-ufs3.dtsi"
+#include "kera-pmiv0102.dtsi"
 
 / {
 	model = "Qualcomm Technologies, Inc. Kera RCM + QCA6750 + UFS3.0";

qcom/kera-rcm-wcn7750-ufs2-overlay.dts

@@ -7,6 +7,7 @@
 /plugin/;
 
 #include "kera-rcm-wcn7750-ufs2.dtsi"
+#include "kera-pmiv0102.dtsi"
 
 / {
 	model = "Qualcomm Technologies, Inc. Kera RCM + WCN7750 + UFS2.0";

qcom/kera-rcm-wcn7750-ufs3-overlay.dts

@@ -7,6 +7,7 @@
 /plugin/;
 
 #include "kera-rcm-wcn7750-ufs3.dtsi"
+#include "kera-pmiv0102.dtsi"
 
 / {
 	model = "Qualcomm Technologies, Inc. KERA RCM + WCN7750 + UFS3.0";

qcom/kera.dtsi

@@ -3021,6 +3021,7 @@
 #include "kera-coresight.dtsi"
 #include "kera-pinctrl.dtsi"
 #include "kera-regulators.dtsi"
+#include "kera-pmic-overlay.dtsi"
 #include "kera-usb.dtsi"
 #include "kera-qupv3.dtsi"
 #include "kera-thermal.dtsi"