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ARM: dts: msm: Add ipcc node for sdxkova

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Add ipcc node for sdxkova to enable inter processor
communication controller.

Adjust reg format for tz-log node.

Change-Id: I5519f5b8bfc02b2c85c1654a2f39c4ec61fdee9f
Signed-off-by: Keval Kulkarni <quic_kevalbha@quicinc.com>
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
This commit is contained in:
Keval Kulkarni
2024-08-27 17:24:22 +05:30
parent 17b320bdf1
commit 2e93118b13
1 changed files with 10 additions and 1 deletions
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11
qcom/sdxkova.dtsi
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@@ -9,7 +9,7 @@
/{ /{
qcom_tzlog: tz-log@14680720 { qcom_tzlog: tz-log@14680720 {
compatible = "qcom,tz-log"; compatible = "qcom,tz-log";
reg = <0x14680720 0x3000>; reg = <0x0 0x14680720 0x0 0x3000>;
qcom,hyplog-enabled; qcom,hyplog-enabled;
hyplog-address-offset = <0x410>; hyplog-address-offset = <0x410>;
hyplog-size-offset = <0x414>; hyplog-size-offset = <0x414>;
@@ -357,6 +357,15 @@
compatible = "qcom,cpufreq-hw-epss-debug"; compatible = "qcom,cpufreq-hw-epss-debug";
qcom,freq-hw-domain = <&cpufreq_hw 0>; qcom,freq-hw-domain = <&cpufreq_hw 0>;
}; };
ipcc_mproc: qcom,ipcc@408000 {
compatible = "qcom,ipcc";
reg = <0x0 0x408000 0x0 0x1000>;
interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <3>;
#mbox-cells = <2>;
};
}; };
&gcc { &gcc {