ARM: dts: msm: Add lowSVS_D3 power level to Sun GPU

Add supported lower power level to Sun GPU.

Change-Id: I896fe7cd45d1b1a824d3a0d7c47115952d8598ea
Signed-off-by: Mohammed Mirza Mandayappurath Manzoor <quic_mmandaya@quicinc.com>
This commit is contained in:
Mohammed Mirza Mandayappurath Manzoor
2024-03-19 15:51:47 -07:00
parent 300aef810b
commit 2cc3321179

View File

@@ -31,6 +31,7 @@
#size-cells = <0>; #size-cells = <0>;
qcom,initial-pwrlevel = <10>; qcom,initial-pwrlevel = <10>;
qcom,initial-min-pwrlevel = <10>;
qcom,sku-codes = <SKU_CODE(PCODE_UNKNOWN, FC_AB) qcom,sku-codes = <SKU_CODE(PCODE_UNKNOWN, FC_AB)
SKU_CODE(PCODE_UNKNOWN, FC_AC)>; SKU_CODE(PCODE_UNKNOWN, FC_AC)>;
@@ -176,6 +177,17 @@
qcom,acd-level = <ACD_LEVEL_LOW_SVS_D2>; qcom,acd-level = <ACD_LEVEL_LOW_SVS_D2>;
}; };
/* Low_SVS_D3 */
qcom,gpu-pwrlevel@11 {
reg = <11>;
qcom,gpu-freq = <125000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D3>;
qcom,bus-freq = <2>;
qcom,bus-min = <2>;
qcom,bus-max = <2>;
};
}; };
qcom,gpu-pwrlevels-1 { qcom,gpu-pwrlevels-1 {
@@ -183,6 +195,7 @@
#size-cells = <0>; #size-cells = <0>;
qcom,initial-pwrlevel = <12>; qcom,initial-pwrlevel = <12>;
qcom,initial-min-pwrlevel = <12>;
qcom,sku-codes = <SKU_CODE(PCODE_UNKNOWN, FC_UNKNOWN)>; qcom,sku-codes = <SKU_CODE(PCODE_UNKNOWN, FC_UNKNOWN)>;
/* TURBO_L3 */ /* TURBO_L3 */
@@ -353,6 +366,17 @@
qcom,acd-level = <ACD_LEVEL_LOW_SVS_D2>; qcom,acd-level = <ACD_LEVEL_LOW_SVS_D2>;
}; };
/* Low_SVS_D3 */
qcom,gpu-pwrlevel@13 {
reg = <13>;
qcom,gpu-freq = <125000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D3>;
qcom,bus-freq = <2>;
qcom,bus-min = <2>;
qcom,bus-max = <2>;
};
}; };
}; };
}; };