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ARM: dts: msm: Use "iommu-addresses" property for parrot dwc3

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Use upstream compatible DT property "iommu-addresses" instead
of "qcom,iommu-dma-addr-pool" for dwc3 which describes the
addresses that dwc3 cannot use.
Extend the address and size cells to ensure that IOMMU returns
a 32 bit address, in order to define a region that will block
0xf0000000--0xffffffffffffffff.

Change-Id: Idb5640a5a63bfa50c7fac61e785012df733e82c6
Signed-off-by: Saranya R <quic_sarar@quicinc.com>
This commit is contained in:
Saranya R
2024-05-27 13:05:44 +05:30
parent 8698a0c9f5
commit 22c0a29a7b
1 changed files with 11 additions and 5 deletions
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16
qcom/parrot-usb.dtsi
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@@ -12,8 +12,8 @@
reg = <0xa600000 0x100000>;
reg-names = "core_base";
#address-cells = <1>;
#size-cells = <1>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
USB3_GDSC-supply = <&gcc_usb30_prim_gdsc>;
@@ -53,13 +53,13 @@
<&aggre1_noc MASTER_USB3_0 &cnoc2 SLAVE_IPA_CFG>,
<&gem_noc MASTER_APPSS_PROC &cnoc2 SLAVE_USB3_0>;
dwc3@a600000 {
dwc3_0: dwc3@a600000 {
compatible = "snps,dwc3";
reg = <0xa600000 0xd800>;
reg = <0x0 0xa600000 0x0 0xd800>;
iommus = <&apps_smmu 0x80 0x0>;
qcom,iommu-dma = "atomic";
qcom,iommu-dma-addr-pool = <0x90000000 0x60000000>;
memory-region = <&dwc3_mem_region>;
dma-coherent;
interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
@@ -79,6 +79,12 @@
};
dwc3_mem_region: dwc3_mem_region {
iommu-addresses = <&dwc3_0 0x0 0x0 0x0 0x90000000>,
<&dwc3_0 0x0 0xf0000000 0xffffffff 0x10000000>;
};
/* USB port related High Speed PHY */
usb2_phy0: hsphy@88e3000 {
compatible = "qcom,usb-hsphy-snps-femto";