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Merge "ARM: dts: msm: Add power domains for sun GPU"

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qctecmdr
2024-04-17 11:20:42 -07:00
committed by Gerrit - the friendly Code Review server
parent 8024a7ac47 564471dede
commit 1d617360ce
2 changed files with 6 additions and 6 deletions
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3
gpu/sun-gpu.dts
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@@ -1,6 +1,6 @@
// SPDX-License-Identifier: BSD-3-Clause // SPDX-License-Identifier: BSD-3-Clause
/* /*
* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/ */
/dts-v1/; /dts-v1/;
@@ -9,6 +9,7 @@
#include <dt-bindings/clock/qcom,aop-qmp.h> #include <dt-bindings/clock/qcom,aop-qmp.h>
#include <dt-bindings/clock/qcom,gcc-sun.h> #include <dt-bindings/clock/qcom,gcc-sun.h>
#include <dt-bindings/clock/qcom,gpucc-sun.h> #include <dt-bindings/clock/qcom,gpucc-sun.h>
#include <dt-bindings/clock/qcom,gxclkctl-sun.h>
#include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/interconnect/qcom,sun.h> #include <dt-bindings/interconnect/qcom,sun.h>
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>

9
gpu/sun-gpu.dtsi
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@@ -136,7 +136,7 @@
compatible = "qcom,kgsl-smmu-v2"; compatible = "qcom,kgsl-smmu-v2";
reg = <0x3da0000 0x40000>; reg = <0x3da0000 0x40000>;
vddcx-supply = <&gpu_cc_cx_gdsc>; power-domains = <&gpucc GPU_CC_CX_GDSC>;
gfx3d_user: gfx3d_user { gfx3d_user: gfx3d_user {
compatible = "qcom,smmu-kgsl-cb"; compatible = "qcom,smmu-kgsl-cb";
@@ -169,10 +169,9 @@
<0 305 IRQ_TYPE_LEVEL_HIGH>; <0 305 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hfi", "gmu"; interrupt-names = "hfi", "gmu";
regulator-names = "vddcx", "vdd"; power-domains = <&gpucc GPU_CC_CX_GDSC>,
<&gxclkctl GX_CLKCTL_GX_GDSC>;
vddcx-supply = <&gpu_cc_cx_gdsc>; power-domain-names = "cx", "gx";
vdd-supply = <&gx_clkctl_gx_gdsc>;
clocks = <&gpucc GPU_CC_CX_GMU_CLK>, clocks = <&gpucc GPU_CC_CX_GMU_CLK>,
<&gpucc GPU_CC_CXO_CLK>, <&gpucc GPU_CC_CXO_CLK>,