From 564471dede9eda4d761c97aa97811d485fffbab3 Mon Sep 17 00:00:00 2001 From: Kamal Agrawal Date: Tue, 13 Feb 2024 01:47:52 +0530 Subject: [PATCH] ARM: dts: msm: Add power domains for sun GPU MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit GDSCs were modeled as regulators till now. However, moving forward, GDSCs will be treated as power domains. Consequently, replace references to ‘regulators’ with ‘power domains’ for the sun GPU. Change-Id: I607a511754d56728d5013004d0ae83544f873df6 Signed-off-by: Kamal Agrawal --- gpu/sun-gpu.dts | 3 ++- gpu/sun-gpu.dtsi | 9 ++++----- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/gpu/sun-gpu.dts b/gpu/sun-gpu.dts index eda85863..e0cc7986 100644 --- a/gpu/sun-gpu.dts +++ b/gpu/sun-gpu.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ /dts-v1/; @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include diff --git a/gpu/sun-gpu.dtsi b/gpu/sun-gpu.dtsi index 548a1bb0..21cbd14d 100644 --- a/gpu/sun-gpu.dtsi +++ b/gpu/sun-gpu.dtsi @@ -136,7 +136,7 @@ compatible = "qcom,kgsl-smmu-v2"; reg = <0x3da0000 0x40000>; - vddcx-supply = <&gpu_cc_cx_gdsc>; + power-domains = <&gpucc GPU_CC_CX_GDSC>; gfx3d_user: gfx3d_user { compatible = "qcom,smmu-kgsl-cb"; @@ -169,10 +169,9 @@ <0 305 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "hfi", "gmu"; - regulator-names = "vddcx", "vdd"; - - vddcx-supply = <&gpu_cc_cx_gdsc>; - vdd-supply = <&gx_clkctl_gx_gdsc>; + power-domains = <&gpucc GPU_CC_CX_GDSC>, + <&gxclkctl GX_CLKCTL_GX_GDSC>; + power-domain-names = "cx", "gx"; clocks = <&gpucc GPU_CC_CX_GMU_CLK>, <&gpucc GPU_CC_CXO_CLK>,