Merge "ARM: dts: msm: correct size for reserved dump_mem on sun"

This commit is contained in:
qctecmdr
2023-11-13 21:23:26 -08:00
committed by Gerrit - the friendly Code Review server

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@@ -3,6 +3,20 @@
* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
*/
&reserved_memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
dump_mem: mem_dump_region {
compatible = "shared-dma-pool";
alloc-ranges = <0x1 0x00000000 0xfffffffe 0xffffffff>;
reusable;
alignment = <0x0 0x400000>;
size = <0x0 0xc00000>;
};
};
&soc {
dcc: dcc@100ff000 {
compatible = "qcom,dcc-v2";
@@ -13,4 +27,104 @@
qcom,transaction_timeout = <0>;
dcc-ram-offset = <0>;
};
mem_dump {
compatible = "qcom,mem-dump";
memory-region = <&dump_mem>;
rpmh {
qcom,dump-size = <0x400000>;
qcom,dump-id = <0xec>;
};
rpm_sw {
qcom,dump-size = <0x28000>;
qcom,dump-id = <0xea>;
};
pmic {
qcom,dump-size = <0x200000>;
qcom,dump-id = <0xe4>;
};
fcm {
qcom,dump-size = <0x8400>;
qcom,dump-id = <0xee>;
};
etf_swao {
qcom,dump-size = <0x10000>;
qcom,dump-id = <0xf1>;
};
etr_reg {
qcom,dump-size = <0x1000>;
qcom,dump-id = <0x100>;
};
etfswao_reg {
qcom,dump-size = <0x1000>;
qcom,dump-id = <0x102>;
};
etr1_reg {
qcom,dump-size = <0x1000>;
qcom,dump-id = <0x105>;
};
misc_data {
qcom,dump-size = <0x1000>;
qcom,dump-id = <0xe8>;
};
etf_slpi {
qcom,dump-size = <0x4000>;
qcom,dump-id = <0xf3>;
};
etfslpi_reg {
qcom,dump-size = <0x1000>;
qcom,dump-id = <0x103>;
};
etf_lpass {
qcom,dump-size = <0x4000>;
qcom,dump-id = <0xf4>;
};
etflpass_reg {
qcom,dump-size = <0x1000>;
qcom,dump-id = <0x104>;
};
osm_reg {
qcom,dump-size = <0x400>;
qcom,dump-id = <0x163>;
};
pcu_reg {
qcom,dump-size = <0x400>;
qcom,dump-id = <0x164>;
};
fsm_data {
qcom,dump-size = <0x400>;
qcom,dump-id = <0x165>;
};
scandump_smmu {
qcom,dump-size = <0x40000>;
qcom,dump-id = <0x220>;
};
scandump_gpu {
qcom,dump-size = <0x300000>;
qcom,dump-id = <0x221>;
};
scandump_ubwcp {
qcom,dump-size = <0x40000>;
qcom,dump-id = <0x222>;
};
};
};