From 01986ee6f64630b366fe8bca7221c06e83b83098 Mon Sep 17 00:00:00 2001 From: Yuanfang Zhang Date: Tue, 7 Nov 2023 00:01:33 -0800 Subject: [PATCH 1/2] ARM: dts: msm: add dump table for sun Add memory dump table for sun. Change-Id: I1ed6ad897b7bf1be878821475c5270a406efb3d7 Signed-off-by: Yuanfang Zhang --- qcom/sun-debug.dtsi | 146 +++++++++++++++++++++++++++++++++++++++----- 1 file changed, 130 insertions(+), 16 deletions(-) diff --git a/qcom/sun-debug.dtsi b/qcom/sun-debug.dtsi index e40ee063..9781b4b7 100644 --- a/qcom/sun-debug.dtsi +++ b/qcom/sun-debug.dtsi @@ -1,16 +1,130 @@ -// SPDX-License-Identifier: BSD-3-Clause -/* - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. - */ - -&soc { - dcc: dcc@100ff000 { - compatible = "qcom,dcc-v2"; - reg = <0x100ff000 0x1000>, - <0x10080000 0x18000>; - reg-names = "dcc-base", "dcc-ram-base"; - - qcom,transaction_timeout = <0>; - dcc-ram-offset = <0>; - }; -}; \ No newline at end of file +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +&reserved_memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + dump_mem: mem_dump_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0x1 0x00000000 0xfffffffe 0xffffffff>; + reusable; + alignment = <0x0 0x400000>; + size = <0x0 0xb00000>; + }; +}; + +&soc { + dcc: dcc@100ff000 { + compatible = "qcom,dcc-v2"; + reg = <0x100ff000 0x1000>, + <0x10080000 0x18000>; + reg-names = "dcc-base", "dcc-ram-base"; + + qcom,transaction_timeout = <0>; + dcc-ram-offset = <0>; + }; + + mem_dump { + compatible = "qcom,mem-dump"; + memory-region = <&dump_mem>; + + rpmh { + qcom,dump-size = <0x400000>; + qcom,dump-id = <0xec>; + }; + + rpm_sw { + qcom,dump-size = <0x28000>; + qcom,dump-id = <0xea>; + }; + + pmic { + qcom,dump-size = <0x200000>; + qcom,dump-id = <0xe4>; + }; + + fcm { + qcom,dump-size = <0x8400>; + qcom,dump-id = <0xee>; + }; + + etf_swao { + qcom,dump-size = <0x10000>; + qcom,dump-id = <0xf1>; + }; + + etr_reg { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0x100>; + }; + + etfswao_reg { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0x102>; + }; + + etr1_reg { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0x105>; + }; + + misc_data { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0xe8>; + }; + + etf_slpi { + qcom,dump-size = <0x4000>; + qcom,dump-id = <0xf3>; + }; + + etfslpi_reg { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0x103>; + }; + + etf_lpass { + qcom,dump-size = <0x4000>; + qcom,dump-id = <0xf4>; + }; + + etflpass_reg { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0x104>; + }; + + osm_reg { + qcom,dump-size = <0x400>; + qcom,dump-id = <0x163>; + }; + + pcu_reg { + qcom,dump-size = <0x400>; + qcom,dump-id = <0x164>; + }; + + fsm_data { + qcom,dump-size = <0x400>; + qcom,dump-id = <0x165>; + }; + + scandump_smmu { + qcom,dump-size = <0x40000>; + qcom,dump-id = <0x220>; + }; + + scandump_gpu { + qcom,dump-size = <0x300000>; + qcom,dump-id = <0x221>; + }; + + scandump_ubwcp { + qcom,dump-size = <0x40000>; + qcom,dump-id = <0x222>; + }; + }; +}; From 103a530725176de1ea11298165dba263ebd175c2 Mon Sep 17 00:00:00 2001 From: Yuanfang Zhang Date: Thu, 9 Nov 2023 21:02:59 -0800 Subject: [PATCH 2/2] ARM: dts: msm: correct size for reserved dump_mem on sun Correct the reserved dump_mem size on sun. Change-Id: Ic7c4843f5789d2d75cdc19d2762e9e2651544996 Signed-off-by: Yuanfang Zhang --- qcom/sun-debug.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/qcom/sun-debug.dtsi b/qcom/sun-debug.dtsi index 9781b4b7..20aecbfc 100644 --- a/qcom/sun-debug.dtsi +++ b/qcom/sun-debug.dtsi @@ -13,7 +13,7 @@ alloc-ranges = <0x1 0x00000000 0xfffffffe 0xffffffff>; reusable; alignment = <0x0 0x400000>; - size = <0x0 0xb00000>; + size = <0x0 0xc00000>; }; };