samsung_sm8750/android_kernel_samsung_sm8750-devicetrees
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Merge ca1b75bdda on remote branch

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Change-Id: I275b8278e769ca9e5df71b1418b0649f84b37e41
This commit is contained in:
Linux Build Service Account
2024-11-19 05:56:51 -08:00
parent 7833cbc9d5 ca1b75bdda
commit 0c04d3488c
26 changed files with 1018 additions and 197 deletions
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18
Kbuild
View File

@@ -37,6 +37,24 @@ dtbo-y += volcano-qca6750.dtbo
dtbo-y += volcano6i-peach-cnss.dtbo
endif
ifeq ($(CONFIG_ARCH_TUNA),y)
dtbo-y += tuna-rcm-wcn7750.dtbo
dtbo-y += tuna-cdp-wcn7750.dtbo
dtbo-y += tuna-mtp-wcn7750.dtbo
dtbo-y += tuna-mtp-qmp1000-wcn7750.dtbo
dtbo-y += tuna-qrd-wcn7750.dtbo
dtbo-y += tuna-mtp-kiwi.dtbo
dtbo-y += tuna-rcm-kiwi.dtbo
dtbo-y += tuna-atp-kiwi.dtbo
endif
ifeq ($(CONFIG_ARCH_KERA),y)
dtbo-y += kera-atp-qca6750.dtbo
dtbo-y += kera-cdp-qca6750.dtbo
dtbo-y += kera-mtp-qca6750.dtbo
dtbo-y += kera-rcm-qca6750.dtbo
endif
always-y := $(dtb-y) $(dtbo-y)
subdir-y := $(dts-dirs)
clean-files := *.dtb *.dtbo

8
canoe-kiwi-cnss.dts
View File

@@ -12,8 +12,8 @@
/ {
model = "Qualcomm Technologies, Inc. Canoe SoCs";
compatible = "qcom,canoe", "qcom,canoep", "qcom,canoe-mtp", "qcom,canoe-cdp";
qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
<0x100026a 0x10000>, <0x100026a 0x20000>,
<0x100027f 0x10000>, <0x100027f 0x20000>;
qcom,board-id = <0x20001 0>, <0x20008 0>, <0x40015 0>;
qcom,msm-id = <0x294 0x10000>, <0x294 0x20000>, <0x295 0x10000>, <0x295 0x20000>,
<0x1000294 0x10000>, <0x1000294 0x20000>,
<0x1000295 0x10000>, <0x1000295 0x20000>;
qcom,board-id = <0x1000001 0>, <0x1000008 0>, <0x1000015 0>;
};

115
canoe-kiwi-cnss.dtsi
View File

@@ -65,13 +65,13 @@
&soc {
wlan_kiwi: qcom,cnss-kiwi@b0000000 {
compatible = "qcom,cnss-kiwi";
reg = <0xb0000000 0x10000>;
reg = <0x0 0xb0000000 0x0 0x10000>;
reg-names = "smmu_iova_ipa";
qcom,wlan-sw-ctrl-gpio = <&tlmm 19 0>;
supported-ids = <0x1107>;
wlan-en-gpio = <&tlmm 16 0>;
qcom,bt-en-gpio = <&pm8550vs_f_gpios 3 0>;
qcom,bt-en-gpio = <&pmh0104_gpios 5 0>;
qcom,sw-ctrl-gpio = <&tlmm 18 0>;
/* List of GPIOs to be setup for interrupt wakeup capable */
mpm_wake_set_gpios = <18 19>;
@@ -91,104 +91,21 @@
/* For AOP communication, use direct QMP instead of mailbox */
qcom,qmp = <&aoss_qmp>;
vdd-wlan-io-supply = <&L3F>;
qcom,vdd-wlan-io-config = <1800000 1800000 30000 0 1>;
vdd-wlan-io12-supply = <&L2F>;
qcom,vdd-wlan-io12-config = <1200000 1200000 30000 0 1>;
vdd-wlan-supply = <&S4J>;
qcom,vdd-wlan-config = <932000 1000000 0 0 0>;
vdd-wlan-aon-supply = <&S4D>;
qcom,vdd-wlan-aon-config = <976000 1036000 0 0 1>;
vdd-wlan-dig-supply = <&S1D>;
vdd-wlan-aon-supply = <&L2G>;
qcom,vdd-wlan-aon-config = <1800000 1800000 0 0 1>;
vdd-wlan-io12-supply = <&L3G>;
qcom,vdd-wlan-io12-config = <1200000 1200000 0 0 1>;
vdd-wlan-cx-supply = <&S1J>;
qcom,vdd-wlan-cx-config = <932000 1000000 0 0 1>;
vdd-wlan-dig-supply = <&S2J>;
qcom,vdd-wlan-dig-config = <916000 1100000 0 0 1>;
vdd-wlan-rfa1-supply = <&S3G>;
vdd-wlan-rfa1-supply = <&S8F>;
qcom,vdd-wlan-rfa1-config = <1864000 2000000 0 0 1>;
vdd-wlan-rfa2-supply = <&S7I>;
qcom,vdd-wlan-rfa2-config = <1316000 1340000 0 0 1>;
vdd-wlan-ant-share-supply = <&L6K>;
qcom,vdd-wlan-ant-share-config = <1800000 1800000 0 0 1>;
interconnects =
<&pcie_noc MASTER_PCIE_0 &pcie_noc SLAVE_ANOC_PCIE_GEM_NOC>,
<&gem_noc MASTER_ANOC_PCIE_GEM_NOC &mc_virt SLAVE_EBI1>;
interconnect-names = "pcie_to_memnoc", "memnoc_to_ddr";
qcom,icc-path-count = <2>;
qcom,bus-bw-cfg-count = <9>;
qcom,bus-bw-cfg =
/** ICC Path 1 **/
<0 0>, /* no vote */
/* idle: 0-18 Mbps snoc/anoc: 100 Mhz */
<2250 800000>,
/* low: 18-60 Mbps snoc/anoc: 100 Mhz */
<7500 800000>,
/* medium: 60-240 Mbps snoc/anoc: 100 Mhz */
<30000 800000>,
/* high: 240-1200 Mbps snoc/anoc: 100 Mhz */
<100000 800000>,
/* very high: > 1200 Mbps snoc/anoc: 403 Mhz */
<175000 3224000>,
/* ultra high: DBS mode snoc/anoc: 403 Mhz */
<312500 3224000>,
/* super high: DBS mode snoc/anoc: 533 Mhz */
<587500 4264000>,
/* low (latency critical): 18-60 Mbps snoc/anoc: 200 Mhz */
<7500 1600000>,
/** ICC Path 2 **/
<0 0>,
/* idle: 0-18 Mbps ddr: 547.2 MHz */
<2250 2188800>,
/* low: 18-60 Mbps ddr: 547.2 MHz */
<7500 2188800>,
/* medium: 60-240 Mbps ddr: 547.2 MHz */
<30000 2188800>,
/* high: 240-1200 Mbps ddr: 547.2 MHz */
<100000 2188800>,
/* very high: > 1200 Mbps ddr: 1555 MHz */
<175000 6220800>,
/* ultra high: DBS mode ddr: 2092 MHz */
<312500 8368000>,
/* super high: DBS mode ddr: 3.2 GHz */
<587500 12800000>,
/* low (latency critical): 18-60 Mbps ddr: 547.2 MHz */
<7500 2188800>;
qcom,vreg_pdc_map =
"s4j", "bb",
"s4d", "bb",
"s3g", "rf",
"s7i", "rf",
"s1d", "rf";
qcom,pmu_vreg_map =
"VDD095_MX_PMU", "s4d",
"VDD095_PMU", "s4j",
"VDD_PMU_AON_I", "s1d",
"VDD095_PMU_BT", "s1d",
"VDD09_PMU_RFA_I", "s1d",
"VDD13_PMU_PCIE_I", "s7i",
"VDD13_PMU_RFA_I", "s7i",
"VDD19_PMU_PCIE_I", "s3g",
"VDD19_PMU_RFA_I", "s3g";
qcom,pdc_init_table =
"{class: wlan_pdc, ss: rf, res: s3g.v, upval: 1856}",
"{class: wlan_pdc, ss: rf, res: s3g.v, dwnval: 1844}",
"{class: wlan_pdc, ss: rf, res: s7i.v, upval: 1316}",
"{class: wlan_pdc, ss: rf, res: s7i.v, dwnval: 972}",
"{class: wlan_pdc, ss: rf, res: s1d.m, enable: 1}",
"{class: wlan_pdc, ss: rf, res: s1d.v, enable: 1}",
"{class: wlan_pdc, ss: rf, res: s1d.v, upval: 916}",
"{class: wlan_pdc, ss: rf, res: s1d.v, dwnval: 880}",
"{class: wlan_pdc, ss: rf, res: s4j.m, enable: 0}",
"{class: wlan_pdc, ss: rf, res: s4j.v, enable: 0}",
"{class: wlan_pdc, ss: bb, res: s4d.v, upval: 976}",
"{class: wlan_pdc, ss: bb, res: s4d.v, dwnval: 536}",
"{class: wlan_pdc, ss: bb, res: s4j.m, enable: 1}",
"{class: wlan_pdc, ss: bb, res: s4j.v, enable: 1}",
"{class: wlan_pdc, ss: bb, res: s4j.v, upval: 932}",
"{class: wlan_pdc, ss: bb, res: s4j.v, dwnval: 444}";
vdd-wlan-rfa2-supply = <&S7F>;
qcom,vdd-wlan-rfa2-config = <1316000 1400000 0 0 1>;
//TODO: extractor regulator is required or not
// TODO PDC TABLE BUS BW
// PDC MAP AND PMU Vreg Map
/* cpu mask used for wlan tx rx interrupt affinity
* <cpumask_for_rx_interrupts cpumask_for_tx_comp_interrupts>
@@ -208,7 +125,7 @@
#size-cells = <1>;
cnss_pci0_iommu_region_partition: cnss_pci0_iommu_region_partition {
/* address-cells =3 size-cells=2 from sun-pcie.dtsi */
/* address-cells =3 size-cells=2 from canoe-pcie.dtsi */
iommu-addresses = <&cnss_pci0 0x0 0x0 0x0 0x0 0x98000000>,
<&cnss_pci0 0x0 0x0 0xB0000000 0x0 0x50000000>;
};

11
canoe-peach-cnss.dts
View File

@@ -10,11 +10,10 @@
#include "canoe-peach-cnss.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Sun SoCs";
model = "Qualcomm Technologies, Inc. Canoe SoCs";
compatible = "qcom,canoe", "qcom,canoep";
qcom,msm-id = <618 0x10000>, <618 0x20000>,
<639 0x10000>, <639 0x20000>,
<0x100026a 0x10000>, <0x100026a 0x20000>,
<0x100027f 0x10000>, <0x100027f 0x20000>;
qcom,board-id = <1 0>, <8 0>, <0x1000B 0>, <0x15 0>;
qcom,msm-id = <0x294 0x10000>, <0x294 0x20000>, <0x295 0x10000>, <0x295 0x20000>,
<0x1000294 0x10000>, <0x1000294 0x20000>, <0x1000295 0x10000>,
<0x1000295 0x20000>;
qcom,board-id = <1 0>, <8 0>, <0x10021 0>, <11 0>, <0x15 0>, <0x208 0>, <0x108 0>;
};

118
canoe-peach-cnss.dtsi
View File

@@ -52,12 +52,12 @@
cnss_host_sol_default: cnss_host_sol_default {
mux {
pins = "gpio202";
pins = "gpio204";
function = "gpio";
};
config {
pins = "gpio202";
pins = "gpio204";
drive-strength = <4>;
bias-pull-down;
};
@@ -78,16 +78,16 @@
&soc {
wlan_peach: qcom,cnss-peach@b0000000 {
compatible = "qcom,cnss-peach";
reg = <0xb0000000 0x10000>;
reg = <0x0 0xb0000000 0x0 0x10000>;
reg-names = "smmu_iova_ipa";
qcom,wlan-sw-ctrl-gpio = <&tlmm 19 0>;
supported-ids = <0x110E>;
wlan-en-gpio = <&tlmm 16 0>;
qcom,bt-en-gpio = <&pm8550vs_f_gpios 3 0>;
qcom,bt-en-gpio = <&pmh0104_gpios 5 0>;
qcom,sw-ctrl-gpio = <&tlmm 18 0>;
wlan-host-sol-gpio = <&tlmm 202 0>;
wlan-dev-sol-gpio = <&tlmm 203 0>;
wlan-host-sol-gpio = <&tlmm 204 0>;
wlan-dev-sol-gpio = <&tlmm 205 0>;
/* List of GPIOs to be setup for interrupt wakeup capable */
mpm_wake_set_gpios = <18 19>;
pinctrl-names = "wlan_en_active", "wlan_en_sleep", "sw_ctrl",
@@ -108,90 +108,36 @@
qcom,qmp = <&aoss_qmp>;
msix-match-addr = <0x3000>;
vdd-wlan-io-supply = <&L3F>;
qcom,vdd-wlan-io-config = <1800000 1800000 30000 0 1>;
vdd-wlan-io12-supply = <&L2F>;
vdd-wlan-aon-supply = <&L2G>;
qcom,vdd-wlan-aon-config = <1800000 1800000 30000 0 1>;
vdd-wlan-io12-supply = <&L3G>;
qcom,vdd-wlan-io12-config = <1200000 1200000 30000 0 1>;
vdd-wlan-aon-supply = <&S4D>;
qcom,vdd-wlan-aon-config = <876000 1036000 0 0 1>;
vdd-wlan-dig-supply = <&S4J>;
qcom,vdd-wlan-dig-config = <876000 1000000 0 0 1>;
vdd-wlan-rfa1-supply = <&S3G>;
qcom,vdd-wlan-rfa1-config = <1860000 2000000 0 0 1>;
vdd-wlan-rfa2-supply = <&S7I>;
qcom,vdd-wlan-rfa2-config = <1312000 1340000 0 0 1>;
vdd-wlan-ant-share-supply = <&L6K>;
qcom,vdd-wlan-ant-share-config = <1800000 1860000 0 0 1>;
interconnects =
<&pcie_noc MASTER_PCIE_0 &pcie_noc SLAVE_ANOC_PCIE_GEM_NOC>,
<&gem_noc MASTER_ANOC_PCIE_GEM_NOC &mc_virt SLAVE_EBI1>;
interconnect-names = "pcie_to_memnoc", "memnoc_to_ddr";
qcom,icc-path-count = <2>;
qcom,bus-bw-cfg-count = <9>;
qcom,bus-bw-cfg =
/** ICC Path 1 **/
<0 0>, /* no vote */
/* idle: 0-18 Mbps snoc/anoc: 100 Mhz */
<2250 800000>,
/* low: 18-60 Mbps snoc/anoc: 100 Mhz */
<7500 800000>,
/* medium: 60-240 Mbps snoc/anoc: 100 Mhz */
<30000 800000>,
/* high: 240-1200 Mbps snoc/anoc: 100 Mhz */
<100000 800000>,
/* very high: > 1200 Mbps snoc/anoc: 403 Mhz */
<175000 3224000>,
/* ultra high: DBS mode snoc/anoc: 403 Mhz */
<312500 3224000>,
/* super high: DBS mode snoc/anoc: 533 Mhz */
<587500 4264000>,
/* low (latency critical): 18-60 Mbps snoc/anoc: 200 Mhz */
<7500 1600000>,
/** ICC Path 2 **/
<0 0>,
/* idle: 0-18 Mbps ddr: 547.2 MHz */
<2250 2188800>,
/* low: 18-60 Mbps ddr: 547.2 MHz */
<7500 2188800>,
/* medium: 60-240 Mbps ddr: 547.2 MHz */
<30000 2188800>,
/* high: 240-1200 Mbps ddr: 547.2 MHz */
<100000 2188800>,
/* very high: > 1200 Mbps ddr: 1555 MHz */
<175000 6220800>,
/* ultra high: DBS mode ddr: 2092 MHz */
<312500 8368000>,
/* super high: DBS mode ddr: 3.2 GHz */
<587500 12800000>,
/* low (latency critical): 18-60 Mbps ddr: 547.2 MHz */
<7500 2188800>;
vdd-wlan-cx-supply = <&S1J>;
qcom,vdd-wlan-cx-config = <892000 1000000 0 0 1>;
vdd-wlan-dig-supply = <&S2J>;
qcom,vdd-wlan-dig-config = <892000 1000000 0 0 1>;
vdd-wlan-rfa1-supply = <&S8F>;
qcom,vdd-wlan-rfa1-config = <1876000 2000000 0 0 1>;
vdd-wlan-rfa2-supply = <&S7F>;
qcom,vdd-wlan-rfa2-config = <1328000 1340000 0 0 1>;
qcom,vreg_pdc_map =
"s4j", "rf",
"s4d", "bb",
"s3g", "rf",
"s7i", "rf";
"s1j", "bb",
"s2j", "rf",
"s7f", "rf",
"s8f", "rf";
qcom,pmu_vreg_map =
"VDDD_AON_0P9", "s4j",
"VDDA_RFA_1P9", "s3g",
"VDDA_RFA_1P3", "s7i",
"VDDA_RFA_0P9", "s4j",
"VDDD_WLMX_0P9", "s4d",
"VDDD_WLCX_0P9", "s4j",
"VDDD_BTCX_0P9", "s4j",
"VDDD_BTCMX_0P9", "s4j",
"VDDA_PCIE_1P2", "s7i",
"VDDA_PCIE_0P9", "s7i";
qcom,pdc_init_table =
"{class: wlan_pdc, ss: rf, res: s4j.m, enable: 1}",
"{class: wlan_pdc, ss: rf, res: s4j.v, enable: 1}",
"{class: wlan_pdc, ss: rf, res: s4j.v, upval: 876}",
"{class: wlan_pdc, ss: rf, res: s4j.v, dwnval: 876}";
"VDD_PMU_AON_I", "s2j",
"VDD09_PMU_RFA_I", "s2j",
"VDD19_PMU_RFA_I", "s8f",
"VDD13_PMU_RFA_I", "s7f",
"VDD095_MX_PMU", "s2j",
"VDD095_PMU_CX", "s1j",
"VDD095_PMU_BTCX", "s2j",
"VDD095_PMU_BTMX", "s2j",
"VDD13_PMU_PCIE_I", "s7f",
"VDD13_PMU_PCIE12_I", "s7f";
/* cpu mask used for wlan tx rx interrupt affinity
* <cpumask_for_rx_interrupts cpumask_for_tx_comp_interrupts>
@@ -207,7 +153,7 @@
memory-region = <&cnss_wlan_mem &cnss_pci0_iommu_region_partition>;
cnss_pci0_iommu_region_partition: cnss_pci0_iommu_region_partition {
/* address-cells =3 size-cells=2 from sun-pcie.dtsi */
/* address-cells =3 size-cells=2 from canoe-pcie.dtsi */
iommu-addresses = <&cnss_pci0 0x0 0x0 0x0 0x0 0x18000000>,
<&cnss_pci0 0x0 0x0 0xB0000000 0x0 0x50000000>;
};

16
kera-atp-qca6750.dts Normal file
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@@ -0,0 +1,16 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "kera-qca6750.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Kera ATP + MSL WLAN";
compatible = "qcom,kera-atp", "qcom,kera", "qcom,atp";
qcom,msm-id = <686 0x10000>, <659 0x10000>;
qcom,board-id = <0x000021 0>;
};

16
kera-cdp-qca6750.dts Normal file
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@@ -0,0 +1,16 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "kera-qca6750.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Kera CDP";
compatible = "qcom,kera-cdp", "qcom,kera", "qcom,cdp";
qcom,msm-id = <686 0x10000>, <659 0x10000>;
qcom,board-id = <0x010001 0>, <0x020001 0>, <0x030001 0>, <0x040001 0>;
};

16
kera-mtp-qca6750.dts Normal file
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@@ -0,0 +1,16 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "kera-qca6750.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Kera MTP";
compatible = "qcom,kera-mtp", "qcom,kera", "qcom,mtp";
qcom,msm-id = <686 0x10000>, <659 0x10000>;
qcom,board-id = <0x010008 0>, <0x020008 0>, <0x030008 0>;
};

16
kera-mtp-wcn7750.dts Normal file
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@@ -0,0 +1,16 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "kera-wcn7750.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Kera MTP";
compatible = "qcom,kera-mtp", "qcom,kera", "qcom,mtp";
qcom,msm-id = <686 0x10000>, <659 0x10000>;
qcom,board-id = <0x010008 1>, <0x020008 1>, <0x030008 1>;
};

123
kera-qca6750.dtsi Normal file
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@@ -0,0 +1,123 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
&soc {
qcom,smp2p-wpss {
smp2p_wlan_1_in: qcom,smp2p-wlan-1-in {
qcom,entry-name = "wlan";
interrupt-controller;
#interrupt-cells = <2>;
};
smp2p_wlan_1_out: qcom,smp2p-wlan-1-out {
qcom,entry-name = "wlan";
#qcom,smem-state-cells = <1>;
};
smp2p_wlan_2_in: qcom,smp2p-wlan-2-in {
qcom,entry-name = "wlan_soc_wake";
interrupt-controller;
#interrupt-cells = <2>;
};
smp2p_wlan_2_out: qcom,smp2p-wlan-2-out {
qcom,entry-name = "wlan_soc_wake";
#qcom,smem-state-cells = <1>;
};
smp2p_wlan_3_out: qcom,smp2p-wlan-3-out {
qcom,entry-name = "wlan_ep_power_save";
#qcom,smem-state-cells = <1>;
};
};
icnss2: qcom,wcn6750 {
compatible = "qcom,wcn6750";
reg = <0x17110040 0x0>,
<0xc0000000 0x10000>;
reg-names = "msi_addr", "smmu_iova_ipa";
qcom,rproc-handle = <&wpss_pas>;
iommus = <&apps_smmu 0x1480 0x1>;
wlan-en-gpio = <35>;
host-sol-gpio = <33>;
dev-sol-gpio = <32>;
wlan-sw-ctrl-gpio = <81>;
interrupts = <GIC_SPI 768 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 769 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 770 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 771 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 772 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 773 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 774 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 775 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 776 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 777 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 778 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 779 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 780 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 781 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 782 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 783 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 784 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 785 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 786 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 787 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 788 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 789 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 790 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 791 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 792 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 793 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 794 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 795 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 796 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 797 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 798 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 799 IRQ_TYPE_EDGE_RISING>;
qcom,iommu-dma = "fastmap";
qcom,iommu-faults = "stall-disable", "HUPCF", "non-fatal";
qcom,iommu-dma-addr-pool = <0xb0000000 0x10000000>;
qcom,iommu-geometry = <0xb0000000 0x10010000>;
dma-coherent;
qcom,fw-prefix;
qcom,wlan;
tsens = "sys-therm-3";
qcom,wlan-msa-fixed-region = <&wlan_msa_mem>;
qcom,smem-states = <&smp2p_wlan_1_out 0>,
<&smp2p_wlan_2_out 0>,
<&smp2p_wlan_3_out 0>;
qcom,smem-state-names = "wlan-smp2p-out",
"wlan-soc-wake-smp2p-out",
"wlan-ep-powersave-smp2p-out";
qcom,qmp = <&aoss_qmp>;
qcom,vreg_ol_cpr ="s3b";
icnss_cdev_apss: qcom,icnss_cdev1 {
#cooling-cells = <2>;
};
icnss_cdev_wpss: qcom,icnss_cdev2 {
#cooling-cells = <2>;
};
qcom,smp2p_map_wlan_1_in {
interrupts-extended = <&smp2p_wlan_1_in 0 0>,
<&smp2p_wlan_1_in 1 0>;
interrupt-names = "qcom,smp2p-force-fatal-error",
"qcom,smp2p-early-crash-ind";
};
qcom,smp2p_map_wlan_2_in {
interrupts-extended = <&smp2p_wlan_2_in 0 0>;
interrupt-names = "qcom,smp2p-soc-wake-ack";
};
};
};

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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "kera-wcn7750.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Kera QRD";
compatible = "qcom,kera-qrd", "qcom,kera", "qcom,qrd";
qcom,msm-id = <686 0x10000>, <659 0x10000>;
qcom,board-id = <0x01000B 0>, <0x02000B 0>, <0x03000B 0>;
};

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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "kera-qca6750.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Kera RCM";
compatible = "qcom,kera-rcm", "qcom,kera", "qcom,rcm";
qcom,msm-id = <686 0x10000>, <659 0x10000>;
qcom,board-id = <0x010015 0>, <0x020015 0>;
};

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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "kera-wcn7750.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Kera RCM";
compatible = "qcom,kera-rcm", "qcom,kera", "qcom,rcm";
qcom,msm-id = <686 0x10000>, <659 0x10000>;
qcom,board-id = <0x010015 1>, <0x020015 1>;
};

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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interconnect/qcom,kera.h>
&soc {
qcom,smp2p-wpss {
smp2p_wlan_1_in: qcom,smp2p-wlan-1-in {
qcom,entry-name = "wlan";
interrupt-controller;
#interrupt-cells = <2>;
};
smp2p_wlan_1_out: qcom,smp2p-wlan-1-out {
qcom,entry-name = "wlan";
#qcom,smem-state-cells = <1>;
};
smp2p_wlan_2_in: qcom,smp2p-wlan-2-in {
qcom,entry-name = "wlan_soc_wake";
interrupt-controller;
#interrupt-cells = <2>;
};
smp2p_wlan_2_out: qcom,smp2p-wlan-2-out {
qcom,entry-name = "wlan_soc_wake";
#qcom,smem-state-cells = <1>;
};
smp2p_wlan_3_out: qcom,smp2p-wlan-3-out {
qcom,entry-name = "wlan_ep_power_save";
#qcom,smem-state-cells = <1>;
};
};
wpss_pas: remoteproc-wpss@97000000 {
firmware-name = "wcn7750/wpss.mdt";
};
icnss2: qcom,wcn7750 {
compatible = "qcom,wcn7750";
reg = <0x17110040 0x0>,
<0xc0000000 0x10000>;
reg-names = "msi_addr", "smmu_iova_ipa";
qcom,rproc-handle = <&wpss_pas>;
iommus = <&apps_smmu 0x1480 0x1>;
wlan-en-gpio =<35>;
host-sol-gpio =<132>;
dev-sol-gpio =<32>;
wlan-sw-ctrl-gpio =<80>;
interrupts = <GIC_SPI 768 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 769 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 770 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 771 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 772 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 773 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 774 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 775 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 776 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 777 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 778 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 779 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 780 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 781 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 782 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 783 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 784 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 785 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 786 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 787 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 788 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 789 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 790 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 791 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 792 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 793 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 794 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 795 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 796 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 797 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 798 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 799 IRQ_TYPE_EDGE_RISING>;
qcom,iommu-dma = "fastmap";
qcom,iommu-faults = "stall-disable", "HUPCF", "non-fatal";
qcom,iommu-dma-addr-pool = <0xb0000000 0x10000000>;
qcom,iommu-geometry = <0xb0000000 0x10010000>;
dma-coherent;
qcom,fw-prefix;
qcom,wlan;
tsens = "sys-therm-3";
qcom,wlan-msa-fixed-region = <&wlan_msa_mem>;
vdd-cx-mx-supply = <&S3B>;
qcom,vdd-cx-mx-config = <880000 1040000 0 0 0>;
vdd-1.8-xo-supply = <&S1B>;
qcom,vdd-1.8-xo-config = <1856000 2104000 0 0 0>;
vdd-1.3-rfa-supply = <&S2B>;
qcom,vdd-1.3-rfa-config = <1256000 1408000 0 0 0>;
qcom,smem-states = <&smp2p_wlan_1_out 0>,
<&smp2p_wlan_2_out 0>,
<&smp2p_wlan_3_out 0>;
qcom,smem-state-names = "wlan-smp2p-out",
"wlan-soc-wake-smp2p-out",
"wlan-ep-powersave-smp2p-out";
qcom,qmp = <&aoss_qmp>;
qcom,vreg_ol_cpr ="s3b";
interconnects =
<&pcie_noc MASTER_PCIE_0 &pcie_noc SLAVE_ANOC_PCIE_GEM_NOC>,
<&gem_noc MASTER_ANOC_PCIE_GEM_NOC &mc_virt SLAVE_EBI1>;
interconnect-names = "pcie_to_memnoc", "memnoc_to_ddr";
qcom,icc-path-count = <2>;
qcom,bus-bw-cfg-count = <9>;
qcom,bus-bw-cfg =
/** ICC Path 1 **/
<0 0>, /* no vote */
/* idle: 0-18 Mbps snoc/anoc: 100 Mhz */
<2250 1200000>,
/* low: 18-60 Mbps snoc/anoc: 100 Mhz */
<7500 1200000>,
/* medium: 60-240 Mbps snoc/anoc: 100 Mhz */
<30000 1200000>,
/* high: 240-1200 Mbps snoc/anoc: 100 Mhz */
<100000 1200000>,
/* very high: > 1200 Mbps snoc/anoc: 403 Mhz */
<175000 3224000>,
/* ultra high: DBS mode snoc/anoc: 403 Mhz */
<312500 3224000>,
/* super high: DBS mode snoc/anoc: 533 Mhz */
<587500 4264000>,
/* low (latency critical): 18-60 Mbps snoc/anoc: 200 Mhz */
<7500 1600000>,
/** ICC Path 2 **/
<0 0>,
/* idle: 0-18 Mbps ddr: 451.2 MHz */
<2250 2188800>,
/* low: 18-60 Mbps ddr: 451.2 MHz */
<7500 2188800>,
/* medium: 60-240 Mbps ddr: 451.2 MHz */
<30000 2188800>,
/* high: 240-1200 Mbps ddr: 451.2 MHz */
<100000 2188800>,
/* very high: > 1200 Mbps ddr: 1555 MHz */
<175000 6220800>,
/* ultra high: DBS mode ddr: 2092 MHz */
<312500 8368000>,
/* super high: DBS mode ddr: 3.2 GHz */
<587500 12800000>,
/* low (latency critical): 18-60 Mbps ddr: 451.2 MHz */
<7500 2188800>;
icnss_cdev_apss: qcom,icnss_cdev1 {
#cooling-cells = <2>;
};
icnss_cdev_wpss: qcom,icnss_cdev2 {
#cooling-cells = <2>;
};
qcom,smp2p_map_wlan_1_in {
interrupts-extended = <&smp2p_wlan_1_in 0 0>,
<&smp2p_wlan_1_in 1 0>;
interrupt-names = "qcom,smp2p-force-fatal-error",
"qcom,smp2p-early-crash-ind";
};
qcom,smp2p_map_wlan_2_in {
interrupts-extended = <&smp2p_wlan_2_in 0 0>;
interrupt-names = "qcom,smp2p-soc-wake-ack";
};
};
};

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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "tuna-kiwi-cnss.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Tuna ATP + kiwi WLAN";
compatible = "qcom,tuna-atp", "qcom,tuna", "qcom,atp";
qcom,msm-id = <655 0x10000>, <681 0x10000>;
qcom,board-id = <33 0>;
};

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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "tuna-wcn7750.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Tuna CDP";
compatible = "qcom,tuna-cdp", "qcom,tuna", "qcom,cdp";
qcom,msm-id = <655 0x10000>, <681 0x10000>;
qcom,board-id = <1 0>;
};

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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <dt-bindings/interconnect/qcom,tuna.h>
&wlan_msa_mem {
status = "disabled";
};
&wpss_mem {
status = "disabled";
};
&wpss_pas {
status = "disabled";
};
&pcie0 {
status = "ok";
};
&tlmm {
cnss_pins {
cnss_wlan_en_active: cnss_wlan_en_active {
mux {
pins = "gpio35";
function = "gpio";
};
config {
pins = "gpio35";
drive-strength = <16>;
output-high;
bias-pull-up;
};
};
cnss_wlan_en_sleep: cnss_wlan_en_sleep {
mux {
pins = "gpio35";
function = "gpio";
};
config {
pins = "gpio35";
drive-strength = <2>;
output-low;
bias-pull-down;
};
};
cnss_wlan_sw_ctrl: cnss_wlan_sw_ctrl {
mux {
pins = "gpio80";
function = "wcn_sw_ctrl";
};
};
cnss_wlan_sw_ctrl_wl_cx: cnss_wlan_sw_ctrl_wl_cx {
mux {
pins = "gpio34";
function = "wcn_sw";
};
};
};
};
&reserved_memory {
cnss_wlan_mem: cnss_wlan_region {
compatible = "shared-dma-pool";
alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
reusable;
alignment = <0x0 0x400000>;
size = <0x0 0x2000000>;
};
};
&soc {
wlan_kiwi: qcom,cnss-kiwi@b0000000 {
compatible = "qcom,cnss-kiwi";
reg = <0xb0000000 0x10000>;
reg-names = "smmu_iova_ipa";
qcom,wlan-sw-ctrl-gpio = <&tlmm 34 0>;
supported-ids = <0x1107>;
wlan-en-gpio = <&tlmm 35 0>;
qcom,bt-en-gpio = <&pm8550vs_g_gpios 4 0>;
qcom,sw-ctrl-gpio = <&tlmm 80 0>;
/* List of GPIOs to be setup for interrupt wakeup capable */
mpm_wake_set_gpios = <80 34>;
pinctrl-names = "wlan_en_active", "wlan_en_sleep", "sw_ctrl",
"sw_ctrl_wl_cx";
pinctrl-0 = <&cnss_wlan_en_active>;
pinctrl-1 = <&cnss_wlan_en_sleep>;
pinctrl-2 = <&cnss_wlan_sw_ctrl>;
pinctrl-3 = <&cnss_wlan_sw_ctrl_wl_cx>;
qcom,wlan;
qcom,wlan-rc-num = <0>;
qcom,wlan-ramdump-dynamic = <0x780000>;
cnss-enable-self-recovery;
qcom,wlan-cbc-enabled;
use-pm-domain;
qcom,same-dt-multi-dev;
/* For AOP communication, use direct QMP instead of mailbox */
qcom,qmp = <&aoss_qmp>;
vdd-wlan-io-supply = <&L3G>;
qcom,vdd-wlan-io-config = <1800000 1800000 30000 0 1>;
vdd-wlan-io12-supply = <&L2G>;
qcom,vdd-wlan-io12-config = <1200000 1200000 30000 0 1>;
vdd-wlan-supply = <&S1G>;
qcom,vdd-wlan-config = <940000 1003000 0 0 1>;
vdd-wlan-dig-supply = <&S3B>;
qcom,vdd-wlan-dig-config = <976000 1040000 0 0 1>;
vdd-wlan-rfa1-supply = <&S1B>;
qcom,vdd-wlan-rfa1-config = <1864000 2104000 0 0 1>;
vdd-wlan-rfa2-supply = <&S2B>;
qcom,vdd-wlan-rfa2-config = <1316000 1408000 0 0 1>;
vdd-wlan-ant-share-supply = <&L6K>;
qcom,vdd-wlan-ant-share-config = <1800000 2000000 0 0 1>;
interconnects =
<&pcie_noc MASTER_PCIE_0 &pcie_noc SLAVE_ANOC_PCIE_GEM_NOC>,
<&gem_noc MASTER_ANOC_PCIE_GEM_NOC &mc_virt SLAVE_EBI1>;
interconnect-names = "pcie_to_memnoc", "memnoc_to_ddr";
qcom,icc-path-count = <2>;
qcom,bus-bw-cfg-count = <9>;
qcom,bus-bw-cfg =
/** ICC Path 1 **/
<0 0>, /* no vote */
/* idle: 0-18 Mbps snoc/anoc: 100 Mhz */
<2250 1200000>,
/* low: 18-60 Mbps snoc/anoc: 100 Mhz */
<7500 1200000>,
/* medium: 60-240 Mbps snoc/anoc: 100 Mhz */
<30000 1200000>,
/* high: 240-1200 Mbps snoc/anoc: 100 Mhz */
<100000 1200000>,
/* very high: > 1200 Mbps snoc/anoc: 403 Mhz */
<175000 3224000>,
/* ultra high: DBS mode snoc/anoc: 403 Mhz */
<312500 3224000>,
/* super high: DBS mode snoc/anoc: 533 Mhz */
<587500 4264000>,
/* low (latency critical): 18-60 Mbps snoc/anoc: 200 Mhz */
<7500 1600000>,
/** ICC Path 2 **/
<0 0>,
/* idle: 0-18 Mbps ddr: 451.2 MHz */
<2250 2188800>,
/* low: 18-60 Mbps ddr: 451.2 MHz */
<7500 2188800>,
/* medium: 60-240 Mbps ddr: 451.2 MHz */
<30000 2188800>,
/* high: 240-1200 Mbps ddr: 451.2 MHz */
<100000 2188800>,
/* very high: > 1200 Mbps ddr: 1555 MHz */
<175000 6220800>,
/* ultra high: DBS mode ddr: 2092 MHz */
<312500 8368000>,
/* super high: DBS mode ddr: 3.2 GHz */
<587500 12800000>,
/* low (latency critical): 18-60 Mbps ddr: 451.2 MHz */
<7500 2188800>;
qcom,pdc_init_table =
" {class: wlan_pdc, ss: rf, res: s3b.v, upval: 976}",
" {class: wlan_pdc, ss: rf, res: s3b.v, dwnval: 616}",
" {class: wlan_pdc, ss: rf, res: s1g.m, enable: 0}",
" {class: wlan_pdc, ss: rf, res: l18b.m, enable: 0}",
" {class: wlan_pdc, ss: rf, res: b1b.m, enable: 0}",
" {class: wlan_pdc, ss: rf, res: l4k.m, enable: 0}",
" {class: wlan_pdc, ss: rf, res: l2g.m, dwnval: 3}",
" {class: wlan_pdc, ss: bb, res: pdc, enable: 1}";
/* cpu mask used for wlan tx rx interrupt affinity
* <cpumask_for_rx_interrupts cpumask_for_tx_comp_interrupts>
*/
wlan-txrx-intr-cpumask = <0x3 0x30>;
};
};
&pcie0_rp {
cnss_pci0: cnss_pci0 {
reg = <0 0 0 0 0>;
qcom,iommu-group = <&cnss_pci_iommu_group0>;
memory-region =
<&cnss_wlan_mem &cnss_pci0_iommu_region_partition>;
#address-cells = <1>;
#size-cells = <1>;
cnss_pci0_iommu_region_partition:
cnss_pci0_iommu_region_partition {
/* address-cells =3 size-cells=2 from sun-pcie.dtsi */
iommu-addresses = <&cnss_pci0 0x0 0x0 0x0 0x0 0x98000000>,
<&cnss_pci0 0x0 0x0 0xB0000000 0x0 0x50000000>;
};
cnss_pci_iommu_group0: cnss_pci_iommu_group0 {
qcom,iommu-msi-size = <0x1000>;
qcom,iommu-geometry = <0x98000000 0x18010000>;
qcom,iommu-dma = "fastmap";
qcom,iommu-pagetable = "coherent";
qcom,iommu-faults = "stall-disable", "HUPCF",
"non-fatal";
};
};
};

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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "tuna-kiwi-cnss.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Tuna MTP + kiwi WLAN";
compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,mtp";
qcom,msm-id = <655 0x10000>, <681 0x10000>;
qcom,board-id = <8 2>, <8 3>;
};

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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "tuna-wcn7750.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Tuna MTP QMP1000";
compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,mtp";
qcom,msm-id = <655 0x10000>, <681 0x10000>;
qcom,board-id = <8 1>;
};

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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "tuna-wcn7750.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Tuna MTP";
compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,mtp";
qcom,msm-id = <655 0x10000>, <681 0x10000>;
qcom,board-id = <8 0>, <8 4>;
};

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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "tuna-wcn7750.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Tuna QRD";
compatible = "qcom,tuna-qrd", "qcom,tuna", "qcom,qrd";
qcom,msm-id = <655 0x10000>, <681 0x10000>;
qcom,board-id = <11 0>;
};

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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "tuna-kiwi-cnss.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Tuna RCM + kiwi WLAN";
compatible = "qcom,tuna-rcm", "qcom,tuna", "qcom,rcm";
qcom,msm-id = <655 0x10000>, <681 0x10000>;
qcom,board-id = <21 1>;
};

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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "tuna-wcn7750.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Tuna RCM";
compatible = "qcom,tuna-rcm", "qcom,tuna", "qcom,rcm";
qcom,msm-id = <655 0x10000>, <681 0x10000>;
qcom,board-id = <21 0>;
};

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tuna-wcn7750.dtsi Normal file
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@@ -0,0 +1,177 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interconnect/qcom,tuna.h>
&soc {
qcom,smp2p-wpss {
smp2p_wlan_1_in: qcom,smp2p-wlan-1-in {
qcom,entry-name = "wlan";
interrupt-controller;
#interrupt-cells = <2>;
};
smp2p_wlan_1_out: qcom,smp2p-wlan-1-out {
qcom,entry-name = "wlan";
#qcom,smem-state-cells = <1>;
};
smp2p_wlan_2_in: qcom,smp2p-wlan-2-in {
qcom,entry-name = "wlan_soc_wake";
interrupt-controller;
#interrupt-cells = <2>;
};
smp2p_wlan_2_out: qcom,smp2p-wlan-2-out {
qcom,entry-name = "wlan_soc_wake";
#qcom,smem-state-cells = <1>;
};
smp2p_wlan_3_out: qcom,smp2p-wlan-3-out {
qcom,entry-name = "wlan_ep_power_save";
#qcom,smem-state-cells = <1>;
};
};
icnss2: qcom,wcn7750 {
compatible = "qcom,wcn7750";
reg = <0x17110040 0x0>,
<0xc0000000 0x10000>;
reg-names = "msi_addr", "smmu_iova_ipa";
qcom,rproc-handle = <&wpss_pas>;
iommus = <&apps_smmu 0x1480 0x1>;
wlan-en-gpio =<35>;
host-sol-gpio =<132>;
dev-sol-gpio =<32>;
wlan-sw-ctrl-gpio =<80>;
interrupts = <GIC_SPI 768 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 769 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 770 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 771 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 772 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 773 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 774 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 775 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 776 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 777 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 778 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 779 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 780 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 781 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 782 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 783 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 784 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 785 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 786 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 787 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 788 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 789 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 790 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 791 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 792 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 793 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 794 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 795 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 796 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 797 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 798 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 799 IRQ_TYPE_EDGE_RISING>;
qcom,iommu-dma = "fastmap";
qcom,iommu-faults = "stall-disable", "HUPCF", "non-fatal";
qcom,iommu-dma-addr-pool = <0xb0000000 0x10000000>;
qcom,iommu-geometry = <0xb0000000 0x10010000>;
dma-coherent;
qcom,fw-prefix;
qcom,wlan;
tsens = "sys-therm-3";
qcom,wlan-msa-fixed-region = <&wlan_msa_mem>;
vdd-cx-mx-supply = <&S3B>;
qcom,vdd-cx-mx-config = <880000 1040000 0 0 0>;
vdd-1.8-xo-supply = <&S1B>;
qcom,vdd-1.8-xo-config = <1856000 2104000 0 0 0>;
vdd-1.3-rfa-supply = <&S2B>;
qcom,vdd-1.3-rfa-config = <1256000 1408000 0 0 0>;
qcom,smem-states = <&smp2p_wlan_1_out 0>,
<&smp2p_wlan_2_out 0>,
<&smp2p_wlan_3_out 0>;
qcom,smem-state-names = "wlan-smp2p-out",
"wlan-soc-wake-smp2p-out",
"wlan-ep-powersave-smp2p-out";
qcom,qmp = <&aoss_qmp>;
qcom,vreg_ol_cpr ="s3b";
interconnects =
<&pcie_noc MASTER_PCIE_0 &pcie_noc SLAVE_ANOC_PCIE_GEM_NOC>,
<&gem_noc MASTER_ANOC_PCIE_GEM_NOC &mc_virt SLAVE_EBI1>;
interconnect-names = "pcie_to_memnoc", "memnoc_to_ddr";
qcom,icc-path-count = <2>;
qcom,bus-bw-cfg-count = <9>;
qcom,bus-bw-cfg =
/** ICC Path 1 **/
<0 0>, /* no vote */
/* idle: 0-18 Mbps snoc/anoc: 100 Mhz */
<2250 1200000>,
/* low: 18-60 Mbps snoc/anoc: 100 Mhz */
<7500 1200000>,
/* medium: 60-240 Mbps snoc/anoc: 100 Mhz */
<30000 1200000>,
/* high: 240-1200 Mbps snoc/anoc: 100 Mhz */
<100000 1200000>,
/* very high: > 1200 Mbps snoc/anoc: 403 Mhz */
<175000 3224000>,
/* ultra high: DBS mode snoc/anoc: 403 Mhz */
<312500 3224000>,
/* super high: DBS mode snoc/anoc: 533 Mhz */
<587500 4264000>,
/* low (latency critical): 18-60 Mbps snoc/anoc: 200 Mhz */
<7500 1600000>,
/** ICC Path 2 **/
<0 0>,
/* idle: 0-18 Mbps ddr: 451.2 MHz */
<2250 2188800>,
/* low: 18-60 Mbps ddr: 451.2 MHz */
<7500 2188800>,
/* medium: 60-240 Mbps ddr: 451.2 MHz */
<30000 2188800>,
/* high: 240-1200 Mbps ddr: 451.2 MHz */
<100000 2188800>,
/* very high: > 1200 Mbps ddr: 1555 MHz */
<175000 6220800>,
/* ultra high: DBS mode ddr: 2092 MHz */
<312500 8368000>,
/* super high: DBS mode ddr: 3.2 GHz */
<587500 12800000>,
/* low (latency critical): 18-60 Mbps ddr: 451.2 MHz */
<7500 2188800>;
icnss_cdev_apss: qcom,icnss_cdev1 {
#cooling-cells = <2>;
};
icnss_cdev_wpss: qcom,icnss_cdev2 {
#cooling-cells = <2>;
};
qcom,smp2p_map_wlan_1_in {
interrupts-extended = <&smp2p_wlan_1_in 0 0>,
<&smp2p_wlan_1_in 1 0>;
interrupt-names = "qcom,smp2p-force-fatal-error",
"qcom,smp2p-early-crash-ind";
};
qcom,smp2p_map_wlan_2_in {
interrupts-extended = <&smp2p_wlan_2_in 0 0>;
interrupt-names = "qcom,smp2p-soc-wake-ack";
};
};
};

2
volcano-qca6750.dts
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@@ -12,6 +12,6 @@
/ {
model = "Qualcomm Technologies, Inc. Volcano SoC";
compatible = "qcom,volcano";
qcom,msm-id = <636 0x10000>, <640 0x10000>, <657 0x10000>, <658 0x10000>, <0X10291 0x10000>, <0x10292 0x10000>, <0x20291 0x10000>, <0x20292 0x10000>, <0x30291 0x10000>, <0x30292 0x10000>, <0x40291 0x10000>, <0x40292 0x10000>;
qcom,msm-id = <636 0x10000>, <640 0x10000>, <0x4000291 0x10000>, <0x8000291 0x10000>, <0xc000291 0x10000>, <0x10000291 0x10000>, <0x4000292 0x10000>, <0x8000292 0x10000>, <0xc000292 0x10000>, <0x10000292 0x10000>;
qcom,board-id = <0 0>;
};

2
volcano6i-peach-cnss.dts
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@@ -14,6 +14,6 @@
compatible = "qcom,volcano-idp", "qcom,volcano", "qcom,volcanop-idp",
"qcom,volcanop", "qcom,idp", "qcom,volcano-mtp",
"qcom,volcanop-mtp", "qcom,mtp";
qcom,msm-id = <657 0x10000>, <658 0x10000>, <0X10291 0x10000>, <0x10292 0x10000>, <0x20291 0x10000>, <0x20292 0x10000>, <0x30291 0x10000>, <0x30292 0x10000>, <0x40291 0x10000>, <0x40292 0x10000>;
qcom,msm-id = <0x4000291 0x10000>, <0x8000291 0x10000>, <0xc000291 0x10000>, <0x10000291 0x10000>, <0x4000292 0x10000>, <0x8000292 0x10000>, <0xc000292 0x10000>, <0x10000292 0x10000>;
qcom,board-id = <8 2>, <8 3>, <8 4>, <8 5>, <8 6>, <34 2>, <34 3>;
};