From 548c30e08a9efe715560fb5c41507b12d1bf3dc0 Mon Sep 17 00:00:00 2001 From: Kartikey Arora Date: Tue, 3 Sep 2024 11:26:12 +0530 Subject: [PATCH 01/14] ARM: dts: msm: Add opensource wlan device tree support for tuna-wcn7750 This change adds wlan related dt files for tuna-wcn7750 which has icnss and wpss dtsi node enabled. Change-Id: I59167fbff63c7a54836452f6f29e4ede14f3f4c7 CRs-Fixed: 3940163 --- Kbuild | 8 ++ tuna-cdp-wcn7750.dts | 17 ++++ tuna-mtp-qmp1000-wcn7750.dts | 17 ++++ tuna-mtp-wcn7750.dts | 17 ++++ tuna-qrd-wcn7750.dts | 17 ++++ tuna-rcm-wcn7750.dts | 17 ++++ tuna-wcn7750.dtsi | 170 +++++++++++++++++++++++++++++++++++ 7 files changed, 263 insertions(+) create mode 100644 tuna-cdp-wcn7750.dts create mode 100644 tuna-mtp-qmp1000-wcn7750.dts create mode 100644 tuna-mtp-wcn7750.dts create mode 100644 tuna-qrd-wcn7750.dts create mode 100644 tuna-rcm-wcn7750.dts create mode 100644 tuna-wcn7750.dtsi diff --git a/Kbuild b/Kbuild index 0bb96dcb..0ae9166a 100644 --- a/Kbuild +++ b/Kbuild @@ -37,6 +37,14 @@ dtbo-y += volcano-qca6750.dtbo dtbo-y += volcano6i-peach-cnss.dtbo endif +ifeq ($(CONFIG_ARCH_TUNA),y) +dtbo-y += tuna-rcm-wcn7750.dtbo +dtbo-y += tuna-cdp-wcn7750.dtbo +dtbo-y += tuna-mtp-wcn7750.dtbo +dtbo-y += tuna-mtp-qmp1000-wcn7750.dtbo +dtbo-y += tuna-qrd-wcn7750.dtbo +endif + always-y := $(dtb-y) $(dtbo-y) subdir-y := $(dts-dirs) clean-files := *.dtb *.dtbo diff --git a/tuna-cdp-wcn7750.dts b/tuna-cdp-wcn7750.dts new file mode 100644 index 00000000..429f4fdc --- /dev/null +++ b/tuna-cdp-wcn7750.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "tuna-wcn7750.dtsi" + +/ { + + model = "Qualcomm Technologies, Inc. Tuna CDP"; + compatible = "qcom,tuna-cdp", "qcom,tuna", "qcom,cdp"; + qcom,msm-id = <655 0x10000>, <681 0x10000>; + qcom,board-id = <1 0>; +}; diff --git a/tuna-mtp-qmp1000-wcn7750.dts b/tuna-mtp-qmp1000-wcn7750.dts new file mode 100644 index 00000000..aca592ef --- /dev/null +++ b/tuna-mtp-qmp1000-wcn7750.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "tuna-wcn7750.dtsi" + +/ { + + model = "Qualcomm Technologies, Inc. Tuna MTP QMP1000"; + compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,mtp"; + qcom,msm-id = <655 0x10000>, <681 0x10000>; + qcom,board-id = <8 1>; +}; diff --git a/tuna-mtp-wcn7750.dts b/tuna-mtp-wcn7750.dts new file mode 100644 index 00000000..4676d7f0 --- /dev/null +++ b/tuna-mtp-wcn7750.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "tuna-wcn7750.dtsi" + +/ { + + model = "Qualcomm Technologies, Inc. Tuna MTP"; + compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,mtp"; + qcom,msm-id = <655 0x10000>, <681 0x10000>; + qcom,board-id = <8 0>; +}; diff --git a/tuna-qrd-wcn7750.dts b/tuna-qrd-wcn7750.dts new file mode 100644 index 00000000..dfd9ea29 --- /dev/null +++ b/tuna-qrd-wcn7750.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "tuna-wcn7750.dtsi" + +/ { + + model = "Qualcomm Technologies, Inc. Tuna QRD"; + compatible = "qcom,tuna-qrd", "qcom,tuna", "qcom,qrd"; + qcom,msm-id = <655 0x10000>, <681 0x10000>; + qcom,board-id = <11 0>; +}; diff --git a/tuna-rcm-wcn7750.dts b/tuna-rcm-wcn7750.dts new file mode 100644 index 00000000..c2796916 --- /dev/null +++ b/tuna-rcm-wcn7750.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "tuna-wcn7750.dtsi" + +/ { + + model = "Qualcomm Technologies, Inc. Tuna RCM"; + compatible = "qcom,tuna-rcm", "qcom,tuna", "qcom,rcm"; + qcom,msm-id = <655 0x10000>, <681 0x10000>; + qcom,board-id = <21 0>; +}; diff --git a/tuna-wcn7750.dtsi b/tuna-wcn7750.dtsi new file mode 100644 index 00000000..979d3f34 --- /dev/null +++ b/tuna-wcn7750.dtsi @@ -0,0 +1,170 @@ +// SPDX-License-Identifier: BSD-3-Clause + +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include + +&soc { + qcom,smp2p-wpss { + smp2p_wlan_1_in: qcom,smp2p-wlan-1-in { + qcom,entry-name = "wlan"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + smp2p_wlan_1_out: qcom,smp2p-wlan-1-out { + qcom,entry-name = "wlan"; + #qcom,smem-state-cells = <1>; + }; + + smp2p_wlan_2_in: qcom,smp2p-wlan-2-in { + qcom,entry-name = "wlan_soc_wake"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + smp2p_wlan_2_out: qcom,smp2p-wlan-2-out { + qcom,entry-name = "wlan_soc_wake"; + #qcom,smem-state-cells = <1>; + }; + + smp2p_wlan_3_out: qcom,smp2p-wlan-3-out { + qcom,entry-name = "wlan_ep_power_save"; + #qcom,smem-state-cells = <1>; + }; + }; + + icnss2: qcom,wcn7750 { + compatible = "qcom,wcn7750"; + reg = <0x17110040 0x0>, + <0xc0000000 0x10000>; + reg-names = "msi_addr", "smmu_iova_ipa"; + qcom,rproc-handle = <&wpss_pas>; + iommus = <&apps_smmu 0x1480 0x1>; + wlan-en-gpio =<35>; + host-sol-gpio =<132>; + dev-sol-gpio =<32>; + wlan-sw-ctrl-gpio =<80>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + + qcom,iommu-dma = "fastmap"; + qcom,iommu-faults = "stall-disable", "HUPCF", "non-fatal"; + qcom,iommu-dma-addr-pool = <0xb0000000 0x10000000>; + qcom,iommu-geometry = <0xb0000000 0x10010000>; + dma-coherent; + qcom,fw-prefix; + qcom,wlan; + tsens = "sys-therm-3"; + qcom,wlan-msa-fixed-region = <&wlan_msa_mem>; + + qcom,smem-states = <&smp2p_wlan_1_out 0>, + <&smp2p_wlan_2_out 0>, + <&smp2p_wlan_3_out 0>; + qcom,smem-state-names = "wlan-smp2p-out", + "wlan-soc-wake-smp2p-out", + "wlan-ep-powersave-smp2p-out"; + + qcom,qmp = <&aoss_qmp>; + qcom,vreg_ol_cpr ="s3b"; + + interconnects = + <&pcie_anoc MASTER_PCIE_0 &pcie_anoc SLAVE_ANOC_PCIE_GEM_NOC>, + <&gem_noc MASTER_ANOC_PCIE_GEM_NOC &mc_virt SLAVE_EBI1>; + interconnect-names = "pcie_to_memnoc", "memnoc_to_ddr"; + + qcom,icc-path-count = <2>; + qcom,bus-bw-cfg-count = <9>; + qcom,bus-bw-cfg = + /** ICC Path 1 **/ + <0 0>, /* no vote */ + /* idle: 0-18 Mbps snoc/anoc: 100 Mhz */ + <2250 1200000>, + /* low: 18-60 Mbps snoc/anoc: 100 Mhz */ + <7500 1200000>, + /* medium: 60-240 Mbps snoc/anoc: 100 Mhz */ + <30000 1200000>, + /* high: 240-1200 Mbps snoc/anoc: 100 Mhz */ + <100000 1200000>, + /* very high: > 1200 Mbps snoc/anoc: 403 Mhz */ + <175000 3224000>, + /* ultra high: DBS mode snoc/anoc: 403 Mhz */ + <312500 3224000>, + /* super high: DBS mode snoc/anoc: 533 Mhz */ + <587500 4264000>, + /* low (latency critical): 18-60 Mbps snoc/anoc: 200 Mhz */ + <7500 1600000>, + + /** ICC Path 2 **/ + <0 0>, + /* idle: 0-18 Mbps ddr: 451.2 MHz */ + <2250 2188800>, + /* low: 18-60 Mbps ddr: 451.2 MHz */ + <7500 2188800>, + /* medium: 60-240 Mbps ddr: 451.2 MHz */ + <30000 2188800>, + /* high: 240-1200 Mbps ddr: 451.2 MHz */ + <100000 2188800>, + /* very high: > 1200 Mbps ddr: 1555 MHz */ + <175000 6220800>, + /* ultra high: DBS mode ddr: 2092 MHz */ + <312500 8368000>, + /* super high: DBS mode ddr: 3.2 GHz */ + <587500 12800000>, + /* low (latency critical): 18-60 Mbps ddr: 451.2 MHz */ + <7500 2188800>; + + icnss_cdev_apss: qcom,icnss_cdev1 { + #cooling-cells = <2>; + }; + + icnss_cdev_wpss: qcom,icnss_cdev2 { + #cooling-cells = <2>; + }; + + qcom,smp2p_map_wlan_1_in { + interrupts-extended = <&smp2p_wlan_1_in 0 0>, + <&smp2p_wlan_1_in 1 0>; + interrupt-names = "qcom,smp2p-force-fatal-error", + "qcom,smp2p-early-crash-ind"; + }; + + qcom,smp2p_map_wlan_2_in { + interrupts-extended = <&smp2p_wlan_2_in 0 0>; + interrupt-names = "qcom,smp2p-soc-wake-ack"; + }; + }; +}; From e026734e7df61361b57ef0d122463e9d9fa18855 Mon Sep 17 00:00:00 2001 From: Surabhi Vishnoi Date: Fri, 27 Sep 2024 11:20:13 +0530 Subject: [PATCH 02/14] ARM: dts: msm: Add updated msm-id for soft sku in Milos target This change updates the msm-id in new format for soft sku in Milos target. Change-Id: Ic386689c82605cb0c287edb8d9fe63ecf806d558 CRs-Fixed: 3944573 --- volcano-qca6750.dts | 2 +- volcano6i-peach-cnss.dts | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/volcano-qca6750.dts b/volcano-qca6750.dts index 52b1a039..385ad760 100644 --- a/volcano-qca6750.dts +++ b/volcano-qca6750.dts @@ -12,6 +12,6 @@ / { model = "Qualcomm Technologies, Inc. Volcano SoC"; compatible = "qcom,volcano"; - qcom,msm-id = <636 0x10000>, <640 0x10000>, <657 0x10000>, <658 0x10000>, <0X10291 0x10000>, <0x10292 0x10000>, <0x20291 0x10000>, <0x20292 0x10000>, <0x30291 0x10000>, <0x30292 0x10000>, <0x40291 0x10000>, <0x40292 0x10000>; + qcom,msm-id = <636 0x10000>, <640 0x10000>, <0x4000291 0x10000>, <0x8000291 0x10000>, <0xc000291 0x10000>, <0x10000291 0x10000>, <0x4000292 0x10000>, <0x8000292 0x10000>, <0xc000292 0x10000>, <0x10000292 0x10000>; qcom,board-id = <0 0>; }; diff --git a/volcano6i-peach-cnss.dts b/volcano6i-peach-cnss.dts index bd568cb1..df9455da 100644 --- a/volcano6i-peach-cnss.dts +++ b/volcano6i-peach-cnss.dts @@ -14,6 +14,6 @@ compatible = "qcom,volcano-idp", "qcom,volcano", "qcom,volcanop-idp", "qcom,volcanop", "qcom,idp", "qcom,volcano-mtp", "qcom,volcanop-mtp", "qcom,mtp"; - qcom,msm-id = <657 0x10000>, <658 0x10000>, <0X10291 0x10000>, <0x10292 0x10000>, <0x20291 0x10000>, <0x20292 0x10000>, <0x30291 0x10000>, <0x30292 0x10000>, <0x40291 0x10000>, <0x40292 0x10000>; + qcom,msm-id = <0x4000291 0x10000>, <0x8000291 0x10000>, <0xc000291 0x10000>, <0x10000291 0x10000>, <0x4000292 0x10000>, <0x8000292 0x10000>, <0xc000292 0x10000>, <0x10000292 0x10000>; qcom,board-id = <8 2>, <8 3>, <8 4>, <8 5>, <8 6>, <34 2>, <34 3>; }; From 123cc2aa91ac11fae8978c9234e97dd0ef4f0cce Mon Sep 17 00:00:00 2001 From: Kartikey Arora Date: Wed, 9 Oct 2024 11:51:36 +0530 Subject: [PATCH 03/14] ARM: dts: msm: Update regulators config in tuna-wcn7750.dtsi This change adds regulator config in tuna-wcn7750.dtsi and update pcie_anoc to pcie_noc in bus bandwidth config params. Change-Id: I77e680aaed87b9b4faabb660202377abcd9777c1 CRs-Fixed: 3944462 --- tuna-wcn7750.dtsi | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/tuna-wcn7750.dtsi b/tuna-wcn7750.dtsi index 979d3f34..2369b84e 100644 --- a/tuna-wcn7750.dtsi +++ b/tuna-wcn7750.dtsi @@ -91,6 +91,13 @@ tsens = "sys-therm-3"; qcom,wlan-msa-fixed-region = <&wlan_msa_mem>; + vdd-cx-mx-supply = <&S3B>; + qcom,vdd-cx-mx-config = <880000 1040000 0 0 0>; + vdd-1.8-xo-supply = <&S1B>; + qcom,vdd-1.8-xo-config = <1856000 2104000 0 0 0>; + vdd-1.3-rfa-supply = <&S2B>; + qcom,vdd-1.3-rfa-config = <1256000 1408000 0 0 0>; + qcom,smem-states = <&smp2p_wlan_1_out 0>, <&smp2p_wlan_2_out 0>, <&smp2p_wlan_3_out 0>; @@ -102,7 +109,7 @@ qcom,vreg_ol_cpr ="s3b"; interconnects = - <&pcie_anoc MASTER_PCIE_0 &pcie_anoc SLAVE_ANOC_PCIE_GEM_NOC>, + <&pcie_noc MASTER_PCIE_0 &pcie_noc SLAVE_ANOC_PCIE_GEM_NOC>, <&gem_noc MASTER_ANOC_PCIE_GEM_NOC &mc_virt SLAVE_EBI1>; interconnect-names = "pcie_to_memnoc", "memnoc_to_ddr"; From 2e9ba4dfeb0232a837e83fb9d75bd0d2ea185fc7 Mon Sep 17 00:00:00 2001 From: Abhishek Mantha Date: Fri, 11 Oct 2024 13:00:28 +0530 Subject: [PATCH 04/14] ARM: dts: msm: Add dtbo file in Kbuild for tuna-kiwi This change will include dtbo file in Kbuild for tuna-kiwi. Change-Id: I3b1d475751c1d0f7abd6529daa57674a7b7e939b CRs-Fixed: 3946030 --- Kbuild | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Kbuild b/Kbuild index 0ae9166a..70c7bb92 100644 --- a/Kbuild +++ b/Kbuild @@ -43,6 +43,9 @@ dtbo-y += tuna-cdp-wcn7750.dtbo dtbo-y += tuna-mtp-wcn7750.dtbo dtbo-y += tuna-mtp-qmp1000-wcn7750.dtbo dtbo-y += tuna-qrd-wcn7750.dtbo +dtbo-y += tuna-mtp-kiwi.dtbo +dtbo-y += tuna-rcm-kiwi.dtbo +dtbo-y += tuna-atp-kiwi.dtbo endif always-y := $(dtb-y) $(dtbo-y) From 6a57ec6f7f270867cfefb3c7b303e0aeadd69bd2 Mon Sep 17 00:00:00 2001 From: Prateek Patil Date: Tue, 24 Sep 2024 19:03:41 +0530 Subject: [PATCH 05/14] ARM: dts: msm: Add opensource wlan device tree support for tuna-kiwi This change adds wlan opensource dt files for tuna-kiwi. Change-Id: Ieab01519346f3024a14dc766999488cea95b9ba2 CRs-Fixed: 3940905 --- tuna-atp-kiwi.dts | 16 ++++ tuna-kiwi-cnss.dtsi | 198 ++++++++++++++++++++++++++++++++++++++++++++ tuna-mtp-kiwi.dts | 16 ++++ tuna-rcm-kiwi.dts | 16 ++++ 4 files changed, 246 insertions(+) create mode 100644 tuna-atp-kiwi.dts create mode 100644 tuna-kiwi-cnss.dtsi create mode 100644 tuna-mtp-kiwi.dts create mode 100644 tuna-rcm-kiwi.dts diff --git a/tuna-atp-kiwi.dts b/tuna-atp-kiwi.dts new file mode 100644 index 00000000..f0384004 --- /dev/null +++ b/tuna-atp-kiwi.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "tuna-kiwi-cnss.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Tuna ATP + kiwi WLAN"; + compatible = "qcom,tuna-atp", "qcom,tuna", "qcom,atp"; + qcom,msm-id = <655 0x10000>, <681 0x10000>; + qcom,board-id = <33 0>; +}; diff --git a/tuna-kiwi-cnss.dtsi b/tuna-kiwi-cnss.dtsi new file mode 100644 index 00000000..c32c7cab --- /dev/null +++ b/tuna-kiwi-cnss.dtsi @@ -0,0 +1,198 @@ +// SPDX-License-Identifier: BSD-3-Clause + +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include + +&wlan_msa_mem { + status = "disabled"; +}; + +&wpss_mem { + status = "disabled"; +}; + +&wpss_pas { + status = "disabled"; +}; + +&pcie0 { + status = "ok"; +}; + +&tlmm { + cnss_pins { + cnss_wlan_en_active: cnss_wlan_en_active { + mux { + pins = "gpio35"; + function = "gpio"; + }; + + config { + pins = "gpio35"; + drive-strength = <16>; + output-high; + bias-pull-up; + }; + }; + + cnss_wlan_en_sleep: cnss_wlan_en_sleep { + mux { + pins = "gpio35"; + function = "gpio"; + }; + + config { + pins = "gpio35"; + drive-strength = <2>; + output-low; + bias-pull-down; + }; + }; + + cnss_wlan_sw_ctrl: cnss_wlan_sw_ctrl { + mux { + pins = "gpio80"; + function = "wcn_sw_ctrl"; + }; + }; + + cnss_wlan_sw_ctrl_wl_cx: cnss_wlan_sw_ctrl_wl_cx { + mux { + pins = "gpio34"; + function = "wcn_sw"; + }; + }; + }; +}; + +&reserved_memory { + cnss_wlan_mem: cnss_wlan_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; + reusable; + alignment = <0x0 0x400000>; + size = <0x0 0x2000000>; + }; +}; + +&soc { + wlan_kiwi: qcom,cnss-kiwi@b0000000 { + compatible = "qcom,cnss-kiwi"; + reg = <0xb0000000 0x10000>; + reg-names = "smmu_iova_ipa"; + qcom,wlan-sw-ctrl-gpio = <&tlmm 34 0>; + + supported-ids = <0x1107>; + wlan-en-gpio = <&tlmm 35 0>; + qcom,bt-en-gpio = <&pm8550vs_g_gpios 4 0>; + qcom,sw-ctrl-gpio = <&tlmm 80 0>; + /* List of GPIOs to be setup for interrupt wakeup capable */ + mpm_wake_set_gpios = <80 34>; + pinctrl-names = "wlan_en_active", "wlan_en_sleep", "sw_ctrl", + "sw_ctrl_wl_cx"; + pinctrl-0 = <&cnss_wlan_en_active>; + pinctrl-1 = <&cnss_wlan_en_sleep>; + pinctrl-2 = <&cnss_wlan_sw_ctrl>; + pinctrl-3 = <&cnss_wlan_sw_ctrl_wl_cx>; + qcom,wlan; + qcom,wlan-rc-num = <0>; + qcom,wlan-ramdump-dynamic = <0x780000>; + cnss-enable-self-recovery; + qcom,wlan-cbc-enabled; + use-pm-domain; + qcom,same-dt-multi-dev; + /* For AOP communication, use direct QMP instead of mailbox */ + qcom,qmp = <&aoss_qmp>; + + interconnects = + <&pcie_noc MASTER_PCIE_0 &pcie_noc SLAVE_ANOC_PCIE_GEM_NOC>, + <&gem_noc MASTER_ANOC_PCIE_GEM_NOC &mc_virt SLAVE_EBI1>; + interconnect-names = "pcie_to_memnoc", "memnoc_to_ddr"; + + qcom,icc-path-count = <2>; + qcom,bus-bw-cfg-count = <9>; + qcom,bus-bw-cfg = + /** ICC Path 1 **/ + <0 0>, /* no vote */ + /* idle: 0-18 Mbps snoc/anoc: 100 Mhz */ + <2250 1200000>, + /* low: 18-60 Mbps snoc/anoc: 100 Mhz */ + <7500 1200000>, + /* medium: 60-240 Mbps snoc/anoc: 100 Mhz */ + <30000 1200000>, + /* high: 240-1200 Mbps snoc/anoc: 100 Mhz */ + <100000 1200000>, + /* very high: > 1200 Mbps snoc/anoc: 403 Mhz */ + <175000 3224000>, + /* ultra high: DBS mode snoc/anoc: 403 Mhz */ + <312500 3224000>, + /* super high: DBS mode snoc/anoc: 533 Mhz */ + <587500 4264000>, + /* low (latency critical): 18-60 Mbps snoc/anoc: 200 Mhz */ + <7500 1600000>, + + /** ICC Path 2 **/ + <0 0>, + /* idle: 0-18 Mbps ddr: 451.2 MHz */ + <2250 2188800>, + /* low: 18-60 Mbps ddr: 451.2 MHz */ + <7500 2188800>, + /* medium: 60-240 Mbps ddr: 451.2 MHz */ + <30000 2188800>, + /* high: 240-1200 Mbps ddr: 451.2 MHz */ + <100000 2188800>, + /* very high: > 1200 Mbps ddr: 1555 MHz */ + <175000 6220800>, + /* ultra high: DBS mode ddr: 2092 MHz */ + <312500 8368000>, + /* super high: DBS mode ddr: 3.2 GHz */ + <587500 12800000>, + /* low (latency critical): 18-60 Mbps ddr: 451.2 MHz */ + <7500 2188800>; + + qcom,pdc_init_table = + " {class: wlan_pdc, ss: rf, res: s3b.v, upval: 976}", + " {class: wlan_pdc, ss: rf, res: s3b.v, dwnval: 616}", + " {class: wlan_pdc, ss: rf, res: s1g.m, enable: 0}", + " {class: wlan_pdc, ss: rf, res: l18b.m, enable: 0}", + " {class: wlan_pdc, ss: rf, res: b1b.m, enable: 0}", + " {class: wlan_pdc, ss: bb, res: pdc, enable: 1}"; + + /* cpu mask used for wlan tx rx interrupt affinity + * + */ + wlan-txrx-intr-cpumask = <0x3 0x30>; + }; +}; + +&pcie0_rp { + + cnss_pci0: cnss_pci0 { + reg = <0 0 0 0 0>; + qcom,iommu-group = <&cnss_pci_iommu_group0>; + memory-region = + <&cnss_wlan_mem &cnss_pci0_iommu_region_partition>; + + #address-cells = <1>; + #size-cells = <1>; + + cnss_pci0_iommu_region_partition: + cnss_pci0_iommu_region_partition { + /* address-cells =3 size-cells=2 from sun-pcie.dtsi */ + iommu-addresses = <&cnss_pci0 0x0 0x0 0x0 0x0 0x98000000>, + <&cnss_pci0 0x0 0x0 0xB0000000 0x0 0x50000000>; + }; + + cnss_pci_iommu_group0: cnss_pci_iommu_group0 { + qcom,iommu-msi-size = <0x1000>; + qcom,iommu-geometry = <0x98000000 0x18010000>; + qcom,iommu-dma = "fastmap"; + qcom,iommu-pagetable = "coherent"; + qcom,iommu-faults = "stall-disable", "HUPCF", + "non-fatal"; + }; + }; +}; diff --git a/tuna-mtp-kiwi.dts b/tuna-mtp-kiwi.dts new file mode 100644 index 00000000..fece1611 --- /dev/null +++ b/tuna-mtp-kiwi.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "tuna-kiwi-cnss.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Tuna MTP + kiwi WLAN"; + compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,mtp"; + qcom,msm-id = <655 0x10000>, <681 0x10000>; + qcom,board-id = <8 2>; +}; diff --git a/tuna-rcm-kiwi.dts b/tuna-rcm-kiwi.dts new file mode 100644 index 00000000..ab921bac --- /dev/null +++ b/tuna-rcm-kiwi.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "tuna-kiwi-cnss.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Tuna RCM + kiwi WLAN"; + compatible = "qcom,tuna-rcm", "qcom,tuna", "qcom,rcm"; + qcom,msm-id = <655 0x10000>, <681 0x10000>; + qcom,board-id = <21 1>; +}; From 3059aac8f86ffb8defca90c934583647c508da00 Mon Sep 17 00:00:00 2001 From: AMAN KUMAR Date: Tue, 15 Oct 2024 21:48:02 +0530 Subject: [PATCH 06/14] ARM: dts: msm: Update wlan device tree support for Canoe Update wlan opensource device tree support for Canoe SOC. Change-Id: If682b8d28cbb03a17572ea84be422070f5f47d64 CRs-Fixed: 3950204 --- canoe-kiwi-cnss.dts | 10 +++-- canoe-kiwi-cnss.dtsi | 105 +++---------------------------------------- 2 files changed, 11 insertions(+), 104 deletions(-) diff --git a/canoe-kiwi-cnss.dts b/canoe-kiwi-cnss.dts index 7fbc39ed..5af778f5 100644 --- a/canoe-kiwi-cnss.dts +++ b/canoe-kiwi-cnss.dts @@ -12,8 +12,10 @@ / { model = "Qualcomm Technologies, Inc. Canoe SoCs"; compatible = "qcom,canoe", "qcom,canoep", "qcom,canoe-mtp", "qcom,canoe-cdp"; - qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>, - <0x100026a 0x10000>, <0x100026a 0x20000>, - <0x100027f 0x10000>, <0x100027f 0x20000>; - qcom,board-id = <0x20001 0>, <0x20008 0>, <0x40015 0>; + qcom,msm-id = <0x10294 0x10000>, <0x10294 0x20000>, <0x10295 0x10000>, <0x10295 0x20000>, + <0x30294 0x10000>, <0x30294 0x20000>, <0x30295 0x10000>, <0x30295 0x20000>, + <0x1010294 0x10000>, <0x1010294 0x20000>, <0x1010295 0x10000>, + <0x1010295 0x20000>, <0x1030294 0x10000>, <0x1030294 0x20000>, + <0x1030295 0x10000>, <0x1030295 0x20000>; + qcom,board-id = <0x1000001 0>, <0x1000008 0>, <0x1000015 0>; }; diff --git a/canoe-kiwi-cnss.dtsi b/canoe-kiwi-cnss.dtsi index 75f8daf5..356cc16e 100644 --- a/canoe-kiwi-cnss.dtsi +++ b/canoe-kiwi-cnss.dtsi @@ -65,13 +65,13 @@ &soc { wlan_kiwi: qcom,cnss-kiwi@b0000000 { compatible = "qcom,cnss-kiwi"; - reg = <0xb0000000 0x10000>; + reg = <0x0 0xb0000000 0x0 0x10000>; reg-names = "smmu_iova_ipa"; qcom,wlan-sw-ctrl-gpio = <&tlmm 19 0>; supported-ids = <0x1107>; wlan-en-gpio = <&tlmm 16 0>; - qcom,bt-en-gpio = <&pm8550vs_f_gpios 3 0>; + qcom,bt-en-gpio = <&pmh0104_gpios 5 0>; qcom,sw-ctrl-gpio = <&tlmm 18 0>; /* List of GPIOs to be setup for interrupt wakeup capable */ mpm_wake_set_gpios = <18 19>; @@ -91,104 +91,9 @@ /* For AOP communication, use direct QMP instead of mailbox */ qcom,qmp = <&aoss_qmp>; - vdd-wlan-io-supply = <&L3F>; - qcom,vdd-wlan-io-config = <1800000 1800000 30000 0 1>; - vdd-wlan-io12-supply = <&L2F>; - qcom,vdd-wlan-io12-config = <1200000 1200000 30000 0 1>; - vdd-wlan-supply = <&S4J>; - qcom,vdd-wlan-config = <932000 1000000 0 0 0>; - vdd-wlan-aon-supply = <&S4D>; - qcom,vdd-wlan-aon-config = <976000 1036000 0 0 1>; - vdd-wlan-dig-supply = <&S1D>; - qcom,vdd-wlan-dig-config = <916000 1100000 0 0 1>; - vdd-wlan-rfa1-supply = <&S3G>; - qcom,vdd-wlan-rfa1-config = <1864000 2000000 0 0 1>; - vdd-wlan-rfa2-supply = <&S7I>; - qcom,vdd-wlan-rfa2-config = <1316000 1340000 0 0 1>; - vdd-wlan-ant-share-supply = <&L6K>; - qcom,vdd-wlan-ant-share-config = <1800000 1800000 0 0 1>; + // TODO REGULATORS - interconnects = - <&pcie_noc MASTER_PCIE_0 &pcie_noc SLAVE_ANOC_PCIE_GEM_NOC>, - <&gem_noc MASTER_ANOC_PCIE_GEM_NOC &mc_virt SLAVE_EBI1>; - interconnect-names = "pcie_to_memnoc", "memnoc_to_ddr"; - - qcom,icc-path-count = <2>; - qcom,bus-bw-cfg-count = <9>; - qcom,bus-bw-cfg = - /** ICC Path 1 **/ - <0 0>, /* no vote */ - /* idle: 0-18 Mbps snoc/anoc: 100 Mhz */ - <2250 800000>, - /* low: 18-60 Mbps snoc/anoc: 100 Mhz */ - <7500 800000>, - /* medium: 60-240 Mbps snoc/anoc: 100 Mhz */ - <30000 800000>, - /* high: 240-1200 Mbps snoc/anoc: 100 Mhz */ - <100000 800000>, - /* very high: > 1200 Mbps snoc/anoc: 403 Mhz */ - <175000 3224000>, - /* ultra high: DBS mode snoc/anoc: 403 Mhz */ - <312500 3224000>, - /* super high: DBS mode snoc/anoc: 533 Mhz */ - <587500 4264000>, - /* low (latency critical): 18-60 Mbps snoc/anoc: 200 Mhz */ - <7500 1600000>, - - /** ICC Path 2 **/ - <0 0>, - /* idle: 0-18 Mbps ddr: 547.2 MHz */ - <2250 2188800>, - /* low: 18-60 Mbps ddr: 547.2 MHz */ - <7500 2188800>, - /* medium: 60-240 Mbps ddr: 547.2 MHz */ - <30000 2188800>, - /* high: 240-1200 Mbps ddr: 547.2 MHz */ - <100000 2188800>, - /* very high: > 1200 Mbps ddr: 1555 MHz */ - <175000 6220800>, - /* ultra high: DBS mode ddr: 2092 MHz */ - <312500 8368000>, - /* super high: DBS mode ddr: 3.2 GHz */ - <587500 12800000>, - /* low (latency critical): 18-60 Mbps ddr: 547.2 MHz */ - <7500 2188800>; - - qcom,vreg_pdc_map = - "s4j", "bb", - "s4d", "bb", - "s3g", "rf", - "s7i", "rf", - "s1d", "rf"; - - qcom,pmu_vreg_map = - "VDD095_MX_PMU", "s4d", - "VDD095_PMU", "s4j", - "VDD_PMU_AON_I", "s1d", - "VDD095_PMU_BT", "s1d", - "VDD09_PMU_RFA_I", "s1d", - "VDD13_PMU_PCIE_I", "s7i", - "VDD13_PMU_RFA_I", "s7i", - "VDD19_PMU_PCIE_I", "s3g", - "VDD19_PMU_RFA_I", "s3g"; - - qcom,pdc_init_table = - "{class: wlan_pdc, ss: rf, res: s3g.v, upval: 1856}", - "{class: wlan_pdc, ss: rf, res: s3g.v, dwnval: 1844}", - "{class: wlan_pdc, ss: rf, res: s7i.v, upval: 1316}", - "{class: wlan_pdc, ss: rf, res: s7i.v, dwnval: 972}", - "{class: wlan_pdc, ss: rf, res: s1d.m, enable: 1}", - "{class: wlan_pdc, ss: rf, res: s1d.v, enable: 1}", - "{class: wlan_pdc, ss: rf, res: s1d.v, upval: 916}", - "{class: wlan_pdc, ss: rf, res: s1d.v, dwnval: 880}", - "{class: wlan_pdc, ss: rf, res: s4j.m, enable: 0}", - "{class: wlan_pdc, ss: rf, res: s4j.v, enable: 0}", - "{class: wlan_pdc, ss: bb, res: s4d.v, upval: 976}", - "{class: wlan_pdc, ss: bb, res: s4d.v, dwnval: 536}", - "{class: wlan_pdc, ss: bb, res: s4j.m, enable: 1}", - "{class: wlan_pdc, ss: bb, res: s4j.v, enable: 1}", - "{class: wlan_pdc, ss: bb, res: s4j.v, upval: 932}", - "{class: wlan_pdc, ss: bb, res: s4j.v, dwnval: 444}"; + // TODO PDC TABLE BUS BW /* cpu mask used for wlan tx rx interrupt affinity * @@ -208,7 +113,7 @@ #size-cells = <1>; cnss_pci0_iommu_region_partition: cnss_pci0_iommu_region_partition { - /* address-cells =3 size-cells=2 from sun-pcie.dtsi */ + /* address-cells =3 size-cells=2 from canoe-pcie.dtsi */ iommu-addresses = <&cnss_pci0 0x0 0x0 0x0 0x0 0x98000000>, <&cnss_pci0 0x0 0x0 0xB0000000 0x0 0x50000000>; }; From 9ef7354c67da750b81d6a168f2175e10421aaada Mon Sep 17 00:00:00 2001 From: Mohammed Ahmed Date: Fri, 11 Oct 2024 11:33:50 -0700 Subject: [PATCH 07/14] ARM: dts: msm: Add canoe regulator values Add correct regulator values for canoe target Change-Id: I6a5b2b6d95e4f2241845fcfdb45ebd64658c2b40 CRs-Fixed: 3947240 --- canoe-peach-cnss.dts | 13 ++--- canoe-peach-cnss.dtsi | 118 ++++++++++++------------------------------ 2 files changed, 39 insertions(+), 92 deletions(-) diff --git a/canoe-peach-cnss.dts b/canoe-peach-cnss.dts index 90dfecb8..04b6a5e8 100644 --- a/canoe-peach-cnss.dts +++ b/canoe-peach-cnss.dts @@ -10,11 +10,12 @@ #include "canoe-peach-cnss.dtsi" / { - model = "Qualcomm Technologies, Inc. Sun SoCs"; + model = "Qualcomm Technologies, Inc. Canoe SoCs"; compatible = "qcom,canoe", "qcom,canoep"; - qcom,msm-id = <618 0x10000>, <618 0x20000>, - <639 0x10000>, <639 0x20000>, - <0x100026a 0x10000>, <0x100026a 0x20000>, - <0x100027f 0x10000>, <0x100027f 0x20000>; - qcom,board-id = <1 0>, <8 0>, <0x1000B 0>, <0x15 0>; + qcom,msm-id = <0x10294 0x10000>, <0x10294 0x20000>, <0x10295 0x10000>, <0x10295 0x20000>, + <0x30294 0x10000>, <0x30294 0x20000>, <0x30295 0x10000>, <0x30295 0x20000>, + <0x1010294 0x10000>, <0x1010294 0x20000>, <0x1010295 0x10000>, + <0x1010295 0x20000>, <0x1030294 0x10000>, <0x1030294 0x20000>, + <0x1030295 0x10000>, <0x1030295 0x20000>; + qcom,board-id = <1 0>, <8 0>, <0x10021 0>, <11 0>, <0x15 0>, <0x208 0>, <0x108 0>; }; diff --git a/canoe-peach-cnss.dtsi b/canoe-peach-cnss.dtsi index 6d4ff475..075db596 100644 --- a/canoe-peach-cnss.dtsi +++ b/canoe-peach-cnss.dtsi @@ -52,12 +52,12 @@ cnss_host_sol_default: cnss_host_sol_default { mux { - pins = "gpio202"; + pins = "gpio204"; function = "gpio"; }; config { - pins = "gpio202"; + pins = "gpio204"; drive-strength = <4>; bias-pull-down; }; @@ -78,16 +78,16 @@ &soc { wlan_peach: qcom,cnss-peach@b0000000 { compatible = "qcom,cnss-peach"; - reg = <0xb0000000 0x10000>; + reg = <0x0 0xb0000000 0x0 0x10000>; reg-names = "smmu_iova_ipa"; qcom,wlan-sw-ctrl-gpio = <&tlmm 19 0>; supported-ids = <0x110E>; wlan-en-gpio = <&tlmm 16 0>; - qcom,bt-en-gpio = <&pm8550vs_f_gpios 3 0>; + qcom,bt-en-gpio = <&pmh0104_gpios 5 0>; qcom,sw-ctrl-gpio = <&tlmm 18 0>; - wlan-host-sol-gpio = <&tlmm 202 0>; - wlan-dev-sol-gpio = <&tlmm 203 0>; + wlan-host-sol-gpio = <&tlmm 204 0>; + wlan-dev-sol-gpio = <&tlmm 205 0>; /* List of GPIOs to be setup for interrupt wakeup capable */ mpm_wake_set_gpios = <18 19>; pinctrl-names = "wlan_en_active", "wlan_en_sleep", "sw_ctrl", @@ -108,90 +108,36 @@ qcom,qmp = <&aoss_qmp>; msix-match-addr = <0x3000>; - vdd-wlan-io-supply = <&L3F>; - qcom,vdd-wlan-io-config = <1800000 1800000 30000 0 1>; - vdd-wlan-io12-supply = <&L2F>; + vdd-wlan-aon-supply = <&L2G>; + qcom,vdd-wlan-aon-config = <1800000 1800000 30000 0 1>; + vdd-wlan-io12-supply = <&L3G>; qcom,vdd-wlan-io12-config = <1200000 1200000 30000 0 1>; - vdd-wlan-aon-supply = <&S4D>; - qcom,vdd-wlan-aon-config = <876000 1036000 0 0 1>; - vdd-wlan-dig-supply = <&S4J>; - qcom,vdd-wlan-dig-config = <876000 1000000 0 0 1>; - vdd-wlan-rfa1-supply = <&S3G>; - qcom,vdd-wlan-rfa1-config = <1860000 2000000 0 0 1>; - vdd-wlan-rfa2-supply = <&S7I>; - qcom,vdd-wlan-rfa2-config = <1312000 1340000 0 0 1>; - vdd-wlan-ant-share-supply = <&L6K>; - qcom,vdd-wlan-ant-share-config = <1800000 1860000 0 0 1>; - - interconnects = - <&pcie_noc MASTER_PCIE_0 &pcie_noc SLAVE_ANOC_PCIE_GEM_NOC>, - <&gem_noc MASTER_ANOC_PCIE_GEM_NOC &mc_virt SLAVE_EBI1>; - interconnect-names = "pcie_to_memnoc", "memnoc_to_ddr"; - - qcom,icc-path-count = <2>; - qcom,bus-bw-cfg-count = <9>; - qcom,bus-bw-cfg = - /** ICC Path 1 **/ - <0 0>, /* no vote */ - /* idle: 0-18 Mbps snoc/anoc: 100 Mhz */ - <2250 800000>, - /* low: 18-60 Mbps snoc/anoc: 100 Mhz */ - <7500 800000>, - /* medium: 60-240 Mbps snoc/anoc: 100 Mhz */ - <30000 800000>, - /* high: 240-1200 Mbps snoc/anoc: 100 Mhz */ - <100000 800000>, - /* very high: > 1200 Mbps snoc/anoc: 403 Mhz */ - <175000 3224000>, - /* ultra high: DBS mode snoc/anoc: 403 Mhz */ - <312500 3224000>, - /* super high: DBS mode snoc/anoc: 533 Mhz */ - <587500 4264000>, - /* low (latency critical): 18-60 Mbps snoc/anoc: 200 Mhz */ - <7500 1600000>, - - /** ICC Path 2 **/ - <0 0>, - /* idle: 0-18 Mbps ddr: 547.2 MHz */ - <2250 2188800>, - /* low: 18-60 Mbps ddr: 547.2 MHz */ - <7500 2188800>, - /* medium: 60-240 Mbps ddr: 547.2 MHz */ - <30000 2188800>, - /* high: 240-1200 Mbps ddr: 547.2 MHz */ - <100000 2188800>, - /* very high: > 1200 Mbps ddr: 1555 MHz */ - <175000 6220800>, - /* ultra high: DBS mode ddr: 2092 MHz */ - <312500 8368000>, - /* super high: DBS mode ddr: 3.2 GHz */ - <587500 12800000>, - /* low (latency critical): 18-60 Mbps ddr: 547.2 MHz */ - <7500 2188800>; + vdd-wlan-cx-supply = <&S1J>; + qcom,vdd-wlan-cx-config = <892000 1000000 0 0 1>; + vdd-wlan-dig-supply = <&S2J>; + qcom,vdd-wlan-dig-config = <892000 1000000 0 0 1>; + vdd-wlan-rfa1-supply = <&S8F>; + qcom,vdd-wlan-rfa1-config = <1876000 2000000 0 0 1>; + vdd-wlan-rfa2-supply = <&S7F>; + qcom,vdd-wlan-rfa2-config = <1328000 1340000 0 0 1>; qcom,vreg_pdc_map = - "s4j", "rf", - "s4d", "bb", - "s3g", "rf", - "s7i", "rf"; + "s1j", "bb", + "s2j", "rf", + "s7f", "rf", + "s8f", "rf"; qcom,pmu_vreg_map = - "VDDD_AON_0P9", "s4j", - "VDDA_RFA_1P9", "s3g", - "VDDA_RFA_1P3", "s7i", - "VDDA_RFA_0P9", "s4j", - "VDDD_WLMX_0P9", "s4d", - "VDDD_WLCX_0P9", "s4j", - "VDDD_BTCX_0P9", "s4j", - "VDDD_BTCMX_0P9", "s4j", - "VDDA_PCIE_1P2", "s7i", - "VDDA_PCIE_0P9", "s7i"; - - qcom,pdc_init_table = - "{class: wlan_pdc, ss: rf, res: s4j.m, enable: 1}", - "{class: wlan_pdc, ss: rf, res: s4j.v, enable: 1}", - "{class: wlan_pdc, ss: rf, res: s4j.v, upval: 876}", - "{class: wlan_pdc, ss: rf, res: s4j.v, dwnval: 876}"; + "VDD_PMU_AON_I", "s2j", + "VDD09_PMU_RFA_I", "s2j", + "VDD19_PMU_RFA_I", "s8f", + "VDD13_PMU_RFA_I", "s7f", + "VDD095_MX_PMU", "s2j", + "VDD095_PMU_CX", "s1j", + "VDD095_PMU_BTCX", "s2j", + "VDD095_PMU_BTMX", "s2j", + "VDD13_PMU_PCIE_I", "s7f", + "VDD13_PMU_PCIE12_I", "s7f"; /* cpu mask used for wlan tx rx interrupt affinity * @@ -207,7 +153,7 @@ memory-region = <&cnss_wlan_mem &cnss_pci0_iommu_region_partition>; cnss_pci0_iommu_region_partition: cnss_pci0_iommu_region_partition { - /* address-cells =3 size-cells=2 from sun-pcie.dtsi */ + /* address-cells =3 size-cells=2 from canoe-pcie.dtsi */ iommu-addresses = <&cnss_pci0 0x0 0x0 0x0 0x0 0x18000000>, <&cnss_pci0 0x0 0x0 0xB0000000 0x0 0x50000000>; }; From cfc1e73cc2b2b02f2dd23d023fd970fd20b010b7 Mon Sep 17 00:00:00 2001 From: Kartikey Arora Date: Thu, 17 Oct 2024 14:53:43 +0530 Subject: [PATCH 08/14] ARM: dts: msm: Add opensource wlan devicetree support Tuna MTP Add device tree support for MTP harmonium and MTP SN220 platforms for Tuna SoC. Change-Id: Ide7ee9b6e79b366d46c51a6d4c96f7027fbbfd7d CRs-Fixed: 3952108 --- tuna-mtp-kiwi.dts | 2 +- tuna-mtp-wcn7750.dts | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/tuna-mtp-kiwi.dts b/tuna-mtp-kiwi.dts index fece1611..4930b69c 100644 --- a/tuna-mtp-kiwi.dts +++ b/tuna-mtp-kiwi.dts @@ -12,5 +12,5 @@ model = "Qualcomm Technologies, Inc. Tuna MTP + kiwi WLAN"; compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,mtp"; qcom,msm-id = <655 0x10000>, <681 0x10000>; - qcom,board-id = <8 2>; + qcom,board-id = <8 2>, <8 3>; }; diff --git a/tuna-mtp-wcn7750.dts b/tuna-mtp-wcn7750.dts index 4676d7f0..78379e2f 100644 --- a/tuna-mtp-wcn7750.dts +++ b/tuna-mtp-wcn7750.dts @@ -13,5 +13,5 @@ model = "Qualcomm Technologies, Inc. Tuna MTP"; compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,mtp"; qcom,msm-id = <655 0x10000>, <681 0x10000>; - qcom,board-id = <8 0>; + qcom,board-id = <8 0>, <8 4>; }; From 6416271921555ee9514b6532f01fc8feb9a7d6e0 Mon Sep 17 00:00:00 2001 From: Prateek Patil Date: Wed, 16 Oct 2024 18:29:38 +0530 Subject: [PATCH 09/14] ARM: dts: msm: Add regulator voltage config for tuna-kiwi This change adds regulator voltage config for tuna-kiwi in wlan dtsi file. Change-Id: I9c418a93983b928ee03221094bf8669695fd165a CRs-Fixed: 3954840 --- tuna-kiwi-cnss.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/tuna-kiwi-cnss.dtsi b/tuna-kiwi-cnss.dtsi index c32c7cab..9c53f0b9 100644 --- a/tuna-kiwi-cnss.dtsi +++ b/tuna-kiwi-cnss.dtsi @@ -107,6 +107,21 @@ /* For AOP communication, use direct QMP instead of mailbox */ qcom,qmp = <&aoss_qmp>; + vdd-wlan-io-supply = <&L3G>; + qcom,vdd-wlan-io-config = <1800000 1800000 30000 0 1>; + vdd-wlan-io12-supply = <&L2G>; + qcom,vdd-wlan-io12-config = <1200000 1200000 30000 0 1>; + vdd-wlan-supply = <&S1G>; + qcom,vdd-wlan-config = <940000 1003000 0 0 1>; + vdd-wlan-dig-supply = <&S3B>; + qcom,vdd-wlan-dig-config = <976000 1040000 0 0 1>; + vdd-wlan-rfa1-supply = <&S1B>; + qcom,vdd-wlan-rfa1-config = <1864000 2104000 0 0 1>; + vdd-wlan-rfa2-supply = <&S2B>; + qcom,vdd-wlan-rfa2-config = <1316000 1408000 0 0 1>; + vdd-wlan-ant-share-supply = <&L6K>; + qcom,vdd-wlan-ant-share-config = <1800000 2000000 0 0 1>; + interconnects = <&pcie_noc MASTER_PCIE_0 &pcie_noc SLAVE_ANOC_PCIE_GEM_NOC>, <&gem_noc MASTER_ANOC_PCIE_GEM_NOC &mc_virt SLAVE_EBI1>; @@ -159,6 +174,7 @@ " {class: wlan_pdc, ss: rf, res: s1g.m, enable: 0}", " {class: wlan_pdc, ss: rf, res: l18b.m, enable: 0}", " {class: wlan_pdc, ss: rf, res: b1b.m, enable: 0}", + " {class: wlan_pdc, ss: rf, res: l4k.m, enable: 0}", " {class: wlan_pdc, ss: bb, res: pdc, enable: 1}"; /* cpu mask used for wlan tx rx interrupt affinity From 4d2c38c938dde64963d3c0a377239f4e362641ef Mon Sep 17 00:00:00 2001 From: Prateek Patil Date: Fri, 25 Oct 2024 14:24:47 +0530 Subject: [PATCH 10/14] ARM: dts: msm: Update L2G mode for tuna-kiwi This change updates l2g mode from LPM to RM for HMT. Change-Id: I6607f164af7c84ef65195790e02f97b68d2148e9 CRs-Fixed: 3959644 --- tuna-kiwi-cnss.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/tuna-kiwi-cnss.dtsi b/tuna-kiwi-cnss.dtsi index 9c53f0b9..1eed8a92 100644 --- a/tuna-kiwi-cnss.dtsi +++ b/tuna-kiwi-cnss.dtsi @@ -175,6 +175,7 @@ " {class: wlan_pdc, ss: rf, res: l18b.m, enable: 0}", " {class: wlan_pdc, ss: rf, res: b1b.m, enable: 0}", " {class: wlan_pdc, ss: rf, res: l4k.m, enable: 0}", + " {class: wlan_pdc, ss: rf, res: l2g.m, dwnval: 3}", " {class: wlan_pdc, ss: bb, res: pdc, enable: 1}"; /* cpu mask used for wlan tx rx interrupt affinity From ad418df1374462c434f5c92df71b2602146ec20d Mon Sep 17 00:00:00 2001 From: AMAN KUMAR Date: Wed, 23 Oct 2024 11:44:07 +0530 Subject: [PATCH 11/14] ARM: dts: msm: Add canoe regulator values Add regulator values for canoe target with kiwi derived from previous targets. Change-Id: I18b08024a06d50fd2ba1b40bc4c8463947ee406e CRs-Fixed: 3958854 --- canoe-kiwi-cnss.dtsi | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/canoe-kiwi-cnss.dtsi b/canoe-kiwi-cnss.dtsi index 356cc16e..e0dec929 100644 --- a/canoe-kiwi-cnss.dtsi +++ b/canoe-kiwi-cnss.dtsi @@ -91,9 +91,21 @@ /* For AOP communication, use direct QMP instead of mailbox */ qcom,qmp = <&aoss_qmp>; - // TODO REGULATORS - + vdd-wlan-aon-supply = <&L2G>; + qcom,vdd-wlan-aon-config = <1800000 1800000 0 0 1>; + vdd-wlan-io12-supply = <&L3G>; + qcom,vdd-wlan-io12-config = <1200000 1200000 0 0 1>; + vdd-wlan-cx-supply = <&S1J>; + qcom,vdd-wlan-cx-config = <932000 1000000 0 0 1>; + vdd-wlan-dig-supply = <&S2J>; + qcom,vdd-wlan-dig-config = <916000 1100000 0 0 1>; + vdd-wlan-rfa1-supply = <&S8F>; + qcom,vdd-wlan-rfa1-config = <1864000 2000000 0 0 1>; + vdd-wlan-rfa2-supply = <&S7F>; + qcom,vdd-wlan-rfa2-config = <1316000 1400000 0 0 1>; + //TODO: extractor regulator is required or not // TODO PDC TABLE BUS BW + // PDC MAP AND PMU Vreg Map /* cpu mask used for wlan tx rx interrupt affinity * From 6c3e1ef1f2d2d0121ac5e276b430e6b877c8e652 Mon Sep 17 00:00:00 2001 From: Kartikey Arora Date: Fri, 20 Sep 2024 17:20:15 +0530 Subject: [PATCH 12/14] ARM: dts: msm: Add opensource wlan device tree support for kera-qca6750 This change adds wlan related dt files for kera-qca6750 which has icnss and wpss dtsi node enabled. Change-Id: I2b10dfd91819ad8501479190823fe20b07382210 CRs-Fixed: 3960302 --- Kbuild | 7 +++ kera-atp-qca6750.dts | 16 ++++++ kera-cdp-qca6750.dts | 16 ++++++ kera-mtp-qca6750.dts | 16 ++++++ kera-qca6750.dtsi | 123 +++++++++++++++++++++++++++++++++++++++++++ kera-rcm-qca6750.dts | 16 ++++++ 6 files changed, 194 insertions(+) create mode 100644 kera-atp-qca6750.dts create mode 100644 kera-cdp-qca6750.dts create mode 100644 kera-mtp-qca6750.dts create mode 100644 kera-qca6750.dtsi create mode 100644 kera-rcm-qca6750.dts diff --git a/Kbuild b/Kbuild index 70c7bb92..3bf79516 100644 --- a/Kbuild +++ b/Kbuild @@ -48,6 +48,13 @@ dtbo-y += tuna-rcm-kiwi.dtbo dtbo-y += tuna-atp-kiwi.dtbo endif +ifeq ($(CONFIG_ARCH_KERA),y) +dtbo-y += kera-atp-qca6750.dtbo +dtbo-y += kera-cdp-qca6750.dtbo +dtbo-y += kera-mtp-qca6750.dtbo +dtbo-y += kera-rcm-qca6750.dtbo +endif + always-y := $(dtb-y) $(dtbo-y) subdir-y := $(dts-dirs) clean-files := *.dtb *.dtbo diff --git a/kera-atp-qca6750.dts b/kera-atp-qca6750.dts new file mode 100644 index 00000000..461f8c6b --- /dev/null +++ b/kera-atp-qca6750.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "kera-qca6750.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Kera ATP + MSL WLAN"; + compatible = "qcom,kera-atp", "qcom,kera", "qcom,atp"; + qcom,msm-id = <686 0x10000>, <659 0x10000>; + qcom,board-id = <0x000021 0>; +}; diff --git a/kera-cdp-qca6750.dts b/kera-cdp-qca6750.dts new file mode 100644 index 00000000..bae28946 --- /dev/null +++ b/kera-cdp-qca6750.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "kera-qca6750.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Kera CDP"; + compatible = "qcom,kera-cdp", "qcom,kera", "qcom,cdp"; + qcom,msm-id = <686 0x10000>, <659 0x10000>; + qcom,board-id = <0x010001 0>, <0x020001 0>, <0x030001 0>, <0x040001 0>; +}; diff --git a/kera-mtp-qca6750.dts b/kera-mtp-qca6750.dts new file mode 100644 index 00000000..2c22a3dd --- /dev/null +++ b/kera-mtp-qca6750.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "kera-qca6750.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Kera MTP"; + compatible = "qcom,kera-mtp", "qcom,kera", "qcom,mtp"; + qcom,msm-id = <686 0x10000>, <659 0x10000>; + qcom,board-id = <0x010008 0>, <0x020008 0>, <0x030008 0>; +}; diff --git a/kera-qca6750.dtsi b/kera-qca6750.dtsi new file mode 100644 index 00000000..9ae4e74b --- /dev/null +++ b/kera-qca6750.dtsi @@ -0,0 +1,123 @@ +// SPDX-License-Identifier: BSD-3-Clause + +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include + +&soc { + qcom,smp2p-wpss { + smp2p_wlan_1_in: qcom,smp2p-wlan-1-in { + qcom,entry-name = "wlan"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + smp2p_wlan_1_out: qcom,smp2p-wlan-1-out { + qcom,entry-name = "wlan"; + #qcom,smem-state-cells = <1>; + }; + + smp2p_wlan_2_in: qcom,smp2p-wlan-2-in { + qcom,entry-name = "wlan_soc_wake"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + smp2p_wlan_2_out: qcom,smp2p-wlan-2-out { + qcom,entry-name = "wlan_soc_wake"; + #qcom,smem-state-cells = <1>; + }; + + smp2p_wlan_3_out: qcom,smp2p-wlan-3-out { + qcom,entry-name = "wlan_ep_power_save"; + #qcom,smem-state-cells = <1>; + }; + }; + + icnss2: qcom,wcn6750 { + compatible = "qcom,wcn6750"; + reg = <0x17110040 0x0>, + <0xc0000000 0x10000>; + reg-names = "msi_addr", "smmu_iova_ipa"; + qcom,rproc-handle = <&wpss_pas>; + iommus = <&apps_smmu 0x1480 0x1>; + wlan-en-gpio = <35>; + host-sol-gpio = <33>; + dev-sol-gpio = <32>; + wlan-sw-ctrl-gpio = <81>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + + qcom,iommu-dma = "fastmap"; + qcom,iommu-faults = "stall-disable", "HUPCF", "non-fatal"; + qcom,iommu-dma-addr-pool = <0xb0000000 0x10000000>; + qcom,iommu-geometry = <0xb0000000 0x10010000>; + dma-coherent; + qcom,fw-prefix; + qcom,wlan; + tsens = "sys-therm-3"; + qcom,wlan-msa-fixed-region = <&wlan_msa_mem>; + + qcom,smem-states = <&smp2p_wlan_1_out 0>, + <&smp2p_wlan_2_out 0>, + <&smp2p_wlan_3_out 0>; + qcom,smem-state-names = "wlan-smp2p-out", + "wlan-soc-wake-smp2p-out", + "wlan-ep-powersave-smp2p-out"; + + qcom,qmp = <&aoss_qmp>; + qcom,vreg_ol_cpr ="s3b"; + + icnss_cdev_apss: qcom,icnss_cdev1 { + #cooling-cells = <2>; + }; + + icnss_cdev_wpss: qcom,icnss_cdev2 { + #cooling-cells = <2>; + }; + + qcom,smp2p_map_wlan_1_in { + interrupts-extended = <&smp2p_wlan_1_in 0 0>, + <&smp2p_wlan_1_in 1 0>; + interrupt-names = "qcom,smp2p-force-fatal-error", + "qcom,smp2p-early-crash-ind"; + }; + + qcom,smp2p_map_wlan_2_in { + interrupts-extended = <&smp2p_wlan_2_in 0 0>; + interrupt-names = "qcom,smp2p-soc-wake-ack"; + }; + }; +}; diff --git a/kera-rcm-qca6750.dts b/kera-rcm-qca6750.dts new file mode 100644 index 00000000..c2f8023d --- /dev/null +++ b/kera-rcm-qca6750.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "kera-qca6750.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Kera RCM"; + compatible = "qcom,kera-rcm", "qcom,kera", "qcom,rcm"; + qcom,msm-id = <686 0x10000>, <659 0x10000>; + qcom,board-id = <0x010015 0>, <0x020015 0>; +}; From 04fc3f33bad3f8a1c5b88c9346a0311d712a41be Mon Sep 17 00:00:00 2001 From: Mohammed Ahmed Date: Tue, 29 Oct 2024 16:37:02 -0700 Subject: [PATCH 13/14] ARM: dts: msm: Remove unused msm ids Remove unused msm ids Change-Id: I2992b35f9602bf0922183c34d06c76ac223e389f CRs-Fixed: 3962711 --- canoe-kiwi-cnss.dts | 8 +++----- canoe-peach-cnss.dts | 8 +++----- 2 files changed, 6 insertions(+), 10 deletions(-) diff --git a/canoe-kiwi-cnss.dts b/canoe-kiwi-cnss.dts index 5af778f5..8848ff2a 100644 --- a/canoe-kiwi-cnss.dts +++ b/canoe-kiwi-cnss.dts @@ -12,10 +12,8 @@ / { model = "Qualcomm Technologies, Inc. Canoe SoCs"; compatible = "qcom,canoe", "qcom,canoep", "qcom,canoe-mtp", "qcom,canoe-cdp"; - qcom,msm-id = <0x10294 0x10000>, <0x10294 0x20000>, <0x10295 0x10000>, <0x10295 0x20000>, - <0x30294 0x10000>, <0x30294 0x20000>, <0x30295 0x10000>, <0x30295 0x20000>, - <0x1010294 0x10000>, <0x1010294 0x20000>, <0x1010295 0x10000>, - <0x1010295 0x20000>, <0x1030294 0x10000>, <0x1030294 0x20000>, - <0x1030295 0x10000>, <0x1030295 0x20000>; + qcom,msm-id = <0x294 0x10000>, <0x294 0x20000>, <0x295 0x10000>, <0x295 0x20000>, + <0x1000294 0x10000>, <0x1000294 0x20000>, + <0x1000295 0x10000>, <0x1000295 0x20000>; qcom,board-id = <0x1000001 0>, <0x1000008 0>, <0x1000015 0>; }; diff --git a/canoe-peach-cnss.dts b/canoe-peach-cnss.dts index 04b6a5e8..be41a1ac 100644 --- a/canoe-peach-cnss.dts +++ b/canoe-peach-cnss.dts @@ -12,10 +12,8 @@ / { model = "Qualcomm Technologies, Inc. Canoe SoCs"; compatible = "qcom,canoe", "qcom,canoep"; - qcom,msm-id = <0x10294 0x10000>, <0x10294 0x20000>, <0x10295 0x10000>, <0x10295 0x20000>, - <0x30294 0x10000>, <0x30294 0x20000>, <0x30295 0x10000>, <0x30295 0x20000>, - <0x1010294 0x10000>, <0x1010294 0x20000>, <0x1010295 0x10000>, - <0x1010295 0x20000>, <0x1030294 0x10000>, <0x1030294 0x20000>, - <0x1030295 0x10000>, <0x1030295 0x20000>; + qcom,msm-id = <0x294 0x10000>, <0x294 0x20000>, <0x295 0x10000>, <0x295 0x20000>, + <0x1000294 0x10000>, <0x1000294 0x20000>, <0x1000295 0x10000>, + <0x1000295 0x20000>; qcom,board-id = <1 0>, <8 0>, <0x10021 0>, <11 0>, <0x15 0>, <0x208 0>, <0x108 0>; }; From 9e5b935436f5807580a5969608d0349667212f4d Mon Sep 17 00:00:00 2001 From: Kartikey Arora Date: Mon, 28 Oct 2024 02:01:52 +0530 Subject: [PATCH 14/14] ARM: dts: msm: Add opensource wlan device tree support for kera-wcn7750 This change adds wlan related dt files for kera-wcn7750 which has icnss and wpss dtsi node enabled. Change-Id: I5e9f9453a58bc7a79e153e10a15b25cf4a71fbb4 CRs-Fixed: 3962537 --- kera-mtp-wcn7750.dts | 16 ++++ kera-qrd-wcn7750.dts | 16 ++++ kera-rcm-wcn7750.dts | 16 ++++ kera-wcn7750.dtsi | 181 +++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 229 insertions(+) create mode 100644 kera-mtp-wcn7750.dts create mode 100644 kera-qrd-wcn7750.dts create mode 100644 kera-rcm-wcn7750.dts create mode 100644 kera-wcn7750.dtsi diff --git a/kera-mtp-wcn7750.dts b/kera-mtp-wcn7750.dts new file mode 100644 index 00000000..cb32303b --- /dev/null +++ b/kera-mtp-wcn7750.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "kera-wcn7750.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Kera MTP"; + compatible = "qcom,kera-mtp", "qcom,kera", "qcom,mtp"; + qcom,msm-id = <686 0x10000>, <659 0x10000>; + qcom,board-id = <0x010008 1>, <0x020008 1>, <0x030008 1>; +}; diff --git a/kera-qrd-wcn7750.dts b/kera-qrd-wcn7750.dts new file mode 100644 index 00000000..2e845c87 --- /dev/null +++ b/kera-qrd-wcn7750.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "kera-wcn7750.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Kera QRD"; + compatible = "qcom,kera-qrd", "qcom,kera", "qcom,qrd"; + qcom,msm-id = <686 0x10000>, <659 0x10000>; + qcom,board-id = <0x01000B 0>, <0x02000B 0>, <0x03000B 0>; +}; diff --git a/kera-rcm-wcn7750.dts b/kera-rcm-wcn7750.dts new file mode 100644 index 00000000..a9932d75 --- /dev/null +++ b/kera-rcm-wcn7750.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "kera-wcn7750.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Kera RCM"; + compatible = "qcom,kera-rcm", "qcom,kera", "qcom,rcm"; + qcom,msm-id = <686 0x10000>, <659 0x10000>; + qcom,board-id = <0x010015 1>, <0x020015 1>; +}; diff --git a/kera-wcn7750.dtsi b/kera-wcn7750.dtsi new file mode 100644 index 00000000..4b9c7d2b --- /dev/null +++ b/kera-wcn7750.dtsi @@ -0,0 +1,181 @@ +// SPDX-License-Identifier: BSD-3-Clause + +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include + +&soc { + qcom,smp2p-wpss { + smp2p_wlan_1_in: qcom,smp2p-wlan-1-in { + qcom,entry-name = "wlan"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + smp2p_wlan_1_out: qcom,smp2p-wlan-1-out { + qcom,entry-name = "wlan"; + #qcom,smem-state-cells = <1>; + }; + + smp2p_wlan_2_in: qcom,smp2p-wlan-2-in { + qcom,entry-name = "wlan_soc_wake"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + smp2p_wlan_2_out: qcom,smp2p-wlan-2-out { + qcom,entry-name = "wlan_soc_wake"; + #qcom,smem-state-cells = <1>; + }; + + smp2p_wlan_3_out: qcom,smp2p-wlan-3-out { + qcom,entry-name = "wlan_ep_power_save"; + #qcom,smem-state-cells = <1>; + }; + }; + + wpss_pas: remoteproc-wpss@97000000 { + firmware-name = "wcn7750/wpss.mdt"; + }; + + icnss2: qcom,wcn7750 { + compatible = "qcom,wcn7750"; + reg = <0x17110040 0x0>, + <0xc0000000 0x10000>; + reg-names = "msi_addr", "smmu_iova_ipa"; + qcom,rproc-handle = <&wpss_pas>; + iommus = <&apps_smmu 0x1480 0x1>; + wlan-en-gpio =<35>; + host-sol-gpio =<132>; + dev-sol-gpio =<32>; + wlan-sw-ctrl-gpio =<80>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + + qcom,iommu-dma = "fastmap"; + qcom,iommu-faults = "stall-disable", "HUPCF", "non-fatal"; + qcom,iommu-dma-addr-pool = <0xb0000000 0x10000000>; + qcom,iommu-geometry = <0xb0000000 0x10010000>; + dma-coherent; + qcom,fw-prefix; + qcom,wlan; + tsens = "sys-therm-3"; + qcom,wlan-msa-fixed-region = <&wlan_msa_mem>; + + vdd-cx-mx-supply = <&S3B>; + qcom,vdd-cx-mx-config = <880000 1040000 0 0 0>; + vdd-1.8-xo-supply = <&S1B>; + qcom,vdd-1.8-xo-config = <1856000 2104000 0 0 0>; + vdd-1.3-rfa-supply = <&S2B>; + qcom,vdd-1.3-rfa-config = <1256000 1408000 0 0 0>; + + qcom,smem-states = <&smp2p_wlan_1_out 0>, + <&smp2p_wlan_2_out 0>, + <&smp2p_wlan_3_out 0>; + qcom,smem-state-names = "wlan-smp2p-out", + "wlan-soc-wake-smp2p-out", + "wlan-ep-powersave-smp2p-out"; + + qcom,qmp = <&aoss_qmp>; + qcom,vreg_ol_cpr ="s3b"; + + interconnects = + <&pcie_noc MASTER_PCIE_0 &pcie_noc SLAVE_ANOC_PCIE_GEM_NOC>, + <&gem_noc MASTER_ANOC_PCIE_GEM_NOC &mc_virt SLAVE_EBI1>; + interconnect-names = "pcie_to_memnoc", "memnoc_to_ddr"; + + qcom,icc-path-count = <2>; + qcom,bus-bw-cfg-count = <9>; + qcom,bus-bw-cfg = + /** ICC Path 1 **/ + <0 0>, /* no vote */ + /* idle: 0-18 Mbps snoc/anoc: 100 Mhz */ + <2250 1200000>, + /* low: 18-60 Mbps snoc/anoc: 100 Mhz */ + <7500 1200000>, + /* medium: 60-240 Mbps snoc/anoc: 100 Mhz */ + <30000 1200000>, + /* high: 240-1200 Mbps snoc/anoc: 100 Mhz */ + <100000 1200000>, + /* very high: > 1200 Mbps snoc/anoc: 403 Mhz */ + <175000 3224000>, + /* ultra high: DBS mode snoc/anoc: 403 Mhz */ + <312500 3224000>, + /* super high: DBS mode snoc/anoc: 533 Mhz */ + <587500 4264000>, + /* low (latency critical): 18-60 Mbps snoc/anoc: 200 Mhz */ + <7500 1600000>, + + /** ICC Path 2 **/ + <0 0>, + /* idle: 0-18 Mbps ddr: 451.2 MHz */ + <2250 2188800>, + /* low: 18-60 Mbps ddr: 451.2 MHz */ + <7500 2188800>, + /* medium: 60-240 Mbps ddr: 451.2 MHz */ + <30000 2188800>, + /* high: 240-1200 Mbps ddr: 451.2 MHz */ + <100000 2188800>, + /* very high: > 1200 Mbps ddr: 1555 MHz */ + <175000 6220800>, + /* ultra high: DBS mode ddr: 2092 MHz */ + <312500 8368000>, + /* super high: DBS mode ddr: 3.2 GHz */ + <587500 12800000>, + /* low (latency critical): 18-60 Mbps ddr: 451.2 MHz */ + <7500 2188800>; + + icnss_cdev_apss: qcom,icnss_cdev1 { + #cooling-cells = <2>; + }; + + icnss_cdev_wpss: qcom,icnss_cdev2 { + #cooling-cells = <2>; + }; + + qcom,smp2p_map_wlan_1_in { + interrupts-extended = <&smp2p_wlan_1_in 0 0>, + <&smp2p_wlan_1_in 1 0>; + interrupt-names = "qcom,smp2p-force-fatal-error", + "qcom,smp2p-early-crash-ind"; + }; + + qcom,smp2p_map_wlan_2_in { + interrupts-extended = <&smp2p_wlan_2_in 0 0>; + interrupt-names = "qcom,smp2p-soc-wake-ack"; + }; + }; +};