165 lines
5.5 KiB
C
165 lines
5.5 KiB
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
|
|
/*
|
|
* Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
|
|
*/
|
|
|
|
#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_TUNA_H
|
|
#define __DT_BINDINGS_INTERCONNECT_QCOM_TUNA_H
|
|
|
|
#define MASTER_GPU_TCU 0
|
|
#define MASTER_SYS_TCU 1
|
|
#define MASTER_APPSS_PROC 2
|
|
#define MASTER_LLCC 3
|
|
#define MASTER_QSPI_0 4
|
|
#define MASTER_QUP_1 5
|
|
#define MASTER_QUP_2 6
|
|
#define MASTER_A1NOC_SNOC 7
|
|
#define MASTER_A2NOC_SNOC 8
|
|
#define MASTER_CAMNOC_HF 9
|
|
#define MASTER_CAMNOC_NRT_ICP_SF 10
|
|
#define MASTER_CAMNOC_RT_CDM_SF 11
|
|
#define MASTER_CAMNOC_SF 12
|
|
#define MASTER_GEM_NOC_CNOC 13
|
|
#define MASTER_GEM_NOC_PCIE_SNOC 14
|
|
#define MASTER_GFX3D 15
|
|
#define MASTER_LPASS_GEM_NOC 16
|
|
#define MASTER_LPASS_LPINOC 17
|
|
#define MASTER_LPIAON_NOC 18
|
|
#define MASTER_MDP 19
|
|
#define MASTER_MSS_PROC 20
|
|
#define MASTER_MNOC_HF_MEM_NOC 21
|
|
#define MASTER_MNOC_SF_MEM_NOC 22
|
|
#define MASTER_COMPUTE_NOC 23
|
|
#define MASTER_ANOC_PCIE_GEM_NOC 24
|
|
#define MASTER_SNOC_SF_MEM_NOC 25
|
|
#define MASTER_VIDEO_CV_PROC 26
|
|
#define MASTER_VIDEO_EVA 27
|
|
#define MASTER_VIDEO_MVP 28
|
|
#define MASTER_VIDEO_V_PROC 29
|
|
#define MASTER_CNOC_CFG 30
|
|
#define MASTER_CNOC_MNOC_HF_CFG 31
|
|
#define MASTER_PCIE_ANOC_CFG 32
|
|
#define MASTER_CNOC_MNOC_SF_CFG 33
|
|
#define MASTER_QUP_CORE_1 34
|
|
#define MASTER_QUP_CORE_2 35
|
|
#define MASTER_CRYPTO 36
|
|
#define MASTER_IPA 37
|
|
#define MASTER_LPASS_PROC 38
|
|
#define MASTER_CDSP_PROC 39
|
|
#define MASTER_SOCCP_AGGR_NOC 40
|
|
#define MASTER_WLAN_Q6 41
|
|
#define MASTER_GIC 42
|
|
#define MASTER_PCIE_0 43
|
|
#define MASTER_QDSS_ETR 44
|
|
#define MASTER_QDSS_ETR_1 45
|
|
#define MASTER_SDCC_2 46
|
|
#define MASTER_UFS_MEM 47
|
|
#define MASTER_USB3_0 48
|
|
#define SLAVE_EBI1 512
|
|
#define SLAVE_AHB2PHY_SOUTH 513
|
|
#define SLAVE_AHB2PHY_NORTH 514
|
|
#define SLAVE_AOSS 515
|
|
#define SLAVE_CAMERA_CFG 516
|
|
#define SLAVE_CLK_CTL 517
|
|
#define SLAVE_CRYPTO_0_CFG 518
|
|
#define SLAVE_DISPLAY_CFG 519
|
|
#define SLAVE_EVA_CFG 520
|
|
#define SLAVE_GFX3D_CFG 521
|
|
#define SLAVE_I3C_IBI0_CFG 522
|
|
#define SLAVE_I3C_IBI1_CFG 523
|
|
#define SLAVE_IMEM_CFG 524
|
|
#define SLAVE_IPA_CFG 525
|
|
#define SLAVE_IPC_ROUTER_CFG 526
|
|
#define SLAVE_CNOC_MSS 527
|
|
#define SLAVE_PCIE_CFG 528
|
|
#define SLAVE_PRNG 529
|
|
#define SLAVE_QDSS_CFG 530
|
|
#define SLAVE_QSPI_0 531
|
|
#define SLAVE_QUP_1 532
|
|
#define SLAVE_QUP_2 533
|
|
#define SLAVE_SDCC_2 534
|
|
#define SLAVE_SOCCP 535
|
|
#define SLAVE_TCSR 536
|
|
#define SLAVE_TLMM 537
|
|
#define SLAVE_TME_CFG 538
|
|
#define SLAVE_UFS_MEM_CFG 539
|
|
#define SLAVE_USB3_0 540
|
|
#define SLAVE_VENUS_CFG 541
|
|
#define SLAVE_VSENSE_CTRL_CFG 542
|
|
#define SLAVE_A1NOC_SNOC 543
|
|
#define SLAVE_A2NOC_SNOC 544
|
|
#define SLAVE_GEM_NOC_CNOC 545
|
|
#define SLAVE_SNOC_GEM_NOC_SF 546
|
|
#define SLAVE_LLCC 547
|
|
#define SLAVE_LPASS_GEM_NOC 548
|
|
#define SLAVE_LPIAON_NOC_LPASS_AG_NOC 549
|
|
#define SLAVE_LPICX_NOC_LPIAON_NOC 550
|
|
#define SLAVE_MNOC_HF_MEM_NOC 551
|
|
#define SLAVE_MNOC_SF_MEM_NOC 552
|
|
#define SLAVE_CDSP_MEM_NOC 553
|
|
#define SLAVE_MEM_NOC_PCIE_SNOC 554
|
|
#define SLAVE_ANOC_PCIE_GEM_NOC 555
|
|
#define SLAVE_APPSS 556
|
|
#define SLAVE_CNOC_CFG 557
|
|
#define SLAVE_DDRSS_CFG 558
|
|
#define SLAVE_CNOC_MNOC_HF_CFG 559
|
|
#define SLAVE_CNOC_MNOC_SF_CFG 560
|
|
#define SLAVE_PCIE_ANOC_CFG 561
|
|
#define SLAVE_QUP_CORE_1 562
|
|
#define SLAVE_QUP_CORE_2 563
|
|
#define SLAVE_BOOT_IMEM 564
|
|
#define SLAVE_IMEM 565
|
|
#define SLAVE_BOOT_IMEM_2 566
|
|
#define SLAVE_SERVICE_CNOC 567
|
|
#define SLAVE_SERVICE_MNOC_HF 568
|
|
#define SLAVE_SERVICE_MNOC_SF 569
|
|
#define SLAVE_SERVICE_PCIE_ANOC 570
|
|
#define SLAVE_PCIE_0 571
|
|
#define SLAVE_QDSS_STM 572
|
|
#define SLAVE_TCU 573
|
|
#define MASTER_LLCC_DISP 1000
|
|
#define MASTER_MDP_DISP 1001
|
|
#define MASTER_MNOC_HF_MEM_NOC_DISP 1002
|
|
#define MASTER_ANOC_PCIE_GEM_NOC_DISP 1003
|
|
#define SLAVE_EBI1_DISP 1512
|
|
#define SLAVE_LLCC_DISP 1513
|
|
#define SLAVE_MNOC_HF_MEM_NOC_DISP 1514
|
|
#define MASTER_LLCC_CAM_IFE_0 2000
|
|
#define MASTER_CAMNOC_HF_CAM_IFE_0 2001
|
|
#define MASTER_CAMNOC_NRT_ICP_SF_CAM_IFE_0 2002
|
|
#define MASTER_CAMNOC_RT_CDM_SF_CAM_IFE_0 2003
|
|
#define MASTER_CAMNOC_SF_CAM_IFE_0 2004
|
|
#define MASTER_MNOC_HF_MEM_NOC_CAM_IFE_0 2005
|
|
#define MASTER_MNOC_SF_MEM_NOC_CAM_IFE_0 2006
|
|
#define MASTER_ANOC_PCIE_GEM_NOC_CAM_IFE_0 2007
|
|
#define SLAVE_EBI1_CAM_IFE_0 2512
|
|
#define SLAVE_LLCC_CAM_IFE_0 2513
|
|
#define SLAVE_MNOC_HF_MEM_NOC_CAM_IFE_0 2514
|
|
#define SLAVE_MNOC_SF_MEM_NOC_CAM_IFE_0 2515
|
|
#define MASTER_LLCC_CAM_IFE_1 3000
|
|
#define MASTER_CAMNOC_HF_CAM_IFE_1 3001
|
|
#define MASTER_CAMNOC_NRT_ICP_SF_CAM_IFE_1 3002
|
|
#define MASTER_CAMNOC_RT_CDM_SF_CAM_IFE_1 3003
|
|
#define MASTER_CAMNOC_SF_CAM_IFE_1 3004
|
|
#define MASTER_MNOC_HF_MEM_NOC_CAM_IFE_1 3005
|
|
#define MASTER_MNOC_SF_MEM_NOC_CAM_IFE_1 3006
|
|
#define MASTER_ANOC_PCIE_GEM_NOC_CAM_IFE_1 3007
|
|
#define SLAVE_EBI1_CAM_IFE_1 3512
|
|
#define SLAVE_LLCC_CAM_IFE_1 3513
|
|
#define SLAVE_MNOC_HF_MEM_NOC_CAM_IFE_1 3514
|
|
#define SLAVE_MNOC_SF_MEM_NOC_CAM_IFE_1 3515
|
|
#define MASTER_LLCC_CAM_IFE_2 4000
|
|
#define MASTER_CAMNOC_HF_CAM_IFE_2 4001
|
|
#define MASTER_CAMNOC_NRT_ICP_SF_CAM_IFE_2 4002
|
|
#define MASTER_CAMNOC_RT_CDM_SF_CAM_IFE_2 4003
|
|
#define MASTER_CAMNOC_SF_CAM_IFE_2 4004
|
|
#define MASTER_MNOC_HF_MEM_NOC_CAM_IFE_2 4005
|
|
#define MASTER_MNOC_SF_MEM_NOC_CAM_IFE_2 4006
|
|
#define MASTER_ANOC_PCIE_GEM_NOC_CAM_IFE_2 4007
|
|
#define SLAVE_EBI1_CAM_IFE_2 4512
|
|
#define SLAVE_LLCC_CAM_IFE_2 4513
|
|
#define SLAVE_MNOC_HF_MEM_NOC_CAM_IFE_2 4514
|
|
#define SLAVE_MNOC_SF_MEM_NOC_CAM_IFE_2 4515
|
|
|
|
#endif
|