31 lines
1.1 KiB
C
31 lines
1.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
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/*
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* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PM6450_H
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#define _DT_BINDINGS_QCOM_SPMI_VADC_PM6450_H
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#ifndef PM6450_SID
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#define PM6450_SID 1
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#endif
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/* ADC channels for PM6450_ADC for PMIC7 */
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#define PM6450_ADC7_REF_GND (PM6450_SID << 8 | 0x0)
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#define PM6450_ADC7_1P25VREF (PM6450_SID << 8 | 0x01)
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#define PM6450_ADC7_VREF_VADC (PM6450_SID << 8 | 0x02)
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#define PM6450_ADC7_DIE_TEMP (PM6450_SID << 8 | 0x03)
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#define PM6450_ADC7_AMUX1_GPIO2 (PM6450_SID << 8 | 0x0a)
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#define PM6450_ADC7_AMUX2_GPIO3 (PM6450_SID << 8 | 0x0b)
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#define PM6450_ADC7_AMUX3_GPIO4 (PM6450_SID << 8 | 0x0c)
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#define PM6450_ADC7_AMUX4_GPIO5 (PM6450_SID << 8 | 0x0d)
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/* 100k pull-up2 */
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#define PM6450_ADC7_AMUX1_GPIO2_100K_PU (PM6450_SID << 8 | 0x4a)
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#define PM6450_ADC7_AMUX2_GPIO3_100K_PU (PM6450_SID << 8 | 0x4b)
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#define PM6450_ADC7_AMUX3_GPIO4_100K_PU (PM6450_SID << 8 | 0x4c)
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#define PM6450_ADC7_AMUX4_GPIO5_100K_PU (PM6450_SID << 8 | 0x4d)
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#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PM6450_H */
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