44 lines
1.3 KiB
C
44 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef _DT_BINDINGS_CLK_QCOM_EVA_CC_SUN_H
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#define _DT_BINDINGS_CLK_QCOM_EVA_CC_SUN_H
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/* EVA_CC clocks */
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#define EVA_CC_AHB_CLK 0
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#define EVA_CC_AHB_CLK_SRC 1
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#define EVA_CC_MVS0_CLK 2
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#define EVA_CC_MVS0_CLK_SRC 3
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#define EVA_CC_MVS0_DIV_CLK_SRC 4
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#define EVA_CC_MVS0_FREERUN_CLK 5
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#define EVA_CC_MVS0_SHIFT_CLK 6
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#define EVA_CC_MVS0C_CLK 7
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#define EVA_CC_MVS0C_DIV2_DIV_CLK_SRC 8
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#define EVA_CC_MVS0C_FREERUN_CLK 9
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#define EVA_CC_MVS0C_SHIFT_CLK 10
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#define EVA_CC_PLL0 11
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#define EVA_CC_SLEEP_CLK 12
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#define EVA_CC_SLEEP_CLK_SRC 13
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#define EVA_CC_XO_CLK 14
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#define EVA_CC_XO_CLK_SRC 15
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/* EVA_CC power domains */
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#define EVA_CC_MVS0_GDSC 0
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#define EVA_CC_MVS0C_GDSC 1
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/* EVA_CC resets */
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#define EVA_CC_INTERFACE_BCR 0
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#define EVA_CC_MVS0_BCR 1
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#define EVA_CC_MVS0_FREERUN_CLK_ARES 2
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#define EVA_CC_MVS0C_CLK_ARES 3
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#define EVA_CC_MVS0C_BCR 4
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#define EVA_CC_MVS0C_FREERUN_CLK_ARES 5
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#define EVA_CVP_EVA_CC_INTERFACE_BCR EVA_CC_INTERFACE_BCR
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#define EVA_CVP_EVA_CC_MVS0_BCR EVA_CC_MVS0_BCR
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#define EVA_CVP_EVA_CC_MVS0C_BCR EVA_CC_MVS0C_BCR
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#endif
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