152 lines
5.2 KiB
C
152 lines
5.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef _DT_BINDINGS_CLK_QCOM_CAM_CC_SUN_H
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#define _DT_BINDINGS_CLK_QCOM_CAM_CC_SUN_H
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/* CAM_CC clocks */
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#define CAM_CC_CAM_TOP_AHB_CLK 0
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#define CAM_CC_CAM_TOP_FAST_AHB_CLK 1
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#define CAM_CC_CAMNOC_DCD_XO_CLK 2
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#define CAM_CC_CAMNOC_NRT_AXI_CLK 3
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#define CAM_CC_CAMNOC_NRT_CRE_CLK 4
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#define CAM_CC_CAMNOC_NRT_IPE_NPS_CLK 5
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#define CAM_CC_CAMNOC_NRT_OFE_ANCHOR_CLK 6
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#define CAM_CC_CAMNOC_NRT_OFE_HDR_CLK 7
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#define CAM_CC_CAMNOC_NRT_OFE_MAIN_CLK 8
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#define CAM_CC_CAMNOC_RT_AXI_CLK 9
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#define CAM_CC_CAMNOC_RT_AXI_CLK_SRC 10
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#define CAM_CC_CAMNOC_RT_IFE_LITE_CLK 11
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#define CAM_CC_CAMNOC_RT_TFE_0_BAYER_CLK 12
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#define CAM_CC_CAMNOC_RT_TFE_0_MAIN_CLK 13
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#define CAM_CC_CAMNOC_RT_TFE_1_BAYER_CLK 14
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#define CAM_CC_CAMNOC_RT_TFE_1_MAIN_CLK 15
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#define CAM_CC_CAMNOC_RT_TFE_2_BAYER_CLK 16
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#define CAM_CC_CAMNOC_RT_TFE_2_MAIN_CLK 17
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#define CAM_CC_CAMNOC_XO_CLK 18
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#define CAM_CC_CCI_0_CLK 19
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#define CAM_CC_CCI_0_CLK_SRC 20
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#define CAM_CC_CCI_1_CLK 21
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#define CAM_CC_CCI_1_CLK_SRC 22
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#define CAM_CC_CCI_2_CLK 23
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#define CAM_CC_CCI_2_CLK_SRC 24
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#define CAM_CC_CORE_AHB_CLK 25
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#define CAM_CC_CPHY_RX_CLK_SRC 26
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#define CAM_CC_CRE_AHB_CLK 27
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#define CAM_CC_CRE_CLK 28
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#define CAM_CC_CRE_CLK_SRC 29
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#define CAM_CC_CSI0PHYTIMER_CLK 30
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#define CAM_CC_CSI0PHYTIMER_CLK_SRC 31
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#define CAM_CC_CSI1PHYTIMER_CLK 32
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#define CAM_CC_CSI1PHYTIMER_CLK_SRC 33
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#define CAM_CC_CSI2PHYTIMER_CLK 34
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#define CAM_CC_CSI2PHYTIMER_CLK_SRC 35
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#define CAM_CC_CSI3PHYTIMER_CLK 36
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#define CAM_CC_CSI3PHYTIMER_CLK_SRC 37
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#define CAM_CC_CSI4PHYTIMER_CLK 38
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#define CAM_CC_CSI4PHYTIMER_CLK_SRC 39
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#define CAM_CC_CSI5PHYTIMER_CLK 40
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#define CAM_CC_CSI5PHYTIMER_CLK_SRC 41
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#define CAM_CC_CSID_CLK 42
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#define CAM_CC_CSID_CLK_SRC 43
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#define CAM_CC_CSID_CSIPHY_RX_CLK 44
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#define CAM_CC_CSIPHY0_CLK 45
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#define CAM_CC_CSIPHY1_CLK 46
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#define CAM_CC_CSIPHY2_CLK 47
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#define CAM_CC_CSIPHY3_CLK 48
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#define CAM_CC_CSIPHY4_CLK 49
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#define CAM_CC_CSIPHY5_CLK 50
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#define CAM_CC_DRV_AHB_CLK 51
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#define CAM_CC_DRV_XO_CLK 52
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#define CAM_CC_FAST_AHB_CLK_SRC 53
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#define CAM_CC_GDSC_CLK 54
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#define CAM_CC_ICP_0_AHB_CLK 55
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#define CAM_CC_ICP_0_CLK 56
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#define CAM_CC_ICP_0_CLK_SRC 57
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#define CAM_CC_ICP_1_AHB_CLK 58
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#define CAM_CC_ICP_1_CLK 59
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#define CAM_CC_ICP_1_CLK_SRC 60
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#define CAM_CC_IFE_LITE_AHB_CLK 61
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#define CAM_CC_IFE_LITE_CLK 62
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#define CAM_CC_IFE_LITE_CLK_SRC 63
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#define CAM_CC_IFE_LITE_CPHY_RX_CLK 64
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#define CAM_CC_IFE_LITE_CSID_CLK 65
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#define CAM_CC_IFE_LITE_CSID_CLK_SRC 66
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#define CAM_CC_IPE_NPS_AHB_CLK 67
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#define CAM_CC_IPE_NPS_CLK 68
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#define CAM_CC_IPE_NPS_CLK_SRC 69
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#define CAM_CC_IPE_NPS_FAST_AHB_CLK 70
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#define CAM_CC_IPE_PPS_CLK 71
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#define CAM_CC_IPE_PPS_FAST_AHB_CLK 72
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#define CAM_CC_JPEG_0_CLK 73
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#define CAM_CC_JPEG_1_CLK 74
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#define CAM_CC_JPEG_CLK_SRC 75
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#define CAM_CC_OFE_AHB_CLK 76
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#define CAM_CC_OFE_ANCHOR_CLK 77
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#define CAM_CC_OFE_ANCHOR_FAST_AHB_CLK 78
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#define CAM_CC_OFE_CLK_SRC 79
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#define CAM_CC_OFE_HDR_CLK 80
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#define CAM_CC_OFE_HDR_FAST_AHB_CLK 81
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#define CAM_CC_OFE_MAIN_CLK 82
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#define CAM_CC_OFE_MAIN_FAST_AHB_CLK 83
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#define CAM_CC_PLL0 84
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#define CAM_CC_PLL0_OUT_EVEN 85
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#define CAM_CC_PLL0_OUT_ODD 86
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#define CAM_CC_PLL1 87
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#define CAM_CC_PLL1_OUT_EVEN 88
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#define CAM_CC_PLL2 89
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#define CAM_CC_PLL2_OUT_EVEN 90
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#define CAM_CC_PLL3 91
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#define CAM_CC_PLL3_OUT_EVEN 92
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#define CAM_CC_PLL4 93
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#define CAM_CC_PLL4_OUT_EVEN 94
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#define CAM_CC_PLL5 95
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#define CAM_CC_PLL5_OUT_EVEN 96
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#define CAM_CC_PLL6 97
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#define CAM_CC_PLL6_OUT_EVEN 98
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#define CAM_CC_PLL6_OUT_ODD 99
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#define CAM_CC_QDSS_DEBUG_CLK 100
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#define CAM_CC_QDSS_DEBUG_CLK_SRC 101
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#define CAM_CC_QDSS_DEBUG_XO_CLK 102
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#define CAM_CC_SLEEP_CLK 103
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#define CAM_CC_SLEEP_CLK_SRC 104
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#define CAM_CC_SLOW_AHB_CLK_SRC 105
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#define CAM_CC_TFE_0_BAYER_CLK 106
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#define CAM_CC_TFE_0_BAYER_FAST_AHB_CLK 107
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#define CAM_CC_TFE_0_CLK_SRC 108
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#define CAM_CC_TFE_0_MAIN_CLK 109
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#define CAM_CC_TFE_0_MAIN_FAST_AHB_CLK 110
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#define CAM_CC_TFE_1_BAYER_CLK 111
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#define CAM_CC_TFE_1_BAYER_FAST_AHB_CLK 112
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#define CAM_CC_TFE_1_CLK_SRC 113
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#define CAM_CC_TFE_1_MAIN_CLK 114
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#define CAM_CC_TFE_1_MAIN_FAST_AHB_CLK 115
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#define CAM_CC_TFE_2_BAYER_CLK 116
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#define CAM_CC_TFE_2_BAYER_FAST_AHB_CLK 117
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#define CAM_CC_TFE_2_CLK_SRC 118
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#define CAM_CC_TFE_2_MAIN_CLK 119
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#define CAM_CC_TFE_2_MAIN_FAST_AHB_CLK 120
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#define CAM_CC_XO_CLK_SRC 121
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/* CAM_CC power domains */
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#define CAM_CC_IPE_0_GDSC 0
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#define CAM_CC_OFE_GDSC 1
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#define CAM_CC_TFE_0_GDSC 2
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#define CAM_CC_TFE_1_GDSC 3
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#define CAM_CC_TFE_2_GDSC 4
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#define CAM_CC_TITAN_TOP_GDSC 5
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/* CAM_CC resets */
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#define CAM_CC_DRV_BCR 0
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#define CAM_CC_ICP_BCR 1
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#define CAM_CC_IPE_0_BCR 2
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#define CAM_CC_OFE_BCR 3
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#define CAM_CC_QDSS_DEBUG_BCR 4
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#define CAM_CC_TFE_0_BCR 5
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#define CAM_CC_TFE_1_BCR 6
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#define CAM_CC_TFE_2_BCR 7
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#endif
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