80 lines
3.9 KiB
C
Executable File
80 lines
3.9 KiB
C
Executable File
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (c) 2021 The Linux Foundation. All rights reserved.
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*/
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#ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PM5100_H
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#define _DT_BINDINGS_QCOM_SPMI_VADC_PM5100_H
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#ifndef PM5100_SID
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#define PM5100_SID 0
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#endif
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/* ADC channels for PM5100_ADC for PMIC5 Gen3 */
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#define PM5100_ADC5_GEN3_OFFSET_REF (PM5100_SID << 8 | 0x0)
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#define PM5100_ADC5_GEN3_1P25VREF (PM5100_SID << 8 | 0x01)
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#define PM5100_ADC5_GEN3_VREF_VADC (PM5100_SID << 8 | 0x02)
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#define PM5100_ADC5_GEN3_DIE_TEMP (PM5100_SID << 8 | 0x03)
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#define PM5100_ADC5_GEN3_AMUX1_THM (PM5100_SID << 8 | 0x04)
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#define PM5100_ADC5_GEN3_BAT_ID (PM5100_SID << 8 | 0x05)
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#define PM5100_ADC5_GEN3_BATT_THM (PM5100_SID << 8 | 0x06)
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#define PM5100_ADC5_GEN3_AMUX4_THM (PM5100_SID << 8 | 0x07)
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#define PM5100_ADC5_GEN3_AMUX5_THM (PM5100_SID << 8 | 0x08)
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#define PM5100_ADC5_GEN3_AMUX6_THM (PM5100_SID << 8 | 0x09)
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#define PM5100_ADC5_GEN3_AMUX1_GPIO10 (PM5100_SID << 8 | 0x0a)
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#define PM5100_ADC5_GEN3_AMUX2_GPIO11 (PM5100_SID << 8 | 0x0b)
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#define PM5100_ADC5_GEN3_AMUX3_GPIO (PM5100_SID << 8 | 0x0c)
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#define PM5100_ADC5_GEN3_AMUX4_GPIO (PM5100_SID << 8 | 0x0d)
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#define PM5100_ADC5_GEN3_CHG_TEMP (PM5100_SID << 8 | 0x10)
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#define PM5100_ADC5_GEN3_USB_SNS_V_16 (PM5100_SID << 8 | 0x11)
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#define PM5100_ADC5_GEN3_VIN_DIV16_MUX (PM5100_SID << 8 | 0x12)
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#define PM5100_ADC5_GEN3_USB_IN_I (PM5100_SID << 8 | 0x17)
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#define PM5100_ADC5_GEN3_ICHG_FB (PM5100_SID << 8 | 0xa1)
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/* 30k pull-up1 */
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#define PM5100_ADC5_GEN3_AMUX1_THM_30K_PU (PM5100_SID << 8 | 0x24)
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#define PM5100_ADC5_GEN3_BAT_ID_30K_PU (PM5100_SID << 8 | 0x25)
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#define PM5100_ADC5_GEN3_BATT_THM_30K_PU (PM5100_SID << 8 | 0x26)
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#define PM5100_ADC5_GEN3_AMUX4_THM_30K_PU (PM5100_SID << 8 | 0x27)
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#define PM5100_ADC5_GEN3_AMUX5_THM_30K_PU (PM5100_SID << 8 | 0x28)
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#define PM5100_ADC5_GEN3_AMUX6_THM_30K_PU (PM5100_SID << 8 | 0x29)
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#define PM5100_ADC5_GEN3_AMUX1_GPIO10_30K_PU (PM5100_SID << 8 | 0x2a)
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#define PM5100_ADC5_GEN3_AMUX2_GPIO11_30K_PU (PM5100_SID << 8 | 0x2b)
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#define PM5100_ADC5_GEN3_AMUX3_GPIO_30K_PU (PM5100_SID << 8 | 0x2c)
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#define PM5100_ADC5_GEN3_AMUX4_GPIO_30K_PU (PM5100_SID << 8 | 0x2d)
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/* 100k pull-up2 */
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#define PM5100_ADC5_GEN3_AMUX1_THM_100K_PU (PM5100_SID << 8 | 0x44)
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#define PM5100_ADC5_GEN3_BAT_ID_100K_PU (PM5100_SID << 8 | 0x45)
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#define PM5100_ADC5_GEN3_BATT_THM_100K_PU (PM5100_SID << 8 | 0x46)
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#define PM5100_ADC5_GEN3_AMUX4_THM_100K_PU (PM5100_SID << 8 | 0x47)
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#define PM5100_ADC5_GEN3_AMUX5_THM_100K_PU (PM5100_SID << 8 | 0x48)
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#define PM5100_ADC5_GEN3_AMUX6_THM_100K_PU (PM5100_SID << 8 | 0x49)
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#define PM5100_ADC5_GEN3_AMUX1_GPIO10_100K_PU (PM5100_SID << 8 | 0x4a)
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#define PM5100_ADC5_GEN3_AMUX2_GPIO11_100K_PU (PM5100_SID << 8 | 0x4b)
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#define PM5100_ADC5_GEN3_AMUX3_GPIO_100K_PU (PM5100_SID << 8 | 0x4c)
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#define PM5100_ADC5_GEN3_AMUX4_GPIO_100K_PU (PM5100_SID << 8 | 0x4d)
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/* 400k pull-up3 */
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#define PM5100_ADC5_GEN3_AMUX1_THM_400K_PU (PM5100_SID << 8 | 0x64)
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#define PM5100_ADC5_GEN3_BAT_ID_400K_PU (PM5100_SID << 8 | 0x65)
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#define PM5100_ADC5_GEN3_BATT_THM_400K_PU (PM5100_SID << 8 | 0x66)
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#define PM5100_ADC5_GEN3_AMUX4_THM_400K_PU (PM5100_SID << 8 | 0x67)
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#define PM5100_ADC5_GEN3_AMUX5_THM_400K_PU (PM5100_SID << 8 | 0x68)
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#define PM5100_ADC5_GEN3_AMUX6_THM_400K_PU (PM5100_SID << 8 | 0x69)
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#define PM5100_ADC5_GEN3_AMUX1_GPIO10_400K_PU (PM5100_SID << 8 | 0x6a)
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#define PM5100_ADC5_GEN3_AMUX2_GPIO11_400K_PU (PM5100_SID << 8 | 0x6b)
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#define PM5100_ADC5_GEN3_AMUX3_GPIO_400K_PU (PM5100_SID << 8 | 0x6c)
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#define PM5100_ADC5_GEN3_AMUX4_GPIO_400K_PU (PM5100_SID << 8 | 0x6d)
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/* 1/3 Divider */
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#define PM5100_ADC5_GEN3_GPIO10_DIV3 (PM5100_SID << 8 | 0x8a)
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#define PM5100_ADC5_GEN3_GPIO11_DIV3 (PM5100_SID << 8 | 0x8b)
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#define PM5100_ADC5_GEN3_VPH_PWR (PM5100_SID << 8 | 0x8e)
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#define PM5100_ADC5_GEN3_VBAT_SNS_QBG (PM5100_SID << 8 | 0x8f)
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#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PM5100_H */
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