110 lines
3.6 KiB
C
Executable File
110 lines
3.6 KiB
C
Executable File
/* SPDX-License-Identifier: GPL-2.0-only */
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/* Copyright (c) 2014, 2019-2021, The Linux Foundation. All rights reserved. */
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/* Copyright (c) 2022-2024, Qualcomm Innovation Center, Inc. All rights reserved. */
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#ifndef __QCOM_CLK_REGMAP_H__
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#define __QCOM_CLK_REGMAP_H__
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#include <linux/clk-provider.h>
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#include <linux/debugfs.h>
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#include "vdd-class.h"
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#include <soc/qcom/crm.h>
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struct regmap;
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/**
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* struct clk_regmap_ops - Operations for clk_regmap.
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*
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* @list_registers: Queries the hardware to get the current register contents.
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* This callback is optional.
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*
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* @list_rate: On success, return the nth supported frequency for a given
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* clock that is below rate_max. Return -ENXIO in case there is
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* no frequency table.
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*
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* @set_flags: Set custom flags which deal with hardware specifics. Returns 0
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* on success, error otherwise.
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*
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* @calc_pll: On success returns pll output frequency. Returns 0
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* on success, error otherwise.
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* @set_crm_rate: Set crmc/crmb clk frequency. Returns 0
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* on success, error otherwise.
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* @set_crmb_rate: Set crmb clk frequency in ab, ib terms. Returns 0
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* on success, error otherwise.
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*/
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struct clk_regmap_ops {
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void (*list_registers)(struct seq_file *f,
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struct clk_hw *hw);
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long (*list_rate)(struct clk_hw *hw, unsigned int n,
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unsigned long rate_max);
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int (*set_flags)(struct clk_hw *clk, unsigned long flags);
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unsigned long (*calc_pll)(struct clk_hw *hw, u32 l, u64 a);
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unsigned long (*set_crm_rate)(struct clk_hw *hw, enum crm_drv_type client_type,
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u32 client_idx, u32 pwr_st, unsigned long rate);
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unsigned long (*set_crmb_rate)(struct clk_hw *hw, enum crm_drv_type client_type,
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u32 client_idx, u32 resource_idx, u32 pwr_st,
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u32 ab_rate, u32 ib_rate);
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};
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/**
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* struct clk_regmap - regmap supporting clock
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* @hw: handle between common and hardware-specific interfaces
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* @regmap: regmap to use for regmap helpers and/or by providers
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* @enable_reg: register when using regmap enable/disable ops
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* @enable_mask: mask when using regmap enable/disable ops
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* @enable_is_inverted: flag to indicate set enable_mask bits to disable
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* when using clock_enable_regmap and friends APIs.
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* @vdd_data: struct containing vdd-class data for this clock
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* @ops: operations this clk_regmap supports
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* @crm: clk crm regmap
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*/
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struct clk_regmap {
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struct clk_hw hw;
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struct regmap *regmap;
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unsigned int enable_reg;
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unsigned int enable_mask;
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bool enable_is_inverted;
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struct clk_vdd_class_data vdd_data;
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struct clk_regmap_ops *ops;
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struct list_head list_node;
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struct device *dev;
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struct clk_crm *crm;
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u8 crm_vcd;
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u8 crm_base_node;
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u8 crm_num_node;
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#define QCOM_CLK_IS_CRITICAL BIT(0)
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#define QCOM_CLK_BOOT_CRITICAL BIT(1)
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unsigned long flags;
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};
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static inline struct clk_regmap *to_clk_regmap(struct clk_hw *hw)
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{
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return container_of(hw, struct clk_regmap, hw);
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}
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int clk_is_enabled_regmap(struct clk_hw *hw);
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int clk_enable_regmap(struct clk_hw *hw);
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void clk_disable_regmap(struct clk_hw *hw);
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int clk_prepare_regmap(struct clk_hw *hw);
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void clk_unprepare_regmap(struct clk_hw *hw);
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int clk_pre_change_regmap(struct clk_hw *hw, unsigned long cur_rate,
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unsigned long new_rate);
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int clk_post_change_regmap(struct clk_hw *hw, unsigned long old_rate,
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unsigned long cur_rate);
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int devm_clk_register_regmap(struct device *dev, struct clk_regmap *rclk);
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void devm_clk_regmap_list_node(struct device *dev, struct clk_regmap *rclk);
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bool clk_is_regmap_clk(struct clk_hw *hw);
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int clk_runtime_get_regmap(struct clk_regmap *rclk);
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void clk_runtime_put_regmap(struct clk_regmap *rclk);
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void clk_restore_critical_clocks(struct device *dev);
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struct clk_register_data {
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char *name;
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u32 offset;
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};
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#endif
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