Pull ARM SoC driver updates from Arnd Bergmann:
"These are changes for drivers that are intimately tied to some SoC and
for some reason could not get merged through the respective subsystem
maintainer tree.
The largest single change here this time around is the Tegra
iommu/memory controller driver, which gets updated to the new iommu DT
binding. More drivers like this are likely to follow for the
following merge window, but we should be able to do those through the
iommu maintainer.
Other notable changes are:
- reset controller drivers from the reset maintainer (socfpga, sti,
berlin)
- fixes for the keystone navigator driver merged last time
- at91 rtc driver changes related to the at91 cleanups
- ARM perf driver changes from Will Deacon
- updates for the brcmstb_gisb driver"
* tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (53 commits)
clocksource: arch_timer: Allow the device tree to specify uninitialized timer registers
clocksource: arch_timer: Fix code to use physical timers when requested
memory: Add NVIDIA Tegra memory controller support
bus: brcmstb_gisb: Add register offset tables for older chips
bus: brcmstb_gisb: Look up register offsets in a table
bus: brcmstb_gisb: Introduce wrapper functions for MMIO accesses
bus: brcmstb_gisb: Make the driver buildable on MIPS
of: Add NVIDIA Tegra memory controller binding
ARM: tegra: Move AHB Kconfig to drivers/amba
amba: Add Kconfig file
clk: tegra: Implement memory-controller clock
serial: samsung: Fix serial config dependencies for exynos7
bus: brcmstb_gisb: resolve section mismatch
ARM: common: edma: edma_pm_resume may be unused
ARM: common: edma: add suspend resume hook
powerpc/iommu: Rename iommu_[un]map_sg functions
rtc: at91sam9: add DT bindings documentation
rtc: at91sam9: use clk API instead of relying on AT91_SLOW_CLOCK
ARM: at91: add clk_lookup entry for RTT devices
rtc: at91sam9: rework the Kconfig description
...
Pull ARM SoC platform changes from Arnd Bergmann:
"New and updated SoC support, notable changes include:
- bcm:
brcmstb SMP support
initial iproc/cygnus support
- exynos:
Exynos4415 SoC support
PMU and suspend support for Exynos5420
PMU support for Exynos3250
pm related maintenance
- imx:
new LS1021A SoC support
vybrid 610 global timer support
- integrator:
convert to using multiplatform configuration
- mediatek:
earlyprintk support for mt8127/mt8135
- meson:
meson8 soc and l2 cache controller support
- mvebu:
Armada 38x CPU hotplug support
drop support for prerelease Armada 375 Z1 stepping
extended suspend support, now works on Armada 370/XP
- omap:
hwmod related maintenance
prcm cleanup
- pxa:
initial pxa27x DT handling
- rockchip:
SMP support for rk3288
add cpu frequency scaling support
- shmobile:
r8a7740 power domain support
various small restart, timer, pci apmu changes
- sunxi:
Allwinner A80 (sun9i) earlyprintk support
- ux500:
power domain support
Overall, a significant chunk of changes, coming mostly from the usual
suspects: omap, shmobile, samsung and mvebu, all of which already
contain a lot of platform specific code in arch/arm"
* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (187 commits)
ARM: mvebu: use the cpufreq-dt platform_data for independent clocks
soc: integrator: Add terminating entry for integrator_cm_match
ARM: mvebu: add SDRAM controller description for Armada XP
ARM: mvebu: adjust mbus controller description on Armada 370/XP
ARM: mvebu: add suspend/resume DT information for Armada XP GP
ARM: mvebu: synchronize secondary CPU clocks on resume
ARM: mvebu: make sure MMU is disabled in armada_370_xp_cpu_resume
ARM: mvebu: Armada XP GP specific suspend/resume code
ARM: mvebu: reserve the first 10 KB of each memory bank for suspend/resume
ARM: mvebu: implement suspend/resume support for Armada XP
clk: mvebu: add suspend/resume for gatable clocks
bus: mvebu-mbus: provide a mechanism to save SDRAM window configuration
bus: mvebu-mbus: suspend/resume support
clocksource: time-armada-370-xp: add suspend/resume support
irqchip: armada-370-xp: Add suspend/resume support
ARM: add lolevel debug support for asm9260
ARM: add mach-asm9260
ARM: EXYNOS: use u8 for val[] in struct exynos_pmu_conf
power: reset: imx-snvs-poweroff: add power off driver for i.mx6
ARM: imx: temporarily remove CONFIG_SOC_FSL from LS1021A
...
Pull Altera Nios II processor support from Ley Foon Tan:
"Here is the Linux port for Nios II processor (from Altera) arch/nios2/
tree for v3.19.
The patchset has been discussed on the kernel mailing lists since
April and has gone through 6 revisions of review. The additional
changes since then have been mostly further cleanups and fixes when
merged with other trees.
The arch code is in arch/nios2 and one asm-generic change (acked by
Arnd)"
Arnd Bergmann says:
"I've reviewed the architecture port in the past and it looks good in
its latest version"
Acked-by: Arnd Bergmann <arnd@arndb.de>
* tag 'nios2-v3.19-rc1' of git://git.rocketboards.org/linux-socfpga-next: (40 commits)
nios2: Make NIOS2_CMDLINE_IGNORE_DTB depend on CMDLINE_BOOL
nios2: Add missing NR_CPUS to Kconfig
nios2: asm-offsets: Remove unused definition TI_TASK
nios2: Remove write-only struct member from nios2_timer
nios2: Remove unused extern declaration of shm_align_mask
nios2: include linux/type.h in io.h
nios2: move include asm-generic/io.h to end of file
nios2: remove include asm-generic/iomap.h from io.h
nios2: remove unnecessary space before define
nios2: fix error handling of irq_of_parse_and_map
nios2: Use IS_ENABLED instead of #ifdefs to check config symbols
nios2: Build infrastructure
Documentation: Add documentation for Nios2 architecture
MAINTAINERS: Add nios2 maintainer
nios2: ptrace support
nios2: Module support
nios2: Nios2 registers
nios2: Miscellaneous header files
nios2: Cpuinfo handling
nios2: Time keeping
...
Pull regulator updates from Mark Brown:
"The main thing this time around is support for suspend mode
configuration from DT which will enable some very useful power savings
on systems where we can't rely on the bootloader configuration. We
still don't really support dynamic configuration of this at runtime,
that may come later if there is any demand.
Summary:
- Support for specifying the target regulation mode and voltage
during system suspend via DT, enabling power savings in that mode.
- Reduce the default verbosity of the logging on boot, improving boot
times especially for systems with very large numbers of regulators.
- Lots of cleanups and fixes for Maxim PMIC drivers.
- New driver for Richtek RT5033"
* tag 'regulator-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: (62 commits)
regulator: core: Fix regualtor_ena_gpio_free not to access pin after freeing
regulator: sky81452: Modify Device Tree structure
regulator: sky81452: Modify Device Tree structure
dt-bindings: Update documentation for "system-power-controller" and fix misspellings
of: Rename "poweroff-source" property to "system-power-controller"
regulator: max77686: Remove support for board files
regulator: max77802: Remove support for board files
regulator: max77802: Fill regulator modes translation callback
regulator: max77802: Document binding for regulator operating modes
regulator: of: Add support for parsing initial and suspend modes
regulator: of: Pass the regulator description in the match table
regulator: of: Add regulator desc param to of_get_regulator_init_data()
regulator: Add mode mapping function to struct regulator_desc
regulator: Document binding for initial and suspend modes
regulator: core: Add PRE_DISABLE notification
regulator: gpio: fix parsing of gpio list
regulator: rpm: add support for RPM-controller SMB208
regulator: da9063: Do not transform local IRQ to virtual
regulator: sky81452: Modify dependent Kconfig symbol
regulator: rt5033: Add RT5033 Regulator device driver
...
Pull hwmon updates from Guenter Roeck:
"Notable changes:
- new driver for NCT7802Y
- support for TMP435, LM95233, LM95235, NCT6792D, and NXP LM75B
- regulator support for PMBus chips, specifically LTX2978
- support for humidity sensors to iio-hwmon bridge driver
* tag 'hwmon-for-linus-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging: (21 commits)
hwmon: (tmp401) Detect TMP435 on all addresses it supports
hwmon: (lm75) Strengthen detect function
hwmon: (gpio-fan) Add a shutdown handler to poweroff the fans
hwmon: (gpio-fan) Allow usage of gpio operations that may sleep
hwmon: (tmp401) Bail out from tmp401_probe() in case of write errors
hwmon: (tmp401) Add support for TI TMP435
hwmon: (lm95234) Add support for LM95233
hwmon: (lm95245) Add support for LM95235
hwmon: (ina2xx) bail-out from ina2xx_probe() in case of configuration errors
hwmon: (nct6775) Add blank lines after declarations
hwmon: (nct6775) Add support for NCT6792D
hwmon: (nct6775) Documentation updates
hwmon: (lm75) Add support for the NXP LM75B
hwmon: Driver for Nuvoton NCT7802Y
hwmon: (ibmpowernv) Convert to module_platform_driver
hwmon: (ibmpowernv) Use platform 'id_table' to probe the device
hwmon: (iio_hwmon) Add support for humidity sensors
hwmon: (ltc2978) Add regulator support
hwmon: (pmbus) Add regulator support
hwmon: (pmbus) add helpers for byte write and read modify write
...
Pull MMC updates from Ulf Hansson:
"MMC core:
- Consolidation and cleanups.
- Some improvements regarding error handling.
- Increase maximum amount of block devices.
- Use correct OCR mask for SDIO when restoring power.
- Fix prepared requests while doing BKOPS.
- Convert to modern PM ops.
- Add mmc_send_tuning() API and convert some hosts to use it.
MMC host:
- toshsd: New Toshiba PCI SD controller driver.
- sdhci: 64-bit ADMA support.
- sdhci: Some regulator fixes.
- sdhci: HS400 support.
- sdhci: Various fixes cleanups.
- atmel-mci: Modernization and cleanups.
- atmel-mci: Runtime PM support.
- omap_hsmmc: Modernization and cleanups.
- omap_hsmmc: Fix UHS card with DDR50 support.
- dw_mmc: Support for ARM64 and Exynos 7 variant.
- dw_mmc: Add support for IMG Pistachio variant.
- dw_mmc: Various fixes and cleanups.
- mvsdio: DMA fixes.
- mxs-mmc: Modernization and cleanups.
- mxcmmc: Various fixes"
* tag 'mmc-v3.19-1' of git://git.linaro.org/people/ulf.hansson/mmc: (126 commits)
mmc: sdhci-msm: Convert to mmc_send_tuning()
mmc: sdhci-esdhc-imx: Convert to mmc_send_tuning()
mmc: core: Let mmc_send_tuning() to take struct mmc_host* as parameter
mmc: queue: Improve error handling during allocation of bounce buffers
mmc: sdhci-acpi: Add two host capabilities for Intel
mmc: sdhci-pci: Add two host capabilities for BYT
mmc: sdhci-acpi: Add SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
mmc: sdhci-pci: Add SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC to BYT
mmc: atmel-mci: use probe deferring if dma controller is not ready yet
mmc: atmel-mci: stop using specific initcall
mmc: atmel-mci: remove __init/__exit attributes
mmc: atmel-mci: remove useless DMA stuff for non-dt devices
mmc: omap_hsmmc: Fix UHS card with DDR50 support
mmc: core: add core-level function for sending tuning commands
mmc: core: hold SD Clock before CMD11 during Signal
mmc: mxs-mmc: Check for clk_prepare_enable() error
mmc: mxs-mmc: Propagate the real error
mmc: mxs-mmc: No need to do NULL check on 'iores'
mmc: dw_mmc: Add support for IMG Pistachio
mmc: mxs-mmc: Simplify PM hooks
...
* pm-cpuidle:
cpuidle: add MAINTAINERS entry for ARM Exynos cpuidle driver
drivers: cpuidle: Remove cpuidle-arm64 duplicate error messages
drivers: cpuidle: Add idle-state-name description to ARM idle states
drivers: cpuidle: Add status property to ARM idle states
cpuidle: Invert CPUIDLE_FLAG_TIME_VALID logic
In (6468276 i2c: designware: make SCL and SDA falling time
configurable) new device tree properties were added for setting the
falling time of SDA and SCL. The device tree bindings doc had a typo
in it: it forgot the "-ns" suffix for both properies in the prose of
the bindings.
I assume this is a typo because:
* The source code includes the "-ns"
* The example in the bindings includes the "-ns".
Fix the typo.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Fixes: 6468276b22 ("i2c: designware: make SCL and SDA falling time configurable")
Acked-by: Romain Baeriswyl <romain.baeriswyl@alitech.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org
This driver supports Elan eKTH I2C touchscreen controllers. Note that these
are using custom protocol, as opposed to other Elan parts that use
HID-over-I2C and are supported by the standard HID-multitouch driver.
Signed-off-by: Scott Liu <scott.liu@emc.com.tw>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Merge rockchip GPU support.
This has a branch in common with the iommu tree, hopefully the
process works.
* 'drm_iommu_v15' of https://github.com/markyzq/kernel-drm-rockchip:
dt-bindings: video: Add documentation for rockchip vop
dt-bindings: video: Add for rockchip display subsytem
drm: rockchip: Add basic drm driver
dt-bindings: iommu: Add documentation for rockchip iommu
iommu/rockchip: rk3288 iommu driver
The specification requires xlnx,data-width, but example and driver use
xlnx,datawidth. Change the specification to match the implementation.
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Fixes: eebeac03db ("dma: Add Xilinx Video DMA DT Binding Documentation")
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
These are a pre-req to get rk3288 SMP to work with some firmwares, so merge
it in here as well as in next/drivers.
* clocksource/physical-timers:
clocksource: arch_timer: Allow the device tree to specify uninitialized timer registers
clocksource: arch_timer: Fix code to use physical timers when requested
* clocksource/physical-timers:
clocksource: arch_timer: Allow the device tree to specify uninitialized timer registers
clocksource: arch_timer: Fix code to use physical timers when requested
Some 32-bit (ARMv7) systems are architected like this:
* The firmware doesn't know and doesn't care about hypervisor mode and
we don't want to add the complexity of hypervisor there.
* The firmware isn't involved in SMP bringup or resume.
* The ARCH timer come up with an uninitialized offset (CNTVOFF)
between the virtual and physical counters. Each core gets a
different random offset.
* The device boots in "Secure SVC" mode.
* Nothing has touched the reset value of CNTHCTL.PL1PCEN or
CNTHCTL.PL1PCTEN (both default to 1 at reset)
On systems like the above, it doesn't make sense to use the virtual
counter. There's nobody managing the offset and each time a core goes
down and comes back up it will get reinitialized to some other random
value.
This adds an optional property which can inform the kernel of this
situation, and firmware is free to remove the property if it is going
to initialize the CNTVOFF registers when each CPU comes out of reset.
Currently, the best course of action in this case is to use the
physical timer, which is why it is important that CNTHCTL hasn't been
changed from its reset value and it's a reasonable assumption given
that the firmware has never entered HYP mode.
Note that it's been said that on ARMv8 systems the firmware and
kernel really can't be architected as described above. That means
using the physical timer like this really only makes sense for ARMv7
systems.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Sonny Rao <sonnyrao@chromium.org>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Pull "ARM: tegra: IOMMU support for v3.19" from Thierry Reding:
This adds the driver pieces required for IOMMU support on Tegra30,
Tegra114 and Tegra124.
* tag 'tegra-for-3.19-iommu' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
memory: Add NVIDIA Tegra memory controller support
of: Add NVIDIA Tegra memory controller binding
ARM: tegra: Move AHB Kconfig to drivers/amba
amba: Add Kconfig file
clk: tegra: Implement memory-controller clock
powerpc/iommu: Rename iommu_[un]map_sg functions
iommu: Improve error handling when setting bus iommu
iommu: Do more input validation in iommu_map_sg()
iommu: Add iommu_map_sg() function
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pull "Reset controller changes for v3.19" from Philipp Zabel:
This adds a new driver for the sti soc family, and creates
a reset_control_status interface, which is added to the existing
drivers.
* tag 'reset-for-3.19-2' of git://git.pengutronix.de/git/pza/linux:
reset: add socfpga_reset_status
reset: sti: Document sti-picophyreset controllers bindings.
reset: stih407: Add softreset, powerdown and picophy controllers
reset: stih407: Add reset controllers DT bindings
reset: add reset_control_status helper function
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pull "mvebu SoC suspend changes for v3.19" from Jason Cooper:
- Armada 370/XP suspend/resume support
- mvebu SoC driver suspend/resume support
- irqchip
- clocksource
- mbus
- clk
* tag 'mvebu-soc-suspend-3.19' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: add SDRAM controller description for Armada XP
ARM: mvebu: adjust mbus controller description on Armada 370/XP
ARM: mvebu: add suspend/resume DT information for Armada XP GP
ARM: mvebu: synchronize secondary CPU clocks on resume
ARM: mvebu: make sure MMU is disabled in armada_370_xp_cpu_resume
ARM: mvebu: Armada XP GP specific suspend/resume code
ARM: mvebu: reserve the first 10 KB of each memory bank for suspend/resume
ARM: mvebu: implement suspend/resume support for Armada XP
clk: mvebu: add suspend/resume for gatable clocks
bus: mvebu-mbus: provide a mechanism to save SDRAM window configuration
bus: mvebu-mbus: suspend/resume support
clocksource: time-armada-370-xp: add suspend/resume support
irqchip: armada-370-xp: Add suspend/resume support
Documentation: dt-bindings: minimal documentation for MVEBU SDRAM controller
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This pull request contains the following changes to the Broadcom GISB bus
arbiter from Kevin Cernekee:
- Extend brcmstb GISB bus driver to work on MIPS (currently ARM-only) and support
65nm and 40nm MIPS-based chips such as: BCM7038, BCM7400 and BCM7435
* tag 'arm-soc/for-3.19/brcmstb-drivers' of https://github.com/brcm/linux:
bus: brcmstb_gisb: Add register offset tables for older chips
bus: brcmstb_gisb: Look up register offsets in a table
bus: brcmstb_gisb: Introduce wrapper functions for MMIO accesses
bus: brcmstb_gisb: Make the driver buildable on MIPS
Conflicts:
drivers/bus/brcmstb_gisb.c
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add a global binding for the chosen node. Include a description of the
stdout-path, and an explicit statement on its extra options in the
context of a UART console.
Opening description stolen from www.devicetree.org, and part of the
remaining text provided by Mark Rutland.
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
[grant.likely: remove reference to uart_parse_options]
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Grant Likely <grant.likely@linaro.org>
This fixes a bunch of conflicts prior to merging i915 tree.
Linux 3.18-rc7
Conflicts:
drivers/gpu/drm/exynos/exynos_drm_drv.c
drivers/gpu/drm/i915/i915_drv.c
drivers/gpu/drm/i915/intel_pm.c
drivers/gpu/drm/tegra/dc.c
