arm64: dts: st: Use 128kB size for aliased GIC400 register access on stm32mp25 SoCs
[ Upstream commit 06c231fe953a26f4bc9d7a37ba1b9b288a59c7c2 ] Adjust the size of 8kB GIC regions to 128kB so that each 4kB is mapped 16 times over a 64kB region. The offset is then adjusted in the irq-gic driver. see commit12e14066f4
("irqchip/GIC: Add workaround for aliased GIC400") Fixes:5d30d03aaf
("arm64: dts: st: introduce stm32mp25 SoCs family") Suggested-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Christian Bruel <christian.bruel@foss.st.com> Acked-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20250415111654.2103767-3-christian.bruel@foss.st.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
ce2fa5bc01
commit
f129d8aea8
@@ -77,9 +77,9 @@
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#interrupt-cells = <3>;
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interrupt-controller;
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reg = <0x0 0x4ac10000 0x0 0x1000>,
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<0x0 0x4ac20000 0x0 0x2000>,
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<0x0 0x4ac40000 0x0 0x2000>,
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<0x0 0x4ac60000 0x0 0x2000>;
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<0x0 0x4ac20000 0x0 0x20000>,
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<0x0 0x4ac40000 0x0 0x20000>,
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<0x0 0x4ac60000 0x0 0x20000>;
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};
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psci {
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