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Input: iqs7222 - explicitly define number of external channels

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commit 63f4970a1219b5256e8ea952096c86dab666d312 upstream.

The number of external channels is assumed to be a multiple of 10,
but this is not the case for IQS7222D. As a result, some CRx pins
are wrongly prevented from being assigned to some channels.

Address this problem by explicitly defining the number of external
channels for cases in which the number of external channels is not
equal to the total number of available channels.

Fixes: dd24e202ac ("Input: iqs7222 - add support for Azoteq IQS7222D")
Signed-off-by: Jeff LaBundy <jeff@labundy.com>
Link: https://lore.kernel.org/r/aGHVf6HkyFZrzTPy@nixie71
Cc: stable@vger.kernel.org
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Jeff LaBundy
2025-06-29 18:33:30 -07:00
committed by Greg Kroah-Hartman
parent 2cd5e7c169
commit c9a841fd2e
1 changed files with 5 additions and 2 deletions
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7
drivers/input/misc/iqs7222.c
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@@ -301,6 +301,7 @@ struct iqs7222_dev_desc {
int allow_offset; int allow_offset;
int event_offset; int event_offset;
int comms_offset; int comms_offset;
int ext_chan;
bool legacy_gesture; bool legacy_gesture;
struct iqs7222_reg_grp_desc reg_grps[IQS7222_NUM_REG_GRPS]; struct iqs7222_reg_grp_desc reg_grps[IQS7222_NUM_REG_GRPS];
}; };
@@ -315,6 +316,7 @@ static const struct iqs7222_dev_desc iqs7222_devs[] = {
.allow_offset = 9, .allow_offset = 9,
.event_offset = 10, .event_offset = 10,
.comms_offset = 12, .comms_offset = 12,
.ext_chan = 10,
.reg_grps = { .reg_grps = {
[IQS7222_REG_GRP_STAT] = { [IQS7222_REG_GRP_STAT] = {
.base = IQS7222_SYS_STATUS, .base = IQS7222_SYS_STATUS,
@@ -373,6 +375,7 @@ static const struct iqs7222_dev_desc iqs7222_devs[] = {
.allow_offset = 9, .allow_offset = 9,
.event_offset = 10, .event_offset = 10,
.comms_offset = 12, .comms_offset = 12,
.ext_chan = 10,
.legacy_gesture = true, .legacy_gesture = true,
.reg_grps = { .reg_grps = {
[IQS7222_REG_GRP_STAT] = { [IQS7222_REG_GRP_STAT] = {
@@ -2244,7 +2247,7 @@ static int iqs7222_parse_chan(struct iqs7222_private *iqs7222,
const struct iqs7222_dev_desc *dev_desc = iqs7222->dev_desc; const struct iqs7222_dev_desc *dev_desc = iqs7222->dev_desc;
struct i2c_client *client = iqs7222->client; struct i2c_client *client = iqs7222->client;
int num_chan = dev_desc->reg_grps[IQS7222_REG_GRP_CHAN].num_row; int num_chan = dev_desc->reg_grps[IQS7222_REG_GRP_CHAN].num_row;
int ext_chan = rounddown(num_chan, 10); int ext_chan = dev_desc->ext_chan ? : num_chan;
int error, i; int error, i;
u16 *chan_setup = iqs7222->chan_setup[chan_index]; u16 *chan_setup = iqs7222->chan_setup[chan_index];
u16 *sys_setup = iqs7222->sys_setup; u16 *sys_setup = iqs7222->sys_setup;
@@ -2448,7 +2451,7 @@ static int iqs7222_parse_sldr(struct iqs7222_private *iqs7222,
const struct iqs7222_dev_desc *dev_desc = iqs7222->dev_desc; const struct iqs7222_dev_desc *dev_desc = iqs7222->dev_desc;
struct i2c_client *client = iqs7222->client; struct i2c_client *client = iqs7222->client;
int num_chan = dev_desc->reg_grps[IQS7222_REG_GRP_CHAN].num_row; int num_chan = dev_desc->reg_grps[IQS7222_REG_GRP_CHAN].num_row;
int ext_chan = rounddown(num_chan, 10); int ext_chan = dev_desc->ext_chan ? : num_chan;
int count, error, reg_offset, i; int count, error, reg_offset, i;
u16 *event_mask = &iqs7222->sys_setup[dev_desc->event_offset]; u16 *event_mask = &iqs7222->sys_setup[dev_desc->event_offset];
u16 *sldr_setup = iqs7222->sldr_setup[sldr_index]; u16 *sldr_setup = iqs7222->sldr_setup[sldr_index];