ARM: OMAP2+: PRM: add support for initializing PRCM clock modules from DT
This patch provides top level functionality for the DT clock initialization. Clock tree is initialized hierarchically starting from IP modules (CM/PRM/PRCM) going down towards individual clock nodes, and finally initializing clockdomains once all the clocks are ready. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
This commit is contained in:
committed by
Mike Turquette
parent
0385c58207
commit
943a63a41f
@@ -18,6 +18,7 @@
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# ifndef __ASSEMBLER__
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# ifndef __ASSEMBLER__
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extern void __iomem *prm_base;
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extern void __iomem *prm_base;
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extern void omap2_set_globals_prm(void __iomem *prm);
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extern void omap2_set_globals_prm(void __iomem *prm);
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int of_prcm_init(void);
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# endif
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# endif
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@@ -23,6 +23,10 @@
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#include <linux/irq.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/interrupt.h>
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#include <linux/slab.h>
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#include <linux/slab.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/clk-provider.h>
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#include <linux/clk/ti.h>
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#include "soc.h"
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#include "soc.h"
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#include "prm2xxx_3xxx.h"
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#include "prm2xxx_3xxx.h"
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@@ -30,6 +34,7 @@
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#include "prm3xxx.h"
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#include "prm3xxx.h"
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#include "prm44xx.h"
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#include "prm44xx.h"
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#include "common.h"
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#include "common.h"
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#include "clock.h"
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/*
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/*
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* OMAP_PRCM_MAX_NR_PENDING_REG: maximum number of PRM_IRQ*_MPU regs
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* OMAP_PRCM_MAX_NR_PENDING_REG: maximum number of PRM_IRQ*_MPU regs
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@@ -464,3 +469,64 @@ int prm_unregister(struct prm_ll_data *pld)
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return 0;
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return 0;
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}
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}
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static struct of_device_id omap_prcm_dt_match_table[] = {
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{ .compatible = "ti,am3-prcm" },
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{ .compatible = "ti,am3-scrm" },
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{ .compatible = "ti,am4-prcm" },
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{ .compatible = "ti,am4-scrm" },
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{ .compatible = "ti,omap3-prm" },
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{ .compatible = "ti,omap3-cm" },
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{ .compatible = "ti,omap3-scrm" },
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{ .compatible = "ti,omap4-cm1" },
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{ .compatible = "ti,omap4-prm" },
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{ .compatible = "ti,omap4-cm2" },
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{ .compatible = "ti,omap4-scrm" },
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{ .compatible = "ti,omap5-prm" },
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{ .compatible = "ti,omap5-cm-core-aon" },
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{ .compatible = "ti,omap5-scrm" },
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{ .compatible = "ti,omap5-cm-core" },
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{ .compatible = "ti,dra7-prm" },
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{ .compatible = "ti,dra7-cm-core-aon" },
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{ .compatible = "ti,dra7-cm-core" },
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{ }
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};
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static struct clk_hw_omap memmap_dummy_ck = {
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.flags = MEMMAP_ADDRESSING,
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};
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static u32 prm_clk_readl(void __iomem *reg)
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{
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return omap2_clk_readl(&memmap_dummy_ck, reg);
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}
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static void prm_clk_writel(u32 val, void __iomem *reg)
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{
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omap2_clk_writel(val, &memmap_dummy_ck, reg);
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}
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static struct ti_clk_ll_ops omap_clk_ll_ops = {
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.clk_readl = prm_clk_readl,
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.clk_writel = prm_clk_writel,
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};
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int __init of_prcm_init(void)
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{
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struct device_node *np;
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void __iomem *mem;
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int memmap_index = 0;
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ti_clk_ll_ops = &omap_clk_ll_ops;
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for_each_matching_node(np, omap_prcm_dt_match_table) {
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mem = of_iomap(np, 0);
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clk_memmaps[memmap_index] = mem;
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ti_dt_clk_init_provider(np, memmap_index);
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memmap_index++;
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}
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ti_dt_clockdomains_setup();
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return 0;
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}
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