Merge 6.6.94 into android15-6.6-lts

GKI (arm64) relevant 76 out of 351 changes, affecting 97 files +661/-350
  4afa9d57ed tracing: Fix compilation warning on arm32 [1 file, +1/-1]
  b836d94be8 rtc: Make rtc_time64_to_tm() support dates before 1970 [1 file, +19/-5]
  32a5f643ce rtc: Fix offset calculation for .start_secs < 0 [1 file, +1/-1]
  73c50fa3ff usb: quirks: Add NO_LPM quirk for SanDisk Extreme 55AE [1 file, +3/-0]
  e2e38c5211 Bluetooth: hci_qca: move the SoC type check to the right place [1 file, +7/-7]
  6ce08b3ba5 perf/core: Fix broken throttling when max_samples_per_tick=1 [1 file, +8/-8]
  ec91ab135c rcu/cpu_stall_cputime: fix the hardirq count for x86 architecture [3 files, +10/-6]
  04a39a3c7d crypto: xts - Only add ecb if it is not already there [1 file, +2/-2]
  f6941e72d3 kunit: Fix wrong parameter to kunit_deactivate_static_stub() [1 file, +1/-1]
  2b54593806 PM: wakeup: Delete space in the end of string shown by pm_show_wakelocks() [1 file, +3/-0]
  8bf6491dab arm64/fpsimd: Avoid RES0 bits in the SME trap handler [2 files, +9/-7]
  43be952e88 arm64/fpsimd: Discard stale CPU state when handling SME traps [1 file, +2/-0]
  2f6e645ce6 arm64/fpsimd: Fix merging of FPSIMD state during signal return [1 file, +1/-1]
  0052f10c25 firmware: psci: Fix refcount leak in psci_dt_init [1 file, +3/-1]
  e500dff1e4 arm64/fpsimd: Do not discard modified SVE state [3 files, +47/-17]
  34837ae8cd bpf, sockmap: fix duplicated data transmission [1 file, +9/-5]
  db1d15a26f bpf, sockmap: Fix panic when calling skb_linearize [1 file, +16/-15]
  8fa998b842 iommu: Protect against overflow in iommu_pgsize() [1 file, +3/-1]
  43cec28049 f2fs: clean up w/ fscrypt_is_bounce_page() [1 file, +1/-1]
  1c005c53cf f2fs: fix to detect gcing page in f2fs_is_cp_guaranteed() [1 file, +1/-1]
  50bbbd2559 bpf: Allow XDP dev-bound programs to perform XDP_REDIRECT into maps [1 file, +16/-11]
  ac7ab38c27 tracing: Move histogram trigger variables from stack to per CPU structure [1 file, +105/-15]
  3f7724fcc1 efi/libstub: Describe missing 'out' parameter in efi_load_initrd [1 file, +1/-0]
  94ade4147a tracing: Fix error handling in event_trigger_parse() [1 file, +2/-2]
  6d8f39875a bpf: Fix WARN() in get_bpf_raw_tp_regs [1 file, +1/-1]
  713b9bfa93 scsi: ufs: mcq: Delete ufshcd_release_scsi_cmd() in ufshcd_mcq_abort() [1 file, +0/-6]
  6c81f1c781 kernfs: Relax constraint in draining guard [2 files, +5/-3]
  9c73afd7f1 Bluetooth: MGMT: iterate over mesh commands in mgmt_mesh_foreach() [1 file, +1/-1]
  4c6fa65ab2 bpf, sockmap: Avoid using sk_socket after free when sending [1 file, +8/-0]
  60790d287c net: usb: aqc111: fix error handling of usbnet read calls [1 file, +8/-2]
  6f639c25bf bpf: Avoid __bpf_prog_ret0_warn when jit fails [1 file, +1/-1]
  363fdf2777 net: phy: clear phydev->devlink when the link is deleted [1 file, +3/-1]
  4744a5d71d net: phy: fix up const issues in to_mdio_device() and to_phy_device() [2 files, +2/-8]
  67b800b6d7 f2fs: use d_inode(dentry) cleanup dentry->d_inode [2 files, +6/-6]
  c4f2f90ebb f2fs: fix to correct check conditions in f2fs_cross_rename [1 file, +1/-1]
  679d40ca03 dm: don't change md if dm_table_set_restrictions() fails [1 file, +12/-10]
  06f41679d3 dm: free table mempools if not used in __bind [1 file, +4/-4]
  92d879eff4 PCI: Print the actual delay time in pci_bridge_wait_for_secondary_bus() [1 file, +1/-1]
  acab7ca5ff net: tipc: fix refcount warning in tipc_aead_encrypt [1 file, +5/-1]
  55dd722521 Bluetooth: L2CAP: Fix not responding with L2CAP_CR_LE_ENCRYPTION [1 file, +2/-1]
  85eef1748c net: fix udp gso skb_segment after pull from frag_list [1 file, +5/-0]
  9c49728b61 PM: sleep: Fix power.is_suspended cleanup for direct-complete devices [1 file, +2/-1]
  1c7a023b0c netfilter: nf_nat: also check reverse tuple to obtain clashing entry [1 file, +9/-3]
  8c9e9cd398 wireguard: device: enable threaded NAPI [1 file, +1/-0]
  3b699b9472 path_overmount(): avoid false negatives [1 file, +13/-6]
  3d1ea8e048 fix propagation graph breakage by MOVE_MOUNT_SET_GROUP move_mount(2) [1 file, +1/-1]
  4f091ad086 do_change_type(): refuse to operate on unmounted/not ours mounts [1 file, +4/-0]
  73b8f31337 pmdomain: core: Fix error checking in genpd_dev_pm_attach_by_id() [1 file, +1/-1]
  c789d2c138 kasan: use unchecked __memset internally [2 files, +3/-3]
  21f071261f scsi: core: ufs: Fix a hang in the error handler [1 file, +6/-1]
  6edb171845 Bluetooth: hci_core: fix list_for_each_entry_rcu usage [1 file, +3/-8]
  9f66b6531c Bluetooth: MGMT: Fix UAF on mgmt_remove_adv_monitor_complete [3 files, +12/-30]
  5e64376da2 Bluetooth: MGMT: Remove unused mgmt_pending_find_data [2 files, +0/-21]
  bdd56875c6 Bluetooth: MGMT: Protect mgmt_pending list with its own lock [5 files, +80/-59]
  b4e9bab601 net_sched: sch_sfq: fix a potential crash on gso_skb handling [1 file, +4/-1]
  ff55c85a92 net: Fix TOCTOU issue in sk_is_readable() [1 file, +5/-2]
  7bafe26d73 macsec: MACsec SCI assignment for ES = 0 [1 file, +34/-6]
  bab6bca083 net/mdiobus: Fix potential out-of-bounds read/write access [1 file, +6/-0]
  abb0605ca0 net/mdiobus: Fix potential out-of-bounds clause 45 read/write access [1 file, +6/-0]
  4bf2991057 Bluetooth: Fix NULL pointer deference on eir_get_service_data [1 file, +6/-4]
  c621211b30 Bluetooth: hci_sync: Fix broadcast/PA when using an existing instance [1 file, +15/-5]
  3c40cfcbf1 Bluetooth: MGMT: Fix sparse errors [1 file, +2/-2]
  46c15c9d0f net_sched: prio: fix a race in prio_tune() [1 file, +1/-1]
  057f7a61b0 net_sched: tbf: fix a race in tbf_change() [1 file, +1/-1]
  84ead78a3c fs/filesystems: Fix potential unsigned integer underflow in fs_name() [1 file, +9/-5]
  51c695986f perf: Ensure bpf_perf_link path is properly serialized [1 file, +30/-4]
  9e263d9459 bio: Fix bio_first_folio() for SPARSEMEM without VMEMMAP [1 file, +1/-1]
  c9a2e81583 block: Fix bvec_set_folio() for very large folios [1 file, +5/-2]
  dd4b8e05f2 ALSA: usb-audio: Add implicit feedback quirk for RODE AI-1 [1 file, +1/-0]
  90e11232a6 io_uring: add io_file_can_poll() helper [6 files, +20/-6]
  62d5d980b5 io_uring/rw: allow pollable non-blocking attempts for !FMODE_NOWAIT [1 file, +16/-6]
  029d39ae7e io_uring/rw: fix wrong NOWAIT check in io_rw_init_file() [1 file, +1/-1]
  99bc5248a4 Revert "io_uring: ensure deferred completions are posted for multishot" [1 file, +0/-8]
  2c72fe18cc posix-cpu-timers: fix race between handle_posix_cpu_timers() and posix_cpu_timer_del() [1 file, +9/-0]
  3c7e52cfa8 usb: Flush altsetting 0 endpoints before reinitializating them after reset. [1 file, +14/-2]
  65e20c5d99 net: usb: aqc111: debug info before sanitation [1 file, +4/-4]

Changes in 6.6.94
	tracing: Fix compilation warning on arm32
	pinctrl: armada-37xx: use correct OUTPUT_VAL register for GPIOs > 31
	pinctrl: armada-37xx: set GPIO output value before setting direction
	acpi-cpufreq: Fix nominal_freq units to KHz in get_max_boost_ratio()
	rtc: Make rtc_time64_to_tm() support dates before 1970
	rtc: Fix offset calculation for .start_secs < 0
	usb: quirks: Add NO_LPM quirk for SanDisk Extreme 55AE
	usb: storage: Ignore UAS driver for SanDisk 3.2 Gen2 storage device
	USB: serial: pl2303: add new chip PL2303GC-Q20 and PL2303GT-2AB
	usb: typec: ucsi: fix Clang -Wsign-conversion warning
	Bluetooth: hci_qca: move the SoC type check to the right place
	serial: jsm: fix NPE during jsm_uart_port_init
	usb: usbtmc: Fix timeout value in get_stb
	thunderbolt: Do not double dequeue a configuration request
	dt-bindings: usb: cypress,hx3: Add support for all variants
	dt-bindings: phy: imx8mq-usb: fix fsl,phy-tx-vboost-level-microvolt property
	Revert "drm/amd/display: more liberal vmin/vmax update for freesync"
	tools/x86/kcpuid: Fix error handling
	x86/idle: Remove MFENCEs for X86_BUG_CLFLUSH_MONITOR in mwait_idle_with_hints() and prefer_mwait_c1_over_halt()
	crypto: sun8i-ce-hash - fix error handling in sun8i_ce_hash_run()
	gfs2: gfs2_create_inode error handling fix
	perf/core: Fix broken throttling when max_samples_per_tick=1
	crypto: sun8i-ce-cipher - fix error handling in sun8i_ce_cipher_prepare()
	crypto: sun8i-ss - do not use sg_dma_len before calling DMA functions
	powerpc: do not build ppc_save_regs.o always
	powerpc/crash: Fix non-smp kexec preparation
	x86/microcode/AMD: Do not return error when microcode update is not necessary
	x86/cpu: Sanitize CPUID(0x80000000) output
	crypto: marvell/cesa - Handle zero-length skcipher requests
	crypto: marvell/cesa - Avoid empty transfer descriptor
	btrfs: scrub: update device stats when an error is detected
	btrfs: scrub: fix a wrong error type when metadata bytenr mismatches
	rcu/cpu_stall_cputime: fix the hardirq count for x86 architecture
	crypto: lrw - Only add ecb if it is not already there
	crypto: xts - Only add ecb if it is not already there
	crypto: sun8i-ce - move fallback ahash_request to the end of the struct
	kunit: Fix wrong parameter to kunit_deactivate_static_stub()
	ACPICA: exserial: don't forget to handle FFixedHW opregions for reading
	ASoC: tas2764: Enable main IRQs
	EDAC/skx_common: Fix general protection fault
	EDAC/{skx_common,i10nm}: Fix the loss of saved RRL for HBM pseudo channel 0
	spi: tegra210-quad: Fix X1_X2_X4 encoding and support x4 transfers
	spi: tegra210-quad: remove redundant error handling code
	spi: tegra210-quad: modify chip select (CS) deactivation
	power: reset: at91-reset: Optimize at91_reset()
	ASoC: SOF: ipc4-pcm: Adjust pipeline_list->pipelines allocation type
	PM: wakeup: Delete space in the end of string shown by pm_show_wakelocks()
	x86/mtrr: Check if fixed-range MTRRs exist in mtrr_save_fixed_ranges()
	PM: sleep: Print PM debug messages during hibernation
	ACPI: OSI: Stop advertising support for "3.0 _SCP Extensions"
	spi: sh-msiof: Fix maximum DMA transfer size
	ASoC: apple: mca: Constrain channels according to TDM mask
	drm/vmwgfx: Add seqno waiter for sync_files
	drm/vc4: tests: Use return instead of assert
	drm/amd/pp: Fix potential NULL pointer dereference in atomctrl_initialize_mc_reg_table
	media: rkvdec: Fix frame size enumeration
	arm64/fpsimd: Avoid RES0 bits in the SME trap handler
	arm64/fpsimd: Discard stale CPU state when handling SME traps
	arm64/fpsimd: Fix merging of FPSIMD state during signal return
	drm/bridge: lt9611uxc: Fix an error handling path in lt9611uxc_probe()
	fs/ntfs3: handle hdr_first_de() return value
	watchdog: exar: Shorten identity name to fit correctly
	m68k: mac: Fix macintosh_config for Mac II
	firmware: psci: Fix refcount leak in psci_dt_init
	arm64: Support ARM64_VA_BITS=52 when setting ARCH_MMAP_RND_BITS_MAX
	selftests/seccomp: fix syscall_restart test for arm compat
	drm: rcar-du: Fix memory leak in rcar_du_vsps_init()
	drm/vkms: Adjust vkms_state->active_planes allocation type
	drm/tegra: rgb: Fix the unbound reference count
	firmware: SDEI: Allow sdei initialization without ACPI_APEI_GHES
	arm64/fpsimd: Do not discard modified SVE state
	scsi: qedf: Use designated initializer for struct qed_fcoe_cb_ops
	perf/amlogic: Replace smp_processor_id() with raw_smp_processor_id() in meson_ddr_pmu_create()
	drm/mediatek: mtk_drm_drv: Fix kobject put for mtk_mutex device ptr
	drm/mediatek: Fix kobject put for component sub-drivers
	drm/mediatek: mtk_drm_drv: Unbind secondary mmsys components on err
	xen/x86: fix initial memory balloon target
	wifi: ath11k: fix node corruption in ar->arvifs list
	IB/cm: use rwlock for MAD agent lock
	selftests/bpf: Fix bpf_nf selftest failure
	bpf: fix ktls panic with sockmap
	bpf, sockmap: fix duplicated data transmission
	bpf, sockmap: Fix panic when calling skb_linearize
	wifi: ath12k: Fix WMI tag for EHT rate in peer assoc
	f2fs: fix to do sanity check on sbi->total_valid_block_count
	net: ncsi: Fix GCPS 64-bit member variables
	libbpf: Fix buffer overflow in bpf_object__init_prog
	xfrm: Use xdo.dev instead of xdo.real_dev
	wifi: rtw88: sdio: map mgmt frames to queue TX_DESC_QSEL_MGMT
	wifi: rtw88: sdio: call rtw_sdio_indicate_tx_status unconditionally
	wifi: rtw88: do not ignore hardware read error during DPK
	wifi: ath12k: Add MSDU length validation for TKIP MIC error
	wifi: ath12k: fix node corruption in ar->arvifs list
	RDMA/hns: Include hnae3.h in hns_roce_hw_v2.h
	scsi: hisi_sas: Call I_T_nexus after soft reset for SATA disk
	libbpf: Remove sample_period init in perf_buffer
	Use thread-safe function pointer in libbpf_print
	iommu: Protect against overflow in iommu_pgsize()
	bonding: assign random address if device address is same as bond
	f2fs: clean up w/ fscrypt_is_bounce_page()
	f2fs: fix to detect gcing page in f2fs_is_cp_guaranteed()
	libbpf: Use proper errno value in linker
	bpf: Allow XDP dev-bound programs to perform XDP_REDIRECT into maps
	netfilter: bridge: Move specific fragmented packet to slow_path instead of dropping it
	netfilter: nft_quota: match correctly when the quota just depleted
	RDMA/mlx5: Fix error flow upon firmware failure for RQ destruction
	bpf: Fix uninitialized values in BPF_{CORE,PROBE}_READ
	tracing: Move histogram trigger variables from stack to per CPU structure
	clk: qcom: camcc-sm6350: Add *_wait_val values for GDSCs
	clk: qcom: dispcc-sm6350: Add *_wait_val values for GDSCs
	clk: qcom: gcc-sm6350: Add *_wait_val values for GDSCs
	clk: qcom: gpucc-sm6350: Add *_wait_val values for GDSCs
	clk: bcm: rpi: Add NULL check in raspberrypi_clk_register()
	efi/libstub: Describe missing 'out' parameter in efi_load_initrd
	tracing: Rename event_trigger_alloc() to trigger_data_alloc()
	tracing: Fix error handling in event_trigger_parse()
	ktls, sockmap: Fix missing uncharge operation
	libbpf: Use proper errno value in nlattr
	pinctrl: at91: Fix possible out-of-boundary access
	bpf: Fix WARN() in get_bpf_raw_tp_regs
	clk: qcom: gcc-msm8939: Fix mclk0 & mclk1 for 24 MHz
	s390/bpf: Store backchain even for leaf progs
	wifi: rtw88: fix the 'para' buffer size to avoid reading out of bounds
	iommu: remove duplicate selection of DMAR_TABLE
	wifi: ath12k: fix memory leak in ath12k_service_ready_ext_event
	hisi_acc_vfio_pci: fix XQE dma address error
	hisi_acc_vfio_pci: add eq and aeq interruption restore
	hisi_acc_vfio_pci: bugfix live migration function without VF device driver
	wifi: ath9k_htc: Abort software beacon handling if disabled
	scsi: ufs: mcq: Delete ufshcd_release_scsi_cmd() in ufshcd_mcq_abort()
	kernfs: Relax constraint in draining guard
	wifi: mt76: mt7915: Fix null-ptr-deref in mt7915_mmio_wed_init()
	wifi: mt76: mt7996: set EHT max ampdu length capability
	wifi: mt76: mt7996: fix RX buffer size of MCU event
	netfilter: nf_tables: nft_fib_ipv6: fix VRF ipv4/ipv6 result discrepancy
	vfio/type1: Fix error unwind in migration dirty bitmap allocation
	Bluetooth: MGMT: iterate over mesh commands in mgmt_mesh_foreach()
	bpf, sockmap: Avoid using sk_socket after free when sending
	netfilter: nft_tunnel: fix geneve_opt dump
	RISC-V: KVM: lock the correct mp_state during reset
	net: usb: aqc111: fix error handling of usbnet read calls
	RDMA/cma: Fix hang when cma_netevent_callback fails to queue_work
	net: lan966x: Fix 1-step timestamping over ipv4 or ipv6
	bpf: Avoid __bpf_prog_ret0_warn when jit fails
	net: phy: clear phydev->devlink when the link is deleted
	net: phy: fix up const issues in to_mdio_device() and to_phy_device()
	net: lan743x: rename lan743x_reset_phy to lan743x_hw_reset_phy
	net: phy: mscc: Fix memory leak when using one step timestamping
	octeontx2-pf: QOS: Refactor TC_HTB_LEAF_DEL_LAST callback
	calipso: Don't call calipso functions for AF_INET sk.
	net: openvswitch: Fix the dead loop of MPLS parse
	net: phy: mscc: Stop clearing the the UDPv4 checksum for L2 frames
	f2fs: use d_inode(dentry) cleanup dentry->d_inode
	f2fs: fix to correct check conditions in f2fs_cross_rename
	arm64: dts: qcom: sdm845-starqltechn: remove wifi
	arm64: dts: qcom: sdm845-starqltechn: fix usb regulator mistake
	arm64: dts: qcom: sdm845-starqltechn: refactor node order
	arm64: dts: qcom: sdm845-starqltechn: remove excess reserved gpios
	arm64: dts: qcom: sm8350: Reenable crypto & cryptobam
	arm64: dts: qcom: sm8250: Fix CPU7 opp table
	arm64: dts: qcom: sc8280xp-x13s: Drop duplicate DMIC supplies
	ARM: dts: at91: usb_a9263: fix GPIO for Dataflash chip select
	ARM: dts: at91: at91sam9263: fix NAND chip selects
	arm64: dts: mediatek: mt8195: Reparent vdec1/2 and venc1 power domains
	arm64: dts: qcom: sdm660-xiaomi-lavender: Add missing SD card detect GPIO
	arm64: dts: imx8mm-beacon: Fix RTC capacitive load
	arm64: dts: imx8mn-beacon: Fix RTC capacitive load
	arm64: dts: imx8mp-beacon: Fix RTC capacitive load
	arm64: dts: imx8mm-beacon: Set SAI5 MCLK direction to output for HDMI audio
	arm64: dts: imx8mn-beacon: Set SAI5 MCLK direction to output for HDMI audio
	arm64: dts: mediatek: mt6357: Drop regulator-fixed compatibles
	arm64: dts: mt6359: Add missing 'compatible' property to regulators node
	arm64: dts: qcom: sdm660-lavender: Add missing USB phy supply
	arm64: dts: qcom: sda660-ifc6560: Fix dt-validate warning
	arm64: dts: rockchip: Update eMMC for NanoPi R5 series
	arm64: tegra: Drop remaining serial clock-names and reset-names
	arm64: dts: ti: k3-j721e-common-proc-board: Enable OSPI1 on J721E
	Squashfs: check return result of sb_min_blocksize
	ocfs2: fix possible memory leak in ocfs2_finish_quota_recovery
	nilfs2: add pointer check for nilfs_direct_propagate()
	nilfs2: do not propagate ENOENT error from nilfs_btree_propagate()
	bus: fsl-mc: fix double-free on mc_dev
	dt-bindings: vendor-prefixes: Add Liontron name
	ARM: dts: qcom: apq8064: add missing clocks to the timer node
	ARM: dts: qcom: apq8064 merge hw splinlock into corresponding syscon device
	arm64: defconfig: mediatek: enable PHY drivers
	arm64: dts: rockchip: disable unrouted USB controllers and PHY on RK3399 Puma with Haikou
	arm64: dts: renesas: white-hawk-ard-audio: Fix TPU0 groups
	arm64: dts: mt6359: Rename RTC node to match binding expectations
	ARM: aspeed: Don't select SRAM
	soc: aspeed: lpc: Fix impossible judgment condition
	soc: aspeed: Add NULL check in aspeed_lpc_enable_snoop()
	fbdev: core: fbcvt: avoid division by 0 in fb_cvt_hperiod()
	randstruct: gcc-plugin: Remove bogus void member
	randstruct: gcc-plugin: Fix attribute addition
	perf build: Warn when libdebuginfod devel files are not available
	perf ui browser hists: Set actions->thread before calling do_zoom_thread()
	dm: don't change md if dm_table_set_restrictions() fails
	dm: free table mempools if not used in __bind
	backlight: pm8941: Add NULL check in wled_configure()
	mtd: nand: ecc-mxic: Fix use of uninitialized variable ret
	hwmon: (asus-ec-sensors) check sensor index in read_string()
	dm-flakey: error all IOs when num_features is absent
	dm-flakey: make corrupting read bios work
	perf trace: Fix leaks of 'struct thread' in set_filter_loop_pids()
	perf intel-pt: Fix PEBS-via-PT data_src
	perf scripts python: exported-sql-viewer.py: Fix pattern matching with Python 3
	remoteproc: qcom_wcnss_iris: Add missing put_device() on error in probe
	remoteproc: k3-r5: Drop check performed in k3_r5_rproc_{mbox_callback/kick}
	rpmsg: qcom_smd: Fix uninitialized return variable in __qcom_smd_send()
	mfd: exynos-lpass: Avoid calling exynos_lpass_disable() twice in exynos_lpass_remove()
	mfd: stmpe-spi: Correct the name used in MODULE_DEVICE_TABLE
	perf tests switch-tracking: Fix timestamp comparison
	perf record: Fix incorrect --user-regs comments
	perf trace: Always print return value for syscalls returning a pid
	nfs: clear SB_RDONLY before getting superblock
	nfs: ignore SB_RDONLY when remounting nfs
	cifs: Fix validation of SMB1 query reparse point response
	rtc: sh: assign correct interrupts with DT
	PCI: Print the actual delay time in pci_bridge_wait_for_secondary_bus()
	PCI: cadence: Fix runtime atomic count underflow
	PCI: apple: Use gpiod_set_value_cansleep in probe flow
	phy: qcom-qmp-usb: Fix an NULL vs IS_ERR() bug
	dmaengine: ti: Add NULL check in udma_probe()
	PCI/DPC: Initialize aer_err_info before using it
	rtc: loongson: Add missing alarm notifications for ACPI RTC events
	usb: renesas_usbhs: Reorder clock handling and power management in probe
	serial: Fix potential null-ptr-deref in mlb_usio_probe()
	thunderbolt: Fix a logic error in wake on connect
	iio: filter: admv8818: fix band 4, state 15
	iio: filter: admv8818: fix integer overflow
	iio: filter: admv8818: fix range calculation
	iio: filter: admv8818: Support frequencies >= 2^32
	iio: adc: ad7124: Fix 3dB filter frequency reading
	MIPS: Loongson64: Add missing '#interrupt-cells' for loongson64c_ls7a
	counter: interrupt-cnt: Protect enable/disable OPs with mutex
	fpga: fix potential null pointer deref in fpga_mgr_test_img_load_sgt()
	coresight: prevent deactivate active config while enabling the config
	vt: remove VT_RESIZE and VT_RESIZEX from vt_compat_ioctl()
	net: stmmac: platform: guarantee uniqueness of bus_id
	gve: Fix RX_BUFFERS_POSTED stat to report per-queue fill_cnt
	net: tipc: fix refcount warning in tipc_aead_encrypt
	driver: net: ethernet: mtk_star_emac: fix suspend/resume issue
	net/mlx4_en: Prevent potential integer overflow calculating Hz
	net: lan966x: Make sure to insert the vlan tags also in host mode
	spi: bcm63xx-spi: fix shared reset
	spi: bcm63xx-hsspi: fix shared reset
	Bluetooth: L2CAP: Fix not responding with L2CAP_CR_LE_ENCRYPTION
	ice: fix Tx scheduler error handling in XDP callback
	ice: create new Tx scheduler nodes for new queues only
	ice: fix rebuilding the Tx scheduler tree for large queue counts
	net: dsa: tag_brcm: legacy: fix pskb_may_pull length
	net: stmmac: make sure that ptp_rate is not 0 before configuring timestamping
	net: fix udp gso skb_segment after pull from frag_list
	net: wwan: t7xx: Fix napi rx poll issue
	vmxnet3: correctly report gso type for UDP tunnels
	PM: sleep: Fix power.is_suspended cleanup for direct-complete devices
	gve: add missing NULL check for gve_alloc_pending_packet() in TX DQO
	netfilter: nf_set_pipapo_avx2: fix initial map fill
	netfilter: nf_nat: also check reverse tuple to obtain clashing entry
	net: dsa: b53: do not enable RGMII delay on bcm63xx
	net: dsa: b53: allow RGMII for bcm63xx RGMII ports
	wireguard: device: enable threaded NAPI
	seg6: Fix validation of nexthop addresses
	scsi: ufs: qcom: Prevent calling phy_exit() before phy_init()
	ASoC: codecs: hda: Fix RPM usage count underflow
	ASoC: Intel: avs: Fix deadlock when the failing IPC is SET_D0IX
	ASoC: Intel: avs: Verify content returned by parse_int_array()
	ASoC: ti: omap-hdmi: Re-add dai_link->platform to fix card init
	path_overmount(): avoid false negatives
	fix propagation graph breakage by MOVE_MOUNT_SET_GROUP move_mount(2)
	do_change_type(): refuse to operate on unmounted/not ours mounts
	pmdomain: core: Fix error checking in genpd_dev_pm_attach_by_id()
	Input: synaptics-rmi - fix crash with unsupported versions of F34
	kasan: use unchecked __memset internally
	arm64: dts: ti: k3-am65-main: Fix sdhci node properties
	arm64: dts: ti: k3-am65-main: Add missing taps to sdhci0
	arm64: dts: ti: k3-j721e-sk: Model CSI2RX connector mux
	arm64: dts: ti: k3-j721e-sk: Add support for multiple CAN instances
	arm64: dts: ti: k3-j721e-sk: Add DT nodes for power regulators
	serial: sh-sci: Check if TX data was written to device in .tx_empty()
	serial: sh-sci: Move runtime PM enable to sci_probe_single()
	serial: sh-sci: Clean sci_ports[0] after at earlycon exit
	scsi: core: ufs: Fix a hang in the error handler
	Bluetooth: hci_core: fix list_for_each_entry_rcu usage
	Bluetooth: MGMT: Fix UAF on mgmt_remove_adv_monitor_complete
	Bluetooth: MGMT: Remove unused mgmt_pending_find_data
	Bluetooth: MGMT: Protect mgmt_pending list with its own lock
	ptp: remove ptp->n_vclocks check logic in ptp_vclock_in_use()
	ath10k: snoc: fix unbalanced IRQ enable in crash recovery
	wifi: ath11k: fix soc_dp_stats debugfs file permission
	wifi: ath11k: convert timeouts to secs_to_jiffies()
	wifi: ath11k: avoid burning CPU in ath11k_debugfs_fw_stats_request()
	wifi: ath11k: don't use static variables in ath11k_debugfs_fw_stats_process()
	wifi: ath11k: don't wait when there is no vdev started
	wifi: ath11k: validate ath11k_crypto_mode on top of ath11k_core_qmi_firmware_ready
	regulator: max20086: Fix refcount leak in max20086_parse_regulators_dt()
	pinctrl: qcom: pinctrl-qcm2290: Add missing pins
	scsi: iscsi: Fix incorrect error path labels for flashnode operations
	net_sched: sch_sfq: fix a potential crash on gso_skb handling
	powerpc/powernv/memtrace: Fix out of bounds issue in memtrace mmap
	powerpc/vas: Return -EINVAL if the offset is non-zero in mmap()
	drm/meson: use unsigned long long / Hz for frequency types
	drm/meson: fix debug log statement when setting the HDMI clocks
	drm/meson: use vclk_freq instead of pixel_freq in debug print
	drm/meson: fix more rounding issues with 59.94Hz modes
	i40e: return false from i40e_reset_vf if reset is in progress
	i40e: retry VFLR handling if there is ongoing VF reset
	ACPI: CPPC: Fix NULL pointer dereference when nosmp is used
	net: Fix TOCTOU issue in sk_is_readable()
	macsec: MACsec SCI assignment for ES = 0
	net/mdiobus: Fix potential out-of-bounds read/write access
	net/mdiobus: Fix potential out-of-bounds clause 45 read/write access
	Bluetooth: Fix NULL pointer deference on eir_get_service_data
	Bluetooth: hci_sync: Fix broadcast/PA when using an existing instance
	Bluetooth: MGMT: Fix sparse errors
	net/mlx5: Ensure fw pages are always allocated on same NUMA
	net/mlx5: Fix ECVF vports unload on shutdown flow
	net/mlx5: Fix return value when searching for existing flow group
	net/mlx5e: Fix leak of Geneve TLV option object
	net_sched: prio: fix a race in prio_tune()
	net_sched: red: fix a race in __red_change()
	net_sched: tbf: fix a race in tbf_change()
	net_sched: ets: fix a race in ets_qdisc_change()
	fs/filesystems: Fix potential unsigned integer underflow in fs_name()
	nvmet-fcloop: access fcpreq only when holding reqlock
	perf: Ensure bpf_perf_link path is properly serialized
	bio: Fix bio_first_folio() for SPARSEMEM without VMEMMAP
	block: Fix bvec_set_folio() for very large folios
	tools/resolve_btfids: Fix build when cross compiling kernel with clang.
	ALSA: usb-audio: Add implicit feedback quirk for RODE AI-1
	HID: usbhid: Eliminate recurrent out-of-bounds bug in usbhid_parse()
	io_uring: add io_file_can_poll() helper
	io_uring/rw: allow pollable non-blocking attempts for !FMODE_NOWAIT
	io_uring/rw: fix wrong NOWAIT check in io_rw_init_file()
	Revert "io_uring: ensure deferred completions are posted for multishot"
	posix-cpu-timers: fix race between handle_posix_cpu_timers() and posix_cpu_timer_del()
	kbuild: Disable -Wdefault-const-init-unsafe
	usb: usbtmc: Fix read_stb function and get_stb ioctl
	VMCI: fix race between vmci_host_setup_notify and vmci_ctx_unset_notify
	usb: cdnsp: Fix issue with detecting command completion event
	usb: cdnsp: Fix issue with detecting USB 3.2 speed
	usb: Flush altsetting 0 endpoints before reinitializating them after reset.
	usb: typec: tcpm/tcpci_maxim: Fix bounds check in process_rx()
	xen/arm: call uaccess_ttbr0_enable for dm_op hypercall
	x86/iopl: Cure TIF_IO_BITMAP inconsistencies
	calipso: unlock rcu before returning -EAFNOSUPPORT
	regulator: dt-bindings: mt6357: Drop fixed compatible requirement
	net: usb: aqc111: debug info before sanitation
	drm/meson: Use 1000ULL when operating with mode->clock
	Linux 6.6.94

Change-Id: I6c3ddf7e90d1de7246d73a365430b2b5019347ba
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
Greg Kroah-Hartman
2025-07-03 07:26:02 +00:00
335 changed files with 3238 additions and 1516 deletions

View File

@@ -58,8 +58,7 @@ properties:
fsl,phy-tx-vboost-level-microvolt: fsl,phy-tx-vboost-level-microvolt:
description: description:
Adjust the boosted transmit launch pk-pk differential amplitude Adjust the boosted transmit launch pk-pk differential amplitude
minimum: 880 enum: [844, 1008, 1156]
maximum: 1120
fsl,phy-comp-dis-tune-percent: fsl,phy-comp-dis-tune-percent:
description: description:

View File

@@ -33,7 +33,7 @@ patternProperties:
"^ldo-v(camio18|aud28|aux18|io18|io28|rf12|rf18|cn18|cn28|fe28)$": "^ldo-v(camio18|aud28|aux18|io18|io28|rf12|rf18|cn18|cn28|fe28)$":
type: object type: object
$ref: fixed-regulator.yaml# $ref: regulator.yaml#
unevaluatedProperties: false unevaluatedProperties: false
description: description:
Properties for single fixed LDO regulator. Properties for single fixed LDO regulator.
@@ -112,7 +112,6 @@ examples:
regulator-enable-ramp-delay = <220>; regulator-enable-ramp-delay = <220>;
}; };
mt6357_vfe28_reg: ldo-vfe28 { mt6357_vfe28_reg: ldo-vfe28 {
compatible = "regulator-fixed";
regulator-name = "vfe28"; regulator-name = "vfe28";
regulator-min-microvolt = <2800000>; regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>; regulator-max-microvolt = <2800000>;
@@ -125,14 +124,12 @@ examples:
regulator-enable-ramp-delay = <110>; regulator-enable-ramp-delay = <110>;
}; };
mt6357_vrf18_reg: ldo-vrf18 { mt6357_vrf18_reg: ldo-vrf18 {
compatible = "regulator-fixed";
regulator-name = "vrf18"; regulator-name = "vrf18";
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
regulator-enable-ramp-delay = <110>; regulator-enable-ramp-delay = <110>;
}; };
mt6357_vrf12_reg: ldo-vrf12 { mt6357_vrf12_reg: ldo-vrf12 {
compatible = "regulator-fixed";
regulator-name = "vrf12"; regulator-name = "vrf12";
regulator-min-microvolt = <1200000>; regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>; regulator-max-microvolt = <1200000>;
@@ -157,14 +154,12 @@ examples:
regulator-enable-ramp-delay = <264>; regulator-enable-ramp-delay = <264>;
}; };
mt6357_vcn28_reg: ldo-vcn28 { mt6357_vcn28_reg: ldo-vcn28 {
compatible = "regulator-fixed";
regulator-name = "vcn28"; regulator-name = "vcn28";
regulator-min-microvolt = <2800000>; regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>; regulator-max-microvolt = <2800000>;
regulator-enable-ramp-delay = <264>; regulator-enable-ramp-delay = <264>;
}; };
mt6357_vcn18_reg: ldo-vcn18 { mt6357_vcn18_reg: ldo-vcn18 {
compatible = "regulator-fixed";
regulator-name = "vcn18"; regulator-name = "vcn18";
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
@@ -183,7 +178,6 @@ examples:
regulator-enable-ramp-delay = <264>; regulator-enable-ramp-delay = <264>;
}; };
mt6357_vcamio_reg: ldo-vcamio18 { mt6357_vcamio_reg: ldo-vcamio18 {
compatible = "regulator-fixed";
regulator-name = "vcamio"; regulator-name = "vcamio";
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
@@ -212,28 +206,24 @@ examples:
regulator-always-on; regulator-always-on;
}; };
mt6357_vaux18_reg: ldo-vaux18 { mt6357_vaux18_reg: ldo-vaux18 {
compatible = "regulator-fixed";
regulator-name = "vaux18"; regulator-name = "vaux18";
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
regulator-enable-ramp-delay = <264>; regulator-enable-ramp-delay = <264>;
}; };
mt6357_vaud28_reg: ldo-vaud28 { mt6357_vaud28_reg: ldo-vaud28 {
compatible = "regulator-fixed";
regulator-name = "vaud28"; regulator-name = "vaud28";
regulator-min-microvolt = <2800000>; regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>; regulator-max-microvolt = <2800000>;
regulator-enable-ramp-delay = <264>; regulator-enable-ramp-delay = <264>;
}; };
mt6357_vio28_reg: ldo-vio28 { mt6357_vio28_reg: ldo-vio28 {
compatible = "regulator-fixed";
regulator-name = "vio28"; regulator-name = "vio28";
regulator-min-microvolt = <2800000>; regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>; regulator-max-microvolt = <2800000>;
regulator-enable-ramp-delay = <264>; regulator-enable-ramp-delay = <264>;
}; };
mt6357_vio18_reg: ldo-vio18 { mt6357_vio18_reg: ldo-vio18 {
compatible = "regulator-fixed";
regulator-name = "vio18"; regulator-name = "vio18";
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;

View File

@@ -14,9 +14,22 @@ allOf:
properties: properties:
compatible: compatible:
enum: oneOf:
- enum:
- usb4b4,6504 - usb4b4,6504
- usb4b4,6506 - usb4b4,6506
- items:
- enum:
- usb4b4,6500
- usb4b4,6508
- const: usb4b4,6504
- items:
- enum:
- usb4b4,6502
- usb4b4,6503
- usb4b4,6507
- usb4b4,650a
- const: usb4b4,6506
reg: true reg: true

View File

@@ -773,6 +773,8 @@ patternProperties:
description: Linux-specific binding description: Linux-specific binding
"^linx,.*": "^linx,.*":
description: Linx Technologies description: Linx Technologies
"^liontron,.*":
description: Shenzhen Liontron Technology Co., Ltd
"^liteon,.*": "^liteon,.*":
description: LITE-ON Technology Corp. description: LITE-ON Technology Corp.
"^litex,.*": "^litex,.*":

View File

@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0 # SPDX-License-Identifier: GPL-2.0
VERSION = 6 VERSION = 6
PATCHLEVEL = 6 PATCHLEVEL = 6
SUBLEVEL = 93 SUBLEVEL = 94
EXTRAVERSION = EXTRAVERSION =
NAME = Pinguïn Aangedreven NAME = Pinguïn Aangedreven

View File

@@ -152,7 +152,7 @@
nand@3 { nand@3 {
reg = <0x3 0x0 0x800000>; reg = <0x3 0x0 0x800000>;
rb-gpios = <&pioA 22 GPIO_ACTIVE_HIGH>; rb-gpios = <&pioA 22 GPIO_ACTIVE_HIGH>;
cs-gpios = <&pioA 15 GPIO_ACTIVE_HIGH>; cs-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
nand-bus-width = <8>; nand-bus-width = <8>;
nand-ecc-mode = "soft"; nand-ecc-mode = "soft";
nand-on-flash-bbt; nand-on-flash-bbt;

View File

@@ -64,7 +64,7 @@
nand@3 { nand@3 {
reg = <0x3 0x0 0x800000>; reg = <0x3 0x0 0x800000>;
rb-gpios = <&pioA 22 GPIO_ACTIVE_HIGH>; rb-gpios = <&pioA 22 GPIO_ACTIVE_HIGH>;
cs-gpios = <&pioA 15 GPIO_ACTIVE_HIGH>; cs-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
nand-bus-width = <8>; nand-bus-width = <8>;
nand-ecc-mode = "soft"; nand-ecc-mode = "soft";
nand-on-flash-bbt; nand-on-flash-bbt;

View File

@@ -58,7 +58,7 @@
}; };
spi0: spi@fffa4000 { spi0: spi@fffa4000 {
cs-gpios = <&pioB 15 GPIO_ACTIVE_HIGH>; cs-gpios = <&pioA 5 GPIO_ACTIVE_LOW>;
status = "okay"; status = "okay";
flash@0 { flash@0 {
compatible = "atmel,at45", "atmel,dataflash"; compatible = "atmel,at45", "atmel,dataflash";
@@ -84,7 +84,7 @@
nand@3 { nand@3 {
reg = <0x3 0x0 0x800000>; reg = <0x3 0x0 0x800000>;
rb-gpios = <&pioA 22 GPIO_ACTIVE_HIGH>; rb-gpios = <&pioA 22 GPIO_ACTIVE_HIGH>;
cs-gpios = <&pioA 15 GPIO_ACTIVE_HIGH>; cs-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
nand-bus-width = <8>; nand-bus-width = <8>;
nand-ecc-mode = "soft"; nand-ecc-mode = "soft";
nand-on-flash-bbt; nand-on-flash-bbt;

View File

@@ -213,12 +213,6 @@
}; };
}; };
sfpb_mutex: hwmutex {
compatible = "qcom,sfpb-mutex";
syscon = <&sfpb_wrapper_mutex 0x604 0x4>;
#hwlock-cells = <1>;
};
smem { smem {
compatible = "qcom,smem"; compatible = "qcom,smem";
memory-region = <&smem_region>; memory-region = <&smem_region>;
@@ -322,9 +316,10 @@
pinctrl-0 = <&ps_hold>; pinctrl-0 = <&ps_hold>;
}; };
sfpb_wrapper_mutex: syscon@1200000 { sfpb_mutex: hwmutex@1200600 {
compatible = "syscon"; compatible = "qcom,sfpb-mutex";
reg = <0x01200000 0x8000>; reg = <0x01200600 0x100>;
#hwlock-cells = <1>;
}; };
intc: interrupt-controller@2000000 { intc: interrupt-controller@2000000 {
@@ -343,6 +338,8 @@
<1 3 0x301>; <1 3 0x301>;
reg = <0x0200a000 0x100>; reg = <0x0200a000 0x100>;
clock-frequency = <27000000>; clock-frequency = <27000000>;
clocks = <&sleep_clk>;
clock-names = "sleep";
cpu-offset = <0x80000>; cpu-offset = <0x80000>;
}; };

View File

@@ -2,7 +2,6 @@
menuconfig ARCH_ASPEED menuconfig ARCH_ASPEED
bool "Aspeed BMC architectures" bool "Aspeed BMC architectures"
depends on (CPU_LITTLE_ENDIAN && ARCH_MULTI_V5) || ARCH_MULTI_V6 || ARCH_MULTI_V7 depends on (CPU_LITTLE_ENDIAN && ARCH_MULTI_V5) || ARCH_MULTI_V6 || ARCH_MULTI_V7
select SRAM
select WATCHDOG select WATCHDOG
select ASPEED_WATCHDOG select ASPEED_WATCHDOG
select MFD_SYSCON select MFD_SYSCON

View File

@@ -308,9 +308,9 @@ config ARCH_MMAP_RND_BITS_MAX
default 24 if ARM64_VA_BITS=39 default 24 if ARM64_VA_BITS=39
default 27 if ARM64_VA_BITS=42 default 27 if ARM64_VA_BITS=42
default 30 if ARM64_VA_BITS=47 default 30 if ARM64_VA_BITS=47
default 29 if ARM64_VA_BITS=48 && ARM64_64K_PAGES default 29 if (ARM64_VA_BITS=48 || ARM64_VA_BITS=52) && ARM64_64K_PAGES
default 31 if ARM64_VA_BITS=48 && ARM64_16K_PAGES default 31 if (ARM64_VA_BITS=48 || ARM64_VA_BITS=52) && ARM64_16K_PAGES
default 33 if ARM64_VA_BITS=48 default 33 if (ARM64_VA_BITS=48 || ARM64_VA_BITS=52)
default 14 if ARM64_64K_PAGES default 14 if ARM64_64K_PAGES
default 16 if ARM64_16K_PAGES default 16 if ARM64_16K_PAGES
default 18 default 18

View File

@@ -124,6 +124,7 @@
assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>; assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
assigned-clock-rates = <24576000>; assigned-clock-rates = <24576000>;
#sound-dai-cells = <0>; #sound-dai-cells = <0>;
fsl,sai-mclk-direction-output;
status = "okay"; status = "okay";
}; };

View File

@@ -231,6 +231,7 @@
rtc: rtc@51 { rtc: rtc@51 {
compatible = "nxp,pcf85263"; compatible = "nxp,pcf85263";
reg = <0x51>; reg = <0x51>;
quartz-load-femtofarads = <12500>;
}; };
}; };

View File

@@ -126,6 +126,7 @@
assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>; assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>;
assigned-clock-rates = <24576000>; assigned-clock-rates = <24576000>;
#sound-dai-cells = <0>; #sound-dai-cells = <0>;
fsl,sai-mclk-direction-output;
status = "okay"; status = "okay";
}; };

View File

@@ -240,6 +240,7 @@
rtc: rtc@51 { rtc: rtc@51 {
compatible = "nxp,pcf85263"; compatible = "nxp,pcf85263";
reg = <0x51>; reg = <0x51>;
quartz-load-femtofarads = <12500>;
}; };
}; };

View File

@@ -192,6 +192,7 @@
rtc: rtc@51 { rtc: rtc@51 {
compatible = "nxp,pcf85263"; compatible = "nxp,pcf85263";
reg = <0x51>; reg = <0x51>;
quartz-load-femtofarads = <12500>;
}; };
}; };

View File

@@ -60,7 +60,6 @@
}; };
mt6357_vfe28_reg: ldo-vfe28 { mt6357_vfe28_reg: ldo-vfe28 {
compatible = "regulator-fixed";
regulator-name = "vfe28"; regulator-name = "vfe28";
regulator-min-microvolt = <2800000>; regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>; regulator-max-microvolt = <2800000>;
@@ -75,7 +74,6 @@
}; };
mt6357_vrf18_reg: ldo-vrf18 { mt6357_vrf18_reg: ldo-vrf18 {
compatible = "regulator-fixed";
regulator-name = "vrf18"; regulator-name = "vrf18";
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
@@ -83,7 +81,6 @@
}; };
mt6357_vrf12_reg: ldo-vrf12 { mt6357_vrf12_reg: ldo-vrf12 {
compatible = "regulator-fixed";
regulator-name = "vrf12"; regulator-name = "vrf12";
regulator-min-microvolt = <1200000>; regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>; regulator-max-microvolt = <1200000>;
@@ -112,7 +109,6 @@
}; };
mt6357_vcn28_reg: ldo-vcn28 { mt6357_vcn28_reg: ldo-vcn28 {
compatible = "regulator-fixed";
regulator-name = "vcn28"; regulator-name = "vcn28";
regulator-min-microvolt = <2800000>; regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>; regulator-max-microvolt = <2800000>;
@@ -120,7 +116,6 @@
}; };
mt6357_vcn18_reg: ldo-vcn18 { mt6357_vcn18_reg: ldo-vcn18 {
compatible = "regulator-fixed";
regulator-name = "vcn18"; regulator-name = "vcn18";
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
@@ -142,7 +137,6 @@
}; };
mt6357_vcamio_reg: ldo-vcamio18 { mt6357_vcamio_reg: ldo-vcamio18 {
compatible = "regulator-fixed";
regulator-name = "vcamio"; regulator-name = "vcamio";
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
@@ -175,7 +169,6 @@
}; };
mt6357_vaux18_reg: ldo-vaux18 { mt6357_vaux18_reg: ldo-vaux18 {
compatible = "regulator-fixed";
regulator-name = "vaux18"; regulator-name = "vaux18";
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
@@ -183,7 +176,6 @@
}; };
mt6357_vaud28_reg: ldo-vaud28 { mt6357_vaud28_reg: ldo-vaud28 {
compatible = "regulator-fixed";
regulator-name = "vaud28"; regulator-name = "vaud28";
regulator-min-microvolt = <2800000>; regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>; regulator-max-microvolt = <2800000>;
@@ -191,7 +183,6 @@
}; };
mt6357_vio28_reg: ldo-vio28 { mt6357_vio28_reg: ldo-vio28 {
compatible = "regulator-fixed";
regulator-name = "vio28"; regulator-name = "vio28";
regulator-min-microvolt = <2800000>; regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>; regulator-max-microvolt = <2800000>;
@@ -199,7 +190,6 @@
}; };
mt6357_vio18_reg: ldo-vio18 { mt6357_vio18_reg: ldo-vio18 {
compatible = "regulator-fixed";
regulator-name = "vio18"; regulator-name = "vio18";
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;

View File

@@ -18,6 +18,8 @@
}; };
regulators { regulators {
compatible = "mediatek,mt6359-regulator";
mt6359_vs1_buck_reg: buck_vs1 { mt6359_vs1_buck_reg: buck_vs1 {
regulator-name = "vs1"; regulator-name = "vs1";
regulator-min-microvolt = <800000>; regulator-min-microvolt = <800000>;
@@ -296,7 +298,7 @@
}; };
}; };
mt6359rtc: mt6359rtc { mt6359rtc: rtc {
compatible = "mediatek,mt6358-rtc"; compatible = "mediatek,mt6358-rtc";
}; };
}; };

View File

@@ -617,22 +617,6 @@
#size-cells = <0>; #size-cells = <0>;
#power-domain-cells = <1>; #power-domain-cells = <1>;
power-domain@MT8195_POWER_DOMAIN_VDEC1 {
reg = <MT8195_POWER_DOMAIN_VDEC1>;
clocks = <&vdecsys CLK_VDEC_LARB1>;
clock-names = "vdec1-0";
mediatek,infracfg = <&infracfg_ao>;
#power-domain-cells = <0>;
};
power-domain@MT8195_POWER_DOMAIN_VENC_CORE1 {
reg = <MT8195_POWER_DOMAIN_VENC_CORE1>;
clocks = <&vencsys_core1 CLK_VENC_CORE1_LARB>;
clock-names = "venc1-larb";
mediatek,infracfg = <&infracfg_ao>;
#power-domain-cells = <0>;
};
power-domain@MT8195_POWER_DOMAIN_VDOSYS0 { power-domain@MT8195_POWER_DOMAIN_VDOSYS0 {
reg = <MT8195_POWER_DOMAIN_VDOSYS0>; reg = <MT8195_POWER_DOMAIN_VDOSYS0>;
clocks = <&topckgen CLK_TOP_CFG_VDO0>, clocks = <&topckgen CLK_TOP_CFG_VDO0>,
@@ -678,6 +662,15 @@
clocks = <&vdecsys_soc CLK_VDEC_SOC_LARB1>; clocks = <&vdecsys_soc CLK_VDEC_SOC_LARB1>;
clock-names = "vdec0-0"; clock-names = "vdec0-0";
mediatek,infracfg = <&infracfg_ao>; mediatek,infracfg = <&infracfg_ao>;
#address-cells = <1>;
#size-cells = <0>;
#power-domain-cells = <0>;
power-domain@MT8195_POWER_DOMAIN_VDEC1 {
reg = <MT8195_POWER_DOMAIN_VDEC1>;
clocks = <&vdecsys CLK_VDEC_LARB1>;
clock-names = "vdec1-0";
mediatek,infracfg = <&infracfg_ao>;
#power-domain-cells = <0>; #power-domain-cells = <0>;
}; };
@@ -688,13 +681,24 @@
mediatek,infracfg = <&infracfg_ao>; mediatek,infracfg = <&infracfg_ao>;
#power-domain-cells = <0>; #power-domain-cells = <0>;
}; };
};
power-domain@MT8195_POWER_DOMAIN_VENC { power-domain@MT8195_POWER_DOMAIN_VENC {
reg = <MT8195_POWER_DOMAIN_VENC>; reg = <MT8195_POWER_DOMAIN_VENC>;
clocks = <&vencsys CLK_VENC_LARB>; clocks = <&vencsys CLK_VENC_LARB>;
clock-names = "venc0-larb"; clock-names = "venc0-larb";
mediatek,infracfg = <&infracfg_ao>; mediatek,infracfg = <&infracfg_ao>;
#address-cells = <1>;
#size-cells = <0>;
#power-domain-cells = <0>; #power-domain-cells = <0>;
power-domain@MT8195_POWER_DOMAIN_VENC_CORE1 {
reg = <MT8195_POWER_DOMAIN_VENC_CORE1>;
clocks = <&vencsys_core1 CLK_VENC_CORE1_LARB>;
clock-names = "venc1-larb";
mediatek,infracfg = <&infracfg_ao>;
#power-domain-cells = <0>;
};
}; };
power-domain@MT8195_POWER_DOMAIN_VDOSYS1 { power-domain@MT8195_POWER_DOMAIN_VDOSYS1 {

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@@ -621,9 +621,7 @@
reg-shift = <2>; reg-shift = <2>;
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTB>; clocks = <&bpmp TEGRA186_CLK_UARTB>;
clock-names = "serial";
resets = <&bpmp TEGRA186_RESET_UARTB>; resets = <&bpmp TEGRA186_RESET_UARTB>;
reset-names = "serial";
status = "disabled"; status = "disabled";
}; };
@@ -633,9 +631,7 @@
reg-shift = <2>; reg-shift = <2>;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTD>; clocks = <&bpmp TEGRA186_CLK_UARTD>;
clock-names = "serial";
resets = <&bpmp TEGRA186_RESET_UARTD>; resets = <&bpmp TEGRA186_RESET_UARTD>;
reset-names = "serial";
status = "disabled"; status = "disabled";
}; };
@@ -645,9 +641,7 @@
reg-shift = <2>; reg-shift = <2>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTE>; clocks = <&bpmp TEGRA186_CLK_UARTE>;
clock-names = "serial";
resets = <&bpmp TEGRA186_RESET_UARTE>; resets = <&bpmp TEGRA186_RESET_UARTE>;
reset-names = "serial";
status = "disabled"; status = "disabled";
}; };
@@ -657,9 +651,7 @@
reg-shift = <2>; reg-shift = <2>;
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTF>; clocks = <&bpmp TEGRA186_CLK_UARTF>;
clock-names = "serial";
resets = <&bpmp TEGRA186_RESET_UARTF>; resets = <&bpmp TEGRA186_RESET_UARTF>;
reset-names = "serial";
status = "disabled"; status = "disabled";
}; };
@@ -1236,9 +1228,7 @@
reg-shift = <2>; reg-shift = <2>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTC>; clocks = <&bpmp TEGRA186_CLK_UARTC>;
clock-names = "serial";
resets = <&bpmp TEGRA186_RESET_UARTC>; resets = <&bpmp TEGRA186_RESET_UARTC>;
reset-names = "serial";
status = "disabled"; status = "disabled";
}; };
@@ -1248,9 +1238,7 @@
reg-shift = <2>; reg-shift = <2>;
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTG>; clocks = <&bpmp TEGRA186_CLK_UARTG>;
clock-names = "serial";
resets = <&bpmp TEGRA186_RESET_UARTG>; resets = <&bpmp TEGRA186_RESET_UARTG>;
reset-names = "serial";
status = "disabled"; status = "disabled";
}; };

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@@ -766,9 +766,7 @@
reg-shift = <2>; reg-shift = <2>;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_UARTD>; clocks = <&bpmp TEGRA194_CLK_UARTD>;
clock-names = "serial";
resets = <&bpmp TEGRA194_RESET_UARTD>; resets = <&bpmp TEGRA194_RESET_UARTD>;
reset-names = "serial";
status = "disabled"; status = "disabled";
}; };
@@ -778,9 +776,7 @@
reg-shift = <2>; reg-shift = <2>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_UARTE>; clocks = <&bpmp TEGRA194_CLK_UARTE>;
clock-names = "serial";
resets = <&bpmp TEGRA194_RESET_UARTE>; resets = <&bpmp TEGRA194_RESET_UARTE>;
reset-names = "serial";
status = "disabled"; status = "disabled";
}; };
@@ -790,9 +786,7 @@
reg-shift = <2>; reg-shift = <2>;
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_UARTF>; clocks = <&bpmp TEGRA194_CLK_UARTF>;
clock-names = "serial";
resets = <&bpmp TEGRA194_RESET_UARTF>; resets = <&bpmp TEGRA194_RESET_UARTF>;
reset-names = "serial";
status = "disabled"; status = "disabled";
}; };
@@ -817,9 +811,7 @@
reg-shift = <2>; reg-shift = <2>;
interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_UARTH>; clocks = <&bpmp TEGRA194_CLK_UARTH>;
clock-names = "serial";
resets = <&bpmp TEGRA194_RESET_UARTH>; resets = <&bpmp TEGRA194_RESET_UARTH>;
reset-names = "serial";
status = "disabled"; status = "disabled";
}; };
@@ -1616,9 +1608,7 @@
reg-shift = <2>; reg-shift = <2>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_UARTC>; clocks = <&bpmp TEGRA194_CLK_UARTC>;
clock-names = "serial";
resets = <&bpmp TEGRA194_RESET_UARTC>; resets = <&bpmp TEGRA194_RESET_UARTC>;
reset-names = "serial";
status = "disabled"; status = "disabled";
}; };
@@ -1628,9 +1618,7 @@
reg-shift = <2>; reg-shift = <2>;
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_UARTG>; clocks = <&bpmp TEGRA194_CLK_UARTG>;
clock-names = "serial";
resets = <&bpmp TEGRA194_RESET_UARTG>; resets = <&bpmp TEGRA194_RESET_UARTG>;
reset-names = "serial";
status = "disabled"; status = "disabled";
}; };

View File

@@ -985,9 +985,6 @@
"VA DMIC0", "MIC BIAS1", "VA DMIC0", "MIC BIAS1",
"VA DMIC1", "MIC BIAS1", "VA DMIC1", "MIC BIAS1",
"VA DMIC2", "MIC BIAS3", "VA DMIC2", "MIC BIAS3",
"VA DMIC0", "VA MIC BIAS1",
"VA DMIC1", "VA MIC BIAS1",
"VA DMIC2", "VA MIC BIAS3",
"TX SWR_ADC1", "ADC2_OUTPUT"; "TX SWR_ADC1", "ADC2_OUTPUT";
wcd-playback-dai-link { wcd-playback-dai-link {

View File

@@ -155,6 +155,7 @@
* BAM DMA interconnects support is in place. * BAM DMA interconnects support is in place.
*/ */
/delete-property/ clocks; /delete-property/ clocks;
/delete-property/ clock-names;
}; };
&blsp1_uart2 { &blsp1_uart2 {
@@ -167,6 +168,7 @@
* BAM DMA interconnects support is in place. * BAM DMA interconnects support is in place.
*/ */
/delete-property/ clocks; /delete-property/ clocks;
/delete-property/ clock-names;
}; };
&blsp2_uart1 { &blsp2_uart1 {

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@@ -107,6 +107,7 @@
status = "okay"; status = "okay";
vdd-supply = <&vreg_l1b_0p925>; vdd-supply = <&vreg_l1b_0p925>;
vdda-pll-supply = <&vreg_l10a_1p8>;
vdda-phy-dpdm-supply = <&vreg_l7b_3p125>; vdda-phy-dpdm-supply = <&vreg_l7b_3p125>;
}; };
@@ -404,6 +405,8 @@
&sdhc_2 { &sdhc_2 {
status = "okay"; status = "okay";
cd-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
vmmc-supply = <&vreg_l5b_2p95>; vmmc-supply = <&vreg_l5b_2p95>;
vqmmc-supply = <&vreg_l2b_2p95>; vqmmc-supply = <&vreg_l2b_2p95>;
}; };

View File

@@ -135,8 +135,6 @@
vdda_sp_sensor: vdda_sp_sensor:
vdda_ufs1_core: vdda_ufs1_core:
vdda_ufs2_core: vdda_ufs2_core:
vdda_usb1_ss_core:
vdda_usb2_ss_core:
vreg_l1a_0p875: ldo1 { vreg_l1a_0p875: ldo1 {
regulator-min-microvolt = <880000>; regulator-min-microvolt = <880000>;
regulator-max-microvolt = <880000>; regulator-max-microvolt = <880000>;
@@ -157,6 +155,7 @@
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
}; };
vdda_usb1_ss_core:
vdd_wcss_cx: vdd_wcss_cx:
vdd_wcss_mx: vdd_wcss_mx:
vdda_wcss_pll: vdda_wcss_pll:
@@ -383,8 +382,8 @@
}; };
&sdhc_2 { &sdhc_2 {
pinctrl-names = "default";
pinctrl-0 = <&sdc2_clk_state &sdc2_cmd_state &sdc2_data_state &sd_card_det_n_state>; pinctrl-0 = <&sdc2_clk_state &sdc2_cmd_state &sdc2_data_state &sd_card_det_n_state>;
pinctrl-names = "default";
cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>; cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
vmmc-supply = <&vreg_l21a_2p95>; vmmc-supply = <&vreg_l21a_2p95>;
vqmmc-supply = <&vddpx_2>; vqmmc-supply = <&vddpx_2>;
@@ -418,16 +417,9 @@
status = "okay"; status = "okay";
}; };
&wifi {
vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
status = "okay";
};
&tlmm { &tlmm {
gpio-reserved-ranges = <0 4>, <27 4>, <81 4>, <85 4>; gpio-reserved-ranges = <27 4>, /* SPI (eSE - embedded Secure Element) */
<85 4>; /* SPI (fingerprint reader) */
sdc2_clk_state: sdc2-clk-state { sdc2_clk_state: sdc2-clk-state {
pins = "sdc2_clk"; pins = "sdc2_clk";

View File

@@ -601,7 +601,7 @@
}; };
cpu7_opp9: opp-1747200000 { cpu7_opp9: opp-1747200000 {
opp-hz = /bits/ 64 <1708800000>; opp-hz = /bits/ 64 <1747200000>;
opp-peak-kBps = <5412000 42393600>; opp-peak-kBps = <5412000 42393600>;
}; };

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@@ -1754,11 +1754,11 @@
interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>; #dma-cells = <1>;
qcom,ee = <0>; qcom,ee = <0>;
qcom,num-ees = <4>;
num-channels = <16>;
qcom,controlled-remotely; qcom,controlled-remotely;
iommus = <&apps_smmu 0x594 0x0011>, iommus = <&apps_smmu 0x594 0x0011>,
<&apps_smmu 0x596 0x0011>; <&apps_smmu 0x596 0x0011>;
/* FIXME: Probing BAM DMA causes some abort and system hang */
status = "fail";
}; };
crypto: crypto@1dfa000 { crypto: crypto@1dfa000 {
@@ -1770,8 +1770,6 @@
<&apps_smmu 0x596 0x0011>; <&apps_smmu 0x596 0x0011>;
interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>; interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "memory"; interconnect-names = "memory";
/* FIXME: dependency BAM DMA is disabled */
status = "disabled";
}; };
ipa: ipa@1e40000 { ipa: ipa@1e40000 {

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@@ -108,7 +108,7 @@
}; };
tpu0_pins: tpu0 { tpu0_pins: tpu0 {
groups = "tpu_to0_a"; groups = "tpu_to0_b";
function = "tpu"; function = "tpu";
}; };
}; };

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@@ -251,14 +251,6 @@
status = "okay"; status = "okay";
}; };
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};
&vopb { &vopb {
status = "okay"; status = "okay";
}; };

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@@ -486,9 +486,12 @@
&sdhci { &sdhci {
bus-width = <8>; bus-width = <8>;
max-frequency = <200000000>; max-frequency = <200000000>;
mmc-hs200-1_8v;
non-removable; non-removable;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>; pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&vcc_1v8>;
status = "okay"; status = "okay";
}; };

View File

@@ -436,6 +436,8 @@
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
mmc-ddr-1_8v; mmc-ddr-1_8v;
mmc-hs200-1_8v; mmc-hs200-1_8v;
ti,clkbuf-sel = <0x7>;
ti,trm-icp = <0x8>;
ti,otap-del-sel-legacy = <0x0>; ti,otap-del-sel-legacy = <0x0>;
ti,otap-del-sel-mmc-hs = <0x0>; ti,otap-del-sel-mmc-hs = <0x0>;
ti,otap-del-sel-sd-hs = <0x0>; ti,otap-del-sel-sd-hs = <0x0>;
@@ -446,8 +448,9 @@
ti,otap-del-sel-ddr50 = <0x5>; ti,otap-del-sel-ddr50 = <0x5>;
ti,otap-del-sel-ddr52 = <0x5>; ti,otap-del-sel-ddr52 = <0x5>;
ti,otap-del-sel-hs200 = <0x5>; ti,otap-del-sel-hs200 = <0x5>;
ti,otap-del-sel-hs400 = <0x0>; ti,itap-del-sel-legacy = <0xa>;
ti,trm-icp = <0x8>; ti,itap-del-sel-mmc-hs = <0x1>;
ti,itap-del-sel-ddr52 = <0x0>;
dma-coherent; dma-coherent;
}; };
@@ -458,18 +461,22 @@
clocks = <&k3_clks 48 0>, <&k3_clks 48 1>; clocks = <&k3_clks 48 0>, <&k3_clks 48 1>;
clock-names = "clk_ahb", "clk_xin"; clock-names = "clk_ahb", "clk_xin";
interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
ti,clkbuf-sel = <0x7>;
ti,trm-icp = <0x8>;
ti,otap-del-sel-legacy = <0x0>; ti,otap-del-sel-legacy = <0x0>;
ti,otap-del-sel-mmc-hs = <0x0>; ti,otap-del-sel-mmc-hs = <0x0>;
ti,otap-del-sel-sd-hs = <0x0>; ti,otap-del-sel-sd-hs = <0x0>;
ti,otap-del-sel-sdr12 = <0x0>; ti,otap-del-sel-sdr12 = <0xf>;
ti,otap-del-sel-sdr25 = <0x0>; ti,otap-del-sel-sdr25 = <0xf>;
ti,otap-del-sel-sdr50 = <0x8>; ti,otap-del-sel-sdr50 = <0x8>;
ti,otap-del-sel-sdr104 = <0x7>; ti,otap-del-sel-sdr104 = <0x7>;
ti,otap-del-sel-ddr50 = <0x4>; ti,otap-del-sel-ddr50 = <0x4>;
ti,otap-del-sel-ddr52 = <0x4>; ti,otap-del-sel-ddr52 = <0x4>;
ti,otap-del-sel-hs200 = <0x7>; ti,otap-del-sel-hs200 = <0x7>;
ti,clkbuf-sel = <0x7>; ti,itap-del-sel-legacy = <0xa>;
ti,trm-icp = <0x8>; ti,itap-del-sel-sd-hs = <0x1>;
ti,itap-del-sel-sdr12 = <0xa>;
ti,itap-del-sel-sdr25 = <0x1>;
dma-coherent; dma-coherent;
}; };

View File

@@ -557,6 +557,7 @@
&ospi1 { &ospi1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&mcu_fss0_ospi1_pins_default>; pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;
status = "okay";
flash@0 { flash@0 {
compatible = "jedec,spi-nor"; compatible = "jedec,spi-nor";

View File

@@ -183,6 +183,17 @@
regulator-boot-on; regulator-boot-on;
}; };
vsys_5v0: fixedregulator-vsys5v0 {
/* Output of LM61460 */
compatible = "regulator-fixed";
regulator-name = "vsys_5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vusb_main>;
regulator-always-on;
regulator-boot-on;
};
vdd_mmc1: fixedregulator-sd { vdd_mmc1: fixedregulator-sd {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
pinctrl-names = "default"; pinctrl-names = "default";
@@ -210,6 +221,56 @@
<3300000 0x1>; <3300000 0x1>;
}; };
vdd_sd_dv: gpio-regulator-TLV71033 {
compatible = "regulator-gpio";
pinctrl-names = "default";
pinctrl-0 = <&vdd_sd_dv_pins_default>;
regulator-name = "tlv71033";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
vin-supply = <&vsys_5v0>;
gpios = <&main_gpio0 118 GPIO_ACTIVE_HIGH>;
states = <1800000 0x0>,
<3300000 0x1>;
};
transceiver1: can-phy1 {
compatible = "ti,tcan1042";
#phy-cells = <0>;
max-bitrate = <5000000>;
pinctrl-names = "default";
pinctrl-0 = <&mcu_mcan0_gpio_pins_default>;
standby-gpios = <&wkup_gpio0 3 GPIO_ACTIVE_HIGH>;
};
transceiver2: can-phy2 {
compatible = "ti,tcan1042";
#phy-cells = <0>;
max-bitrate = <5000000>;
pinctrl-names = "default";
pinctrl-0 = <&main_mcan0_gpio_pins_default>;
standby-gpios = <&main_gpio0 65 GPIO_ACTIVE_HIGH>;
};
transceiver3: can-phy3 {
compatible = "ti,tcan1042";
#phy-cells = <0>;
max-bitrate = <5000000>;
pinctrl-names = "default";
pinctrl-0 = <&main_mcan5_gpio_pins_default>;
standby-gpios = <&main_gpio0 66 GPIO_ACTIVE_HIGH>;
};
transceiver4: can-phy4 {
compatible = "ti,tcan1042";
#phy-cells = <0>;
max-bitrate = <5000000>;
pinctrl-names = "default";
pinctrl-0 = <&main_mcan9_gpio_pins_default>;
standby-gpios = <&main_gpio0 67 GPIO_ACTIVE_HIGH>;
};
dp_pwr_3v3: fixedregulator-dp-prw { dp_pwr_3v3: fixedregulator-dp-prw {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "dp-pwr"; regulator-name = "dp-pwr";
@@ -286,6 +347,15 @@
}; };
}; };
}; };
csi_mux: mux-controller {
compatible = "gpio-mux";
#mux-state-cells = <1>;
mux-gpios = <&main_gpio0 88 GPIO_ACTIVE_HIGH>;
idle-state = <0>;
pinctrl-names = "default";
pinctrl-0 = <&main_csi_mux_sel_pins_default>;
};
}; };
&main_pmx0 { &main_pmx0 {
@@ -352,6 +422,51 @@
>; >;
}; };
main_csi_mux_sel_pins_default: main-csi-mux-sel-default-pins {
pinctrl-single,pins = <
J721E_IOPAD(0x164, PIN_OUTPUT, 7) /* (V29) RGMII5_TD2 */
>;
};
main_mcan0_pins_default: main-mcan0-default-pins {
pinctrl-single,pins = <
J721E_IOPAD(0x208, PIN_INPUT, 0) /* (W5) MCAN0_RX */
J721E_IOPAD(0x20c, PIN_OUTPUT, 0) /* (W6) MCAN0_TX */
>;
};
main_mcan0_gpio_pins_default: main-mcan0-gpio-default-pins {
pinctrl-single,pins = <
J721E_IOPAD(0x108, PIN_INPUT, 7) /* (AD27) PRG0_PRU1_GPO2.GPIO0_65 */
>;
};
main_mcan5_pins_default: main-mcan5-default-pins {
pinctrl-single,pins = <
J721E_IOPAD(0x050, PIN_INPUT, 6) /* (AE21) PRG1_PRU0_GPO18.MCAN5_RX */
J721E_IOPAD(0x04c, PIN_OUTPUT, 6) /* (AJ21) PRG1_PRU0_GPO17.MCAN5_TX */
>;
};
main_mcan5_gpio_pins_default: main-mcan5-gpio-default-pins {
pinctrl-single,pins = <
J721E_IOPAD(0x10c, PIN_INPUT, 7) /* (AC25) PRG0_PRU1_GPO3.GPIO0_66 */
>;
};
main_mcan9_pins_default: main-mcan9-default-pins {
pinctrl-single,pins = <
J721E_IOPAD(0x0d0, PIN_INPUT, 6) /* (AC27) PRG0_PRU0_GPO8.MCAN9_RX */
J721E_IOPAD(0x0cc, PIN_OUTPUT, 6) /* (AC28) PRG0_PRU0_GPO7.MCAN9_TX */
>;
};
main_mcan9_gpio_pins_default: main-mcan9-gpio-default-pins {
pinctrl-single,pins = <
J721E_IOPAD(0x110, PIN_INPUT, 7) /* (AD29) PRG0_PRU1_GPO4.GPIO0_67 */
>;
};
dp0_pins_default: dp0-default-pins { dp0_pins_default: dp0-default-pins {
pinctrl-single,pins = < pinctrl-single,pins = <
J721E_IOPAD(0x1c4, PIN_INPUT, 5) /* SPI0_CS1.DP0_HPD */ J721E_IOPAD(0x1c4, PIN_INPUT, 5) /* SPI0_CS1.DP0_HPD */
@@ -511,6 +626,12 @@
>; >;
}; };
vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
pinctrl-single,pins = <
J721E_IOPAD(0x1dc, PIN_OUTPUT, 7) /* (Y1) SPI1_CLK.GPIO0_118 */
>;
};
wkup_uart0_pins_default: wkup-uart0-default-pins { wkup_uart0_pins_default: wkup-uart0-default-pins {
pinctrl-single,pins = < pinctrl-single,pins = <
J721E_WKUP_IOPAD(0xa0, PIN_INPUT, 0) /* (J29) WKUP_UART0_RXD */ J721E_WKUP_IOPAD(0xa0, PIN_INPUT, 0) /* (J29) WKUP_UART0_RXD */
@@ -534,6 +655,19 @@
>; >;
}; };
mcu_mcan0_pins_default: mcu-mcan0-default-pins {
pinctrl-single,pins = <
J721E_WKUP_IOPAD(0x0ac, PIN_INPUT, 0) /* (C29) MCU_MCAN0_RX */
J721E_WKUP_IOPAD(0x0a8, PIN_OUTPUT, 0) /* (D29) MCU_MCAN0_TX */
>;
};
mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-default-pins {
pinctrl-single,pins = <
J721E_WKUP_IOPAD(0x0bc, PIN_INPUT, 7) /* (F27) WKUP_GPIO0_3 */
>;
};
/* Reset for M.2 M Key slot on PCIe1 */ /* Reset for M.2 M Key slot on PCIe1 */
mkey_reset_pins_default: mkey-reset-pns-default-pins { mkey_reset_pins_default: mkey-reset-pns-default-pins {
pinctrl-single,pins = < pinctrl-single,pins = <
@@ -707,14 +841,14 @@
reg = <0x70>; reg = <0x70>;
/* CSI0 I2C */ /* CSI0 I2C */
i2c@0 { cam0_i2c: i2c@0 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
reg = <0>; reg = <0>;
}; };
/* CSI1 I2C */ /* CSI1 I2C */
i2c@1 { cam1_i2c: i2c@1 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
reg = <1>; reg = <1>;
@@ -942,6 +1076,34 @@
num-lanes = <2>; num-lanes = <2>;
}; };
&mcu_mcan0 {
pinctrl-names = "default";
pinctrl-0 = <&mcu_mcan0_pins_default>;
phys = <&transceiver1>;
status = "okay";
};
&main_mcan0 {
pinctrl-names = "default";
pinctrl-0 = <&main_mcan0_pins_default>;
phys = <&transceiver2>;
status = "okay";
};
&main_mcan5 {
pinctrl-names = "default";
pinctrl-0 = <&main_mcan5_pins_default>;
phys = <&transceiver3>;
status = "okay";
};
&main_mcan9 {
pinctrl-names = "default";
pinctrl-0 = <&main_mcan9_pins_default>;
phys = <&transceiver4>;
status = "okay";
};
&ufs_wrapper { &ufs_wrapper {
status = "disabled"; status = "disabled";
}; };

View File

@@ -1412,6 +1412,9 @@ CONFIG_PHY_HISTB_COMBPHY=y
CONFIG_PHY_HISI_INNO_USB2=y CONFIG_PHY_HISI_INNO_USB2=y
CONFIG_PHY_MVEBU_CP110_COMPHY=y CONFIG_PHY_MVEBU_CP110_COMPHY=y
CONFIG_PHY_MTK_TPHY=y CONFIG_PHY_MTK_TPHY=y
CONFIG_PHY_MTK_HDMI=m
CONFIG_PHY_MTK_MIPI_DSI=m
CONFIG_PHY_MTK_DP=m
CONFIG_PHY_QCOM_EDP=m CONFIG_PHY_QCOM_EDP=m
CONFIG_PHY_QCOM_EUSB2_REPEATER=m CONFIG_PHY_QCOM_EUSB2_REPEATER=m
CONFIG_PHY_QCOM_PCIE2=m CONFIG_PHY_QCOM_PCIE2=m

View File

@@ -366,12 +366,14 @@
/* /*
* ISS values for SME traps * ISS values for SME traps
*/ */
#define ESR_ELx_SME_ISS_SMTC_MASK GENMASK(2, 0)
#define ESR_ELx_SME_ISS_SMTC(esr) ((esr) & ESR_ELx_SME_ISS_SMTC_MASK)
#define ESR_ELx_SME_ISS_SME_DISABLED 0 #define ESR_ELx_SME_ISS_SMTC_SME_DISABLED 0
#define ESR_ELx_SME_ISS_ILL 1 #define ESR_ELx_SME_ISS_SMTC_ILL 1
#define ESR_ELx_SME_ISS_SM_DISABLED 2 #define ESR_ELx_SME_ISS_SMTC_SM_DISABLED 2
#define ESR_ELx_SME_ISS_ZA_DISABLED 3 #define ESR_ELx_SME_ISS_SMTC_ZA_DISABLED 3
#define ESR_ELx_SME_ISS_ZT_DISABLED 4 #define ESR_ELx_SME_ISS_SMTC_ZT_DISABLED 4
/* ISS field definitions for MOPS exceptions */ /* ISS field definitions for MOPS exceptions */
#define ESR_ELx_MOPS_ISS_MEM_INST (UL(1) << 24) #define ESR_ELx_MOPS_ISS_MEM_INST (UL(1) << 24)

View File

@@ -6,6 +6,7 @@
#define __ASM_FP_H #define __ASM_FP_H
#include <asm/errno.h> #include <asm/errno.h>
#include <asm/percpu.h>
#include <asm/ptrace.h> #include <asm/ptrace.h>
#include <asm/processor.h> #include <asm/processor.h>
#include <asm/sigcontext.h> #include <asm/sigcontext.h>
@@ -69,6 +70,8 @@ struct cpu_fp_state {
enum fp_type to_save; enum fp_type to_save;
}; };
DECLARE_PER_CPU(struct cpu_fp_state, fpsimd_last_state);
extern void fpsimd_bind_state_to_cpu(struct cpu_fp_state *fp_state); extern void fpsimd_bind_state_to_cpu(struct cpu_fp_state *fp_state);
extern void fpsimd_flush_task_state(struct task_struct *target); extern void fpsimd_flush_task_state(struct task_struct *target);

View File

@@ -363,20 +363,16 @@ static bool cortex_a76_erratum_1463225_debug_handler(struct pt_regs *regs)
* As per the ABI exit SME streaming mode and clear the SVE state not * As per the ABI exit SME streaming mode and clear the SVE state not
* shared with FPSIMD on syscall entry. * shared with FPSIMD on syscall entry.
*/ */
static inline void fp_user_discard(void) static inline void fpsimd_syscall_enter(void)
{ {
/* /* Ensure PSTATE.SM is clear, but leave PSTATE.ZA as-is. */
* If SME is active then exit streaming mode. If ZA is active
* then flush the SVE registers but leave userspace access to
* both SVE and SME enabled, otherwise disable SME for the
* task and fall through to disabling SVE too. This means
* that after a syscall we never have any streaming mode
* register state to track, if this changes the KVM code will
* need updating.
*/
if (system_supports_sme()) if (system_supports_sme())
sme_smstop_sm(); sme_smstop_sm();
/*
* The CPU is not in streaming mode. If non-streaming SVE is not
* supported, there is no SVE state that needs to be discarded.
*/
if (!system_supports_sve()) if (!system_supports_sve())
return; return;
@@ -386,6 +382,33 @@ static inline void fp_user_discard(void)
sve_vq_minus_one = sve_vq_from_vl(task_get_sve_vl(current)) - 1; sve_vq_minus_one = sve_vq_from_vl(task_get_sve_vl(current)) - 1;
sve_flush_live(true, sve_vq_minus_one); sve_flush_live(true, sve_vq_minus_one);
} }
/*
* Any live non-FPSIMD SVE state has been zeroed. Allow
* fpsimd_save_user_state() to lazily discard SVE state until either
* the live state is unbound or fpsimd_syscall_exit() is called.
*/
__this_cpu_write(fpsimd_last_state.to_save, FP_STATE_FPSIMD);
}
static __always_inline void fpsimd_syscall_exit(void)
{
if (!system_supports_sve())
return;
/*
* The current task's user FPSIMD/SVE/SME state is now bound to this
* CPU. The fpsimd_last_state.to_save value is either:
*
* - FP_STATE_FPSIMD, if the state has not been reloaded on this CPU
* since fpsimd_syscall_enter().
*
* - FP_STATE_CURRENT, if the state has been reloaded on this CPU at
* any point.
*
* Reset this to FP_STATE_CURRENT to stop lazy discarding.
*/
__this_cpu_write(fpsimd_last_state.to_save, FP_STATE_CURRENT);
} }
UNHANDLED(el1t, 64, sync) UNHANDLED(el1t, 64, sync)
@@ -678,10 +701,11 @@ static void noinstr el0_svc(struct pt_regs *regs)
{ {
enter_from_user_mode(regs); enter_from_user_mode(regs);
cortex_a76_erratum_1463225_svc_handler(); cortex_a76_erratum_1463225_svc_handler();
fp_user_discard(); fpsimd_syscall_enter();
local_daif_restore(DAIF_PROCCTX); local_daif_restore(DAIF_PROCCTX);
do_el0_svc(regs); do_el0_svc(regs);
exit_to_user_mode(regs); exit_to_user_mode(regs);
fpsimd_syscall_exit();
} }
static void noinstr el0_fpac(struct pt_regs *regs, unsigned long esr) static void noinstr el0_fpac(struct pt_regs *regs, unsigned long esr)

View File

@@ -119,7 +119,7 @@
* whatever is in the FPSIMD registers is not saved to memory, but discarded. * whatever is in the FPSIMD registers is not saved to memory, but discarded.
*/ */
static DEFINE_PER_CPU(struct cpu_fp_state, fpsimd_last_state); DEFINE_PER_CPU(struct cpu_fp_state, fpsimd_last_state);
__ro_after_init struct vl_info vl_info[ARM64_VEC_MAX] = { __ro_after_init struct vl_info vl_info[ARM64_VEC_MAX] = {
#ifdef CONFIG_ARM64_SVE #ifdef CONFIG_ARM64_SVE
@@ -473,12 +473,15 @@ static void fpsimd_save(void)
return; return;
/* /*
* If a task is in a syscall the ABI allows us to only * Save SVE state if it is live.
* preserve the state shared with FPSIMD so don't bother *
* saving the full SVE state in that case. * The syscall ABI discards live SVE state at syscall entry. When
* entering a syscall, fpsimd_syscall_enter() sets to_save to
* FP_STATE_FPSIMD to allow the SVE state to be lazily discarded until
* either new SVE state is loaded+bound or fpsimd_syscall_exit() is
* called prior to a return to userspace.
*/ */
if ((last->to_save == FP_STATE_CURRENT && test_thread_flag(TIF_SVE) && if ((last->to_save == FP_STATE_CURRENT && test_thread_flag(TIF_SVE)) ||
!in_syscall(current_pt_regs())) ||
last->to_save == FP_STATE_SVE) { last->to_save == FP_STATE_SVE) {
save_sve_regs = true; save_sve_regs = true;
save_ffr = true; save_ffr = true;
@@ -1514,7 +1517,7 @@ void do_sme_acc(unsigned long esr, struct pt_regs *regs)
* If this not a trap due to SME being disabled then something * If this not a trap due to SME being disabled then something
* is being used in the wrong mode, report as SIGILL. * is being used in the wrong mode, report as SIGILL.
*/ */
if (ESR_ELx_ISS(esr) != ESR_ELx_SME_ISS_SME_DISABLED) { if (ESR_ELx_SME_ISS_SMTC(esr) != ESR_ELx_SME_ISS_SMTC_SME_DISABLED) {
force_signal_inject(SIGILL, ILL_ILLOPC, regs->pc, 0); force_signal_inject(SIGILL, ILL_ILLOPC, regs->pc, 0);
return; return;
} }
@@ -1538,6 +1541,8 @@ void do_sme_acc(unsigned long esr, struct pt_regs *regs)
sme_set_vq(vq_minus_one); sme_set_vq(vq_minus_one);
fpsimd_bind_task_to_cpu(); fpsimd_bind_task_to_cpu();
} else {
fpsimd_flush_task_state(current);
} }
put_cpu_fpsimd_context(); put_cpu_fpsimd_context();
@@ -1803,7 +1808,7 @@ void fpsimd_update_current_state(struct user_fpsimd_state const *state)
get_cpu_fpsimd_context(); get_cpu_fpsimd_context();
current->thread.uw.fpsimd_state = *state; current->thread.uw.fpsimd_state = *state;
if (test_thread_flag(TIF_SVE)) if (current->thread.fp_type == FP_STATE_SVE)
fpsimd_to_sve(current); fpsimd_to_sve(current);
task_fpsimd_load(); task_fpsimd_load();

View File

@@ -83,7 +83,26 @@ HYPERCALL3(vcpu_op);
HYPERCALL1(platform_op_raw); HYPERCALL1(platform_op_raw);
HYPERCALL2(multicall); HYPERCALL2(multicall);
HYPERCALL2(vm_assist); HYPERCALL2(vm_assist);
HYPERCALL3(dm_op);
SYM_FUNC_START(HYPERVISOR_dm_op)
mov x16, #__HYPERVISOR_dm_op; \
/*
* dm_op hypercalls are issued by the userspace. The kernel needs to
* enable access to TTBR0_EL1 as the hypervisor would issue stage 1
* translations to user memory via AT instructions. Since AT
* instructions are not affected by the PAN bit (ARMv8.1), we only
* need the explicit uaccess_enable/disable if the TTBR0 PAN emulation
* is enabled (it implies that hardware UAO and PAN disabled).
*/
uaccess_ttbr0_enable x6, x7, x8
hvc XEN_IMM
/*
* Disable userspace access from kernel once the hyp call completed.
*/
uaccess_ttbr0_disable x6, x7
ret
SYM_FUNC_END(HYPERVISOR_dm_op);
SYM_FUNC_START(privcmd_call) SYM_FUNC_START(privcmd_call)
mov x16, x0 mov x16, x0

View File

@@ -801,7 +801,7 @@ static void __init mac_identify(void)
} }
macintosh_config = mac_data_table; macintosh_config = mac_data_table;
for (m = macintosh_config; m->ident != -1; m++) { for (m = &mac_data_table[1]; m->ident != -1; m++) {
if (m->ident == model) { if (m->ident == model) {
macintosh_config = m; macintosh_config = m;
break; break;

View File

@@ -29,6 +29,7 @@
compatible = "loongson,pch-msi-1.0"; compatible = "loongson,pch-msi-1.0";
reg = <0 0x2ff00000 0 0x8>; reg = <0 0x2ff00000 0 0x8>;
interrupt-controller; interrupt-controller;
#interrupt-cells = <1>;
msi-controller; msi-controller;
loongson,msi-base-vec = <64>; loongson,msi-base-vec = <64>;
loongson,msi-num-vecs = <64>; loongson,msi-num-vecs = <64>;

View File

@@ -165,7 +165,7 @@ endif
obj64-$(CONFIG_PPC_TRANSACTIONAL_MEM) += tm.o obj64-$(CONFIG_PPC_TRANSACTIONAL_MEM) += tm.o
ifneq ($(CONFIG_XMON)$(CONFIG_KEXEC_CORE)(CONFIG_PPC_BOOK3S),) ifneq ($(CONFIG_XMON)$(CONFIG_KEXEC_CORE)$(CONFIG_PPC_BOOK3S),)
obj-y += ppc_save_regs.o obj-y += ppc_save_regs.o
endif endif

View File

@@ -356,7 +356,10 @@ void default_machine_crash_shutdown(struct pt_regs *regs)
if (TRAP(regs) == INTERRUPT_SYSTEM_RESET) if (TRAP(regs) == INTERRUPT_SYSTEM_RESET)
is_via_system_reset = 1; is_via_system_reset = 1;
if (IS_ENABLED(CONFIG_SMP))
crash_smp_send_stop(); crash_smp_send_stop();
else
crash_kexec_prepare();
crash_save_cpu(regs, crashing_cpu); crash_save_cpu(regs, crashing_cpu);

View File

@@ -521,6 +521,15 @@ static int coproc_mmap(struct file *fp, struct vm_area_struct *vma)
return -EINVAL; return -EINVAL;
} }
/*
* Map complete page to the paste address. So the user
* space should pass 0ULL to the offset parameter.
*/
if (vma->vm_pgoff) {
pr_debug("Page offset unsupported to map paste address\n");
return -EINVAL;
}
/* Ensure instance has an open send window */ /* Ensure instance has an open send window */
if (!txwin) { if (!txwin) {
pr_err("No send window open?\n"); pr_err("No send window open?\n");

View File

@@ -48,11 +48,15 @@ static ssize_t memtrace_read(struct file *filp, char __user *ubuf,
static int memtrace_mmap(struct file *filp, struct vm_area_struct *vma) static int memtrace_mmap(struct file *filp, struct vm_area_struct *vma)
{ {
struct memtrace_entry *ent = filp->private_data; struct memtrace_entry *ent = filp->private_data;
unsigned long ent_nrpages = ent->size >> PAGE_SHIFT;
unsigned long vma_nrpages = vma_pages(vma);
if (ent->size < vma->vm_end - vma->vm_start) /* The requested page offset should be within object's page count */
if (vma->vm_pgoff >= ent_nrpages)
return -EINVAL; return -EINVAL;
if (vma->vm_pgoff << PAGE_SHIFT >= ent->size) /* The requested mapping range should remain within the bounds */
if (vma_nrpages > ent_nrpages - vma->vm_pgoff)
return -EINVAL; return -EINVAL;
vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);

View File

@@ -103,9 +103,9 @@ void kvm_riscv_vcpu_sbi_system_reset(struct kvm_vcpu *vcpu,
struct kvm_vcpu *tmp; struct kvm_vcpu *tmp;
kvm_for_each_vcpu(i, tmp, vcpu->kvm) { kvm_for_each_vcpu(i, tmp, vcpu->kvm) {
spin_lock(&vcpu->arch.mp_state_lock); spin_lock(&tmp->arch.mp_state_lock);
WRITE_ONCE(tmp->arch.mp_state.mp_state, KVM_MP_STATE_STOPPED); WRITE_ONCE(tmp->arch.mp_state.mp_state, KVM_MP_STATE_STOPPED);
spin_unlock(&vcpu->arch.mp_state_lock); spin_unlock(&tmp->arch.mp_state_lock);
} }
kvm_make_all_cpus_request(vcpu->kvm, KVM_REQ_SLEEP); kvm_make_all_cpus_request(vcpu->kvm, KVM_REQ_SLEEP);

View File

@@ -587,14 +587,12 @@ static void bpf_jit_prologue(struct bpf_jit *jit, struct bpf_prog *fp,
} }
/* Setup stack and backchain */ /* Setup stack and backchain */
if (is_first_pass(jit) || (jit->seen & SEEN_STACK)) { if (is_first_pass(jit) || (jit->seen & SEEN_STACK)) {
if (is_first_pass(jit) || (jit->seen & SEEN_FUNC))
/* lgr %w1,%r15 (backchain) */ /* lgr %w1,%r15 (backchain) */
EMIT4(0xb9040000, REG_W1, REG_15); EMIT4(0xb9040000, REG_W1, REG_15);
/* la %bfp,STK_160_UNUSED(%r15) (BPF frame pointer) */ /* la %bfp,STK_160_UNUSED(%r15) (BPF frame pointer) */
EMIT4_DISP(0x41000000, BPF_REG_FP, REG_15, STK_160_UNUSED); EMIT4_DISP(0x41000000, BPF_REG_FP, REG_15, STK_160_UNUSED);
/* aghi %r15,-STK_OFF */ /* aghi %r15,-STK_OFF */
EMIT4_IMM(0xa70b0000, REG_15, -(STK_OFF + stack_depth)); EMIT4_IMM(0xa70b0000, REG_15, -(STK_OFF + stack_depth));
if (is_first_pass(jit) || (jit->seen & SEEN_FUNC))
/* stg %w1,152(%r15) (backchain) */ /* stg %w1,152(%r15) (backchain) */
EMIT6_DISP_LH(0xe3000000, 0x0024, REG_W1, REG_0, EMIT6_DISP_LH(0xe3000000, 0x0024, REG_W1, REG_0,
REG_15, 152); REG_15, 152);

View File

@@ -108,13 +108,10 @@ static __always_inline void __sti_mwait(unsigned long eax, unsigned long ecx)
static __always_inline void mwait_idle_with_hints(unsigned long eax, unsigned long ecx) static __always_inline void mwait_idle_with_hints(unsigned long eax, unsigned long ecx)
{ {
if (static_cpu_has_bug(X86_BUG_MONITOR) || !current_set_polling_and_test()) { if (static_cpu_has_bug(X86_BUG_MONITOR) || !current_set_polling_and_test()) {
if (static_cpu_has_bug(X86_BUG_CLFLUSH_MONITOR)) { const void *addr = &current_thread_info()->flags;
mb();
clflush((void *)&current_thread_info()->flags);
mb();
}
__monitor((void *)&current_thread_info()->flags, 0, 0); alternative_input("", "clflush (%[addr])", X86_BUG_CLFLUSH_MONITOR, [addr] "a" (addr));
__monitor(addr, 0, 0);
if (!need_resched()) { if (!need_resched()) {
if (ecx & 1) { if (ecx & 1) {

View File

@@ -1066,18 +1066,19 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
c->x86_capability[CPUID_D_1_EAX] = eax; c->x86_capability[CPUID_D_1_EAX] = eax;
} }
/* AMD-defined flags: level 0x80000001 */ /*
* Check if extended CPUID leaves are implemented: Max extended
* CPUID leaf must be in the 0x80000001-0x8000ffff range.
*/
eax = cpuid_eax(0x80000000); eax = cpuid_eax(0x80000000);
c->extended_cpuid_level = eax; c->extended_cpuid_level = ((eax & 0xffff0000) == 0x80000000) ? eax : 0;
if ((eax & 0xffff0000) == 0x80000000) { if (c->extended_cpuid_level >= 0x80000001) {
if (eax >= 0x80000001) {
cpuid(0x80000001, &eax, &ebx, &ecx, &edx); cpuid(0x80000001, &eax, &ebx, &ecx, &edx);
c->x86_capability[CPUID_8000_0001_ECX] = ecx; c->x86_capability[CPUID_8000_0001_ECX] = ecx;
c->x86_capability[CPUID_8000_0001_EDX] = edx; c->x86_capability[CPUID_8000_0001_EDX] = edx;
} }
}
if (c->extended_cpuid_level >= 0x80000007) { if (c->extended_cpuid_level >= 0x80000007) {
cpuid(0x80000007, &eax, &ebx, &ecx, &edx); cpuid(0x80000007, &eax, &ebx, &ecx, &edx);

View File

@@ -703,6 +703,8 @@ static int load_late_locked(void)
return load_late_stop_cpus(true); return load_late_stop_cpus(true);
case UCODE_NFOUND: case UCODE_NFOUND:
return -ENOENT; return -ENOENT;
case UCODE_OK:
return 0;
default: default:
return -EBADFD; return -EBADFD;
} }

View File

@@ -582,7 +582,7 @@ static void get_fixed_ranges(mtrr_type *frs)
void mtrr_save_fixed_ranges(void *info) void mtrr_save_fixed_ranges(void *info)
{ {
if (boot_cpu_has(X86_FEATURE_MTRR)) if (mtrr_state.have_fixed)
get_fixed_ranges(mtrr_state.fixed_ranges); get_fixed_ranges(mtrr_state.fixed_ranges);
} }

View File

@@ -33,8 +33,9 @@ void io_bitmap_share(struct task_struct *tsk)
set_tsk_thread_flag(tsk, TIF_IO_BITMAP); set_tsk_thread_flag(tsk, TIF_IO_BITMAP);
} }
static void task_update_io_bitmap(struct task_struct *tsk) static void task_update_io_bitmap(void)
{ {
struct task_struct *tsk = current;
struct thread_struct *t = &tsk->thread; struct thread_struct *t = &tsk->thread;
if (t->iopl_emul == 3 || t->io_bitmap) { if (t->iopl_emul == 3 || t->io_bitmap) {
@@ -54,7 +55,12 @@ void io_bitmap_exit(struct task_struct *tsk)
struct io_bitmap *iobm = tsk->thread.io_bitmap; struct io_bitmap *iobm = tsk->thread.io_bitmap;
tsk->thread.io_bitmap = NULL; tsk->thread.io_bitmap = NULL;
task_update_io_bitmap(tsk); /*
* Don't touch the TSS when invoked on a failed fork(). TSS
* reflects the state of @current and not the state of @tsk.
*/
if (tsk == current)
task_update_io_bitmap();
if (iobm && refcount_dec_and_test(&iobm->refcnt)) if (iobm && refcount_dec_and_test(&iobm->refcnt))
kfree(iobm); kfree(iobm);
} }
@@ -192,8 +198,7 @@ SYSCALL_DEFINE1(iopl, unsigned int, level)
} }
t->iopl_emul = level; t->iopl_emul = level;
task_update_io_bitmap(current); task_update_io_bitmap();
return 0; return 0;
} }

View File

@@ -181,6 +181,7 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)
frame->ret_addr = (unsigned long) ret_from_fork_asm; frame->ret_addr = (unsigned long) ret_from_fork_asm;
p->thread.sp = (unsigned long) fork_frame; p->thread.sp = (unsigned long) fork_frame;
p->thread.io_bitmap = NULL; p->thread.io_bitmap = NULL;
clear_tsk_thread_flag(p, TIF_IO_BITMAP);
p->thread.iopl_warn = 0; p->thread.iopl_warn = 0;
memset(p->thread.ptrace_bps, 0, sizeof(p->thread.ptrace_bps)); memset(p->thread.ptrace_bps, 0, sizeof(p->thread.ptrace_bps));
@@ -469,6 +470,11 @@ void native_tss_update_io_bitmap(void)
} else { } else {
struct io_bitmap *iobm = t->io_bitmap; struct io_bitmap *iobm = t->io_bitmap;
if (WARN_ON_ONCE(!iobm)) {
clear_thread_flag(TIF_IO_BITMAP);
native_tss_invalidate_io_bitmap();
}
/* /*
* Only copy bitmap data when the sequence number differs. The * Only copy bitmap data when the sequence number differs. The
* update time is accounted to the incoming task. * update time is accounted to the incoming task.
@@ -924,13 +930,10 @@ static int prefer_mwait_c1_over_halt(const struct cpuinfo_x86 *c)
static __cpuidle void mwait_idle(void) static __cpuidle void mwait_idle(void)
{ {
if (!current_set_polling_and_test()) { if (!current_set_polling_and_test()) {
if (this_cpu_has(X86_BUG_CLFLUSH_MONITOR)) { const void *addr = &current_thread_info()->flags;
mb(); /* quirk */
clflush((void *)&current_thread_info()->flags);
mb(); /* quirk */
}
__monitor((void *)&current_thread_info()->flags, 0, 0); alternative_input("", "clflush (%[addr])", X86_BUG_CLFLUSH_MONITOR, [addr] "a" (addr));
__monitor(addr, 0, 0);
if (!need_resched()) { if (!need_resched()) {
__sti_mwait(0, 0); __sti_mwait(0, 0);
raw_local_irq_disable(); raw_local_irq_disable();

View File

@@ -322,7 +322,7 @@ static int lrw_create(struct crypto_template *tmpl, struct rtattr **tb)
err = crypto_grab_skcipher(spawn, skcipher_crypto_instance(inst), err = crypto_grab_skcipher(spawn, skcipher_crypto_instance(inst),
cipher_name, 0, mask); cipher_name, 0, mask);
if (err == -ENOENT) { if (err == -ENOENT && memcmp(cipher_name, "ecb(", 4)) {
err = -ENAMETOOLONG; err = -ENAMETOOLONG;
if (snprintf(ecb_name, CRYPTO_MAX_ALG_NAME, "ecb(%s)", if (snprintf(ecb_name, CRYPTO_MAX_ALG_NAME, "ecb(%s)",
cipher_name) >= CRYPTO_MAX_ALG_NAME) cipher_name) >= CRYPTO_MAX_ALG_NAME)
@@ -356,7 +356,7 @@ static int lrw_create(struct crypto_template *tmpl, struct rtattr **tb)
/* Alas we screwed up the naming so we have to mangle the /* Alas we screwed up the naming so we have to mangle the
* cipher name. * cipher name.
*/ */
if (!strncmp(cipher_name, "ecb(", 4)) { if (!memcmp(cipher_name, "ecb(", 4)) {
int len; int len;
len = strscpy(ecb_name, cipher_name + 4, sizeof(ecb_name)); len = strscpy(ecb_name, cipher_name + 4, sizeof(ecb_name));

View File

@@ -363,7 +363,7 @@ static int xts_create(struct crypto_template *tmpl, struct rtattr **tb)
err = crypto_grab_skcipher(&ctx->spawn, skcipher_crypto_instance(inst), err = crypto_grab_skcipher(&ctx->spawn, skcipher_crypto_instance(inst),
cipher_name, 0, mask); cipher_name, 0, mask);
if (err == -ENOENT) { if (err == -ENOENT && memcmp(cipher_name, "ecb(", 4)) {
err = -ENAMETOOLONG; err = -ENAMETOOLONG;
if (snprintf(name, CRYPTO_MAX_ALG_NAME, "ecb(%s)", if (snprintf(name, CRYPTO_MAX_ALG_NAME, "ecb(%s)",
cipher_name) >= CRYPTO_MAX_ALG_NAME) cipher_name) >= CRYPTO_MAX_ALG_NAME)
@@ -397,7 +397,7 @@ static int xts_create(struct crypto_template *tmpl, struct rtattr **tb)
/* Alas we screwed up the naming so we have to mangle the /* Alas we screwed up the naming so we have to mangle the
* cipher name. * cipher name.
*/ */
if (!strncmp(cipher_name, "ecb(", 4)) { if (!memcmp(cipher_name, "ecb(", 4)) {
int len; int len;
len = strscpy(name, cipher_name + 4, sizeof(name)); len = strscpy(name, cipher_name + 4, sizeof(name));

View File

@@ -201,6 +201,12 @@ acpi_ex_read_serial_bus(union acpi_operand_object *obj_desc,
function = ACPI_READ; function = ACPI_READ;
break; break;
case ACPI_ADR_SPACE_FIXED_HARDWARE:
buffer_length = ACPI_FFH_INPUT_BUFFER_SIZE;
function = ACPI_READ;
break;
default: default:
return_ACPI_STATUS(AE_AML_INVALID_SPACE_ID); return_ACPI_STATUS(AE_AML_INVALID_SPACE_ID);
} }

View File

@@ -23,6 +23,7 @@ config ACPI_APEI_GHES
select ACPI_HED select ACPI_HED
select IRQ_WORK select IRQ_WORK
select GENERIC_ALLOCATOR select GENERIC_ALLOCATOR
select ARM_SDE_INTERFACE if ARM64
help help
Generic Hardware Error Source provides a way to report Generic Hardware Error Source provides a way to report
platform hardware errors (such as that from chipset). It platform hardware errors (such as that from chipset). It

View File

@@ -1523,7 +1523,7 @@ void __init acpi_ghes_init(void)
{ {
int rc; int rc;
sdei_init(); acpi_sdei_init();
if (acpi_disabled) if (acpi_disabled)
return; return;

View File

@@ -461,7 +461,7 @@ bool cppc_allow_fast_switch(void)
struct cpc_desc *cpc_ptr; struct cpc_desc *cpc_ptr;
int cpu; int cpu;
for_each_possible_cpu(cpu) { for_each_present_cpu(cpu) {
cpc_ptr = per_cpu(cpc_desc_ptr, cpu); cpc_ptr = per_cpu(cpc_desc_ptr, cpu);
desired_reg = &cpc_ptr->cpc_regs[DESIRED_PERF]; desired_reg = &cpc_ptr->cpc_regs[DESIRED_PERF];
if (!CPC_IN_SYSTEM_MEMORY(desired_reg) && if (!CPC_IN_SYSTEM_MEMORY(desired_reg) &&

View File

@@ -42,7 +42,6 @@ static struct acpi_osi_entry
osi_setup_entries[OSI_STRING_ENTRIES_MAX] __initdata = { osi_setup_entries[OSI_STRING_ENTRIES_MAX] __initdata = {
{"Module Device", true}, {"Module Device", true},
{"Processor Device", true}, {"Processor Device", true},
{"3.0 _SCP Extensions", true},
{"Processor Aggregator Device", true}, {"Processor Aggregator Device", true},
}; };

View File

@@ -2866,7 +2866,7 @@ struct device *genpd_dev_pm_attach_by_id(struct device *dev,
/* Verify that the index is within a valid range. */ /* Verify that the index is within a valid range. */
num_domains = of_count_phandle_with_args(dev->of_node, "power-domains", num_domains = of_count_phandle_with_args(dev->of_node, "power-domains",
"#power-domain-cells"); "#power-domain-cells");
if (index >= num_domains) if (num_domains < 0 || index >= num_domains)
return NULL; return NULL;
/* Allocate and register device on the genpd bus. */ /* Allocate and register device on the genpd bus. */

View File

@@ -903,6 +903,8 @@ static void __device_resume(struct device *dev, pm_message_t state, bool async)
if (!dev->power.is_suspended) if (!dev->power.is_suspended)
goto Complete; goto Complete;
dev->power.is_suspended = false;
if (dev->power.direct_complete) { if (dev->power.direct_complete) {
/* Match the pm_runtime_disable() in __device_suspend(). */ /* Match the pm_runtime_disable() in __device_suspend(). */
pm_runtime_enable(dev); pm_runtime_enable(dev);
@@ -958,7 +960,6 @@ static void __device_resume(struct device *dev, pm_message_t state, bool async)
End: End:
error = dpm_run_callback(callback, dev, state, info); error = dpm_run_callback(callback, dev, state, info);
dev->power.is_suspended = false;
device_unlock(dev); device_unlock(dev);
dpm_watchdog_clear(&wd); dpm_watchdog_clear(&wd);

View File

@@ -2307,14 +2307,14 @@ static int qca_serdev_probe(struct serdev_device *serdev)
qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable", qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable",
GPIOD_OUT_LOW); GPIOD_OUT_LOW);
if (IS_ERR(qcadev->bt_en) && if (IS_ERR(qcadev->bt_en))
(data->soc_type == QCA_WCN6750 || return dev_err_probe(&serdev->dev,
data->soc_type == QCA_WCN6855)) { PTR_ERR(qcadev->bt_en),
dev_err(&serdev->dev, "failed to acquire BT_EN gpio\n"); "failed to acquire BT_EN gpio\n");
return PTR_ERR(qcadev->bt_en);
}
if (!qcadev->bt_en) if (!qcadev->bt_en &&
(data->soc_type == QCA_WCN6750 ||
data->soc_type == QCA_WCN6855))
power_ctrl_enabled = false; power_ctrl_enabled = false;
qcadev->sw_ctrl = devm_gpiod_get_optional(&serdev->dev, "swctrl", qcadev->sw_ctrl = devm_gpiod_get_optional(&serdev->dev, "swctrl",

View File

@@ -905,7 +905,9 @@ int fsl_mc_device_add(struct fsl_mc_obj_desc *obj_desc,
error_cleanup_dev: error_cleanup_dev:
kfree(mc_dev->regions); kfree(mc_dev->regions);
if (mc_bus)
kfree(mc_bus); kfree(mc_bus);
else
kfree(mc_dev); kfree(mc_dev);
return error; return error;

View File

@@ -271,6 +271,8 @@ static struct clk_hw *raspberrypi_clk_register(struct raspberrypi_clk *rpi,
init.name = devm_kasprintf(rpi->dev, GFP_KERNEL, init.name = devm_kasprintf(rpi->dev, GFP_KERNEL,
"fw-clk-%s", "fw-clk-%s",
rpi_firmware_clk_names[id]); rpi_firmware_clk_names[id]);
if (!init.name)
return ERR_PTR(-ENOMEM);
init.ops = &raspberrypi_firmware_clk_ops; init.ops = &raspberrypi_firmware_clk_ops;
init.flags = CLK_GET_RATE_NOCACHE; init.flags = CLK_GET_RATE_NOCACHE;

View File

@@ -1694,6 +1694,9 @@ static struct clk_branch camcc_sys_tmr_clk = {
static struct gdsc bps_gdsc = { static struct gdsc bps_gdsc = {
.gdscr = 0x6004, .gdscr = 0x6004,
.en_rest_wait_val = 0x2,
.en_few_wait_val = 0x2,
.clk_dis_wait_val = 0xf,
.pd = { .pd = {
.name = "bps_gdsc", .name = "bps_gdsc",
}, },
@@ -1703,6 +1706,9 @@ static struct gdsc bps_gdsc = {
static struct gdsc ipe_0_gdsc = { static struct gdsc ipe_0_gdsc = {
.gdscr = 0x7004, .gdscr = 0x7004,
.en_rest_wait_val = 0x2,
.en_few_wait_val = 0x2,
.clk_dis_wait_val = 0xf,
.pd = { .pd = {
.name = "ipe_0_gdsc", .name = "ipe_0_gdsc",
}, },
@@ -1712,6 +1718,9 @@ static struct gdsc ipe_0_gdsc = {
static struct gdsc ife_0_gdsc = { static struct gdsc ife_0_gdsc = {
.gdscr = 0x9004, .gdscr = 0x9004,
.en_rest_wait_val = 0x2,
.en_few_wait_val = 0x2,
.clk_dis_wait_val = 0xf,
.pd = { .pd = {
.name = "ife_0_gdsc", .name = "ife_0_gdsc",
}, },
@@ -1720,6 +1729,9 @@ static struct gdsc ife_0_gdsc = {
static struct gdsc ife_1_gdsc = { static struct gdsc ife_1_gdsc = {
.gdscr = 0xa004, .gdscr = 0xa004,
.en_rest_wait_val = 0x2,
.en_few_wait_val = 0x2,
.clk_dis_wait_val = 0xf,
.pd = { .pd = {
.name = "ife_1_gdsc", .name = "ife_1_gdsc",
}, },
@@ -1728,6 +1740,9 @@ static struct gdsc ife_1_gdsc = {
static struct gdsc ife_2_gdsc = { static struct gdsc ife_2_gdsc = {
.gdscr = 0xb004, .gdscr = 0xb004,
.en_rest_wait_val = 0x2,
.en_few_wait_val = 0x2,
.clk_dis_wait_val = 0xf,
.pd = { .pd = {
.name = "ife_2_gdsc", .name = "ife_2_gdsc",
}, },
@@ -1736,6 +1751,9 @@ static struct gdsc ife_2_gdsc = {
static struct gdsc titan_top_gdsc = { static struct gdsc titan_top_gdsc = {
.gdscr = 0x14004, .gdscr = 0x14004,
.en_rest_wait_val = 0x2,
.en_few_wait_val = 0x2,
.clk_dis_wait_val = 0xf,
.pd = { .pd = {
.name = "titan_top_gdsc", .name = "titan_top_gdsc",
}, },

View File

@@ -680,6 +680,9 @@ static struct clk_branch disp_cc_xo_clk = {
static struct gdsc mdss_gdsc = { static struct gdsc mdss_gdsc = {
.gdscr = 0x1004, .gdscr = 0x1004,
.en_rest_wait_val = 0x2,
.en_few_wait_val = 0x2,
.clk_dis_wait_val = 0xf,
.pd = { .pd = {
.name = "mdss_gdsc", .name = "mdss_gdsc",
}, },

View File

@@ -432,7 +432,7 @@ static const struct parent_map gcc_xo_gpll0_gpll1a_gpll6_sleep_map[] = {
{ P_XO, 0 }, { P_XO, 0 },
{ P_GPLL0, 1 }, { P_GPLL0, 1 },
{ P_GPLL1_AUX, 2 }, { P_GPLL1_AUX, 2 },
{ P_GPLL6, 2 }, { P_GPLL6, 3 },
{ P_SLEEP_CLK, 6 }, { P_SLEEP_CLK, 6 },
}; };
@@ -1100,7 +1100,7 @@ static struct clk_rcg2 jpeg0_clk_src = {
}; };
static const struct freq_tbl ftbl_gcc_camss_mclk0_1_clk[] = { static const struct freq_tbl ftbl_gcc_camss_mclk0_1_clk[] = {
F(24000000, P_GPLL0, 1, 1, 45), F(24000000, P_GPLL6, 1, 1, 45),
F(66670000, P_GPLL0, 12, 0, 0), F(66670000, P_GPLL0, 12, 0, 0),
{ } { }
}; };

View File

@@ -2320,6 +2320,9 @@ static struct clk_branch gcc_video_xo_clk = {
static struct gdsc usb30_prim_gdsc = { static struct gdsc usb30_prim_gdsc = {
.gdscr = 0x1a004, .gdscr = 0x1a004,
.en_rest_wait_val = 0x2,
.en_few_wait_val = 0x2,
.clk_dis_wait_val = 0xf,
.pd = { .pd = {
.name = "usb30_prim_gdsc", .name = "usb30_prim_gdsc",
}, },
@@ -2328,6 +2331,9 @@ static struct gdsc usb30_prim_gdsc = {
static struct gdsc ufs_phy_gdsc = { static struct gdsc ufs_phy_gdsc = {
.gdscr = 0x3a004, .gdscr = 0x3a004,
.en_rest_wait_val = 0x2,
.en_few_wait_val = 0x2,
.clk_dis_wait_val = 0xf,
.pd = { .pd = {
.name = "ufs_phy_gdsc", .name = "ufs_phy_gdsc",
}, },

View File

@@ -412,6 +412,9 @@ static struct clk_branch gpu_cc_gx_vsense_clk = {
static struct gdsc gpu_cx_gdsc = { static struct gdsc gpu_cx_gdsc = {
.gdscr = 0x106c, .gdscr = 0x106c,
.gds_hw_ctrl = 0x1540, .gds_hw_ctrl = 0x1540,
.en_rest_wait_val = 0x2,
.en_few_wait_val = 0x2,
.clk_dis_wait_val = 0x8,
.pd = { .pd = {
.name = "gpu_cx_gdsc", .name = "gpu_cx_gdsc",
}, },
@@ -422,6 +425,9 @@ static struct gdsc gpu_cx_gdsc = {
static struct gdsc gpu_gx_gdsc = { static struct gdsc gpu_gx_gdsc = {
.gdscr = 0x100c, .gdscr = 0x100c,
.clamp_io_ctrl = 0x1508, .clamp_io_ctrl = 0x1508,
.en_rest_wait_val = 0x2,
.en_few_wait_val = 0x2,
.clk_dis_wait_val = 0x2,
.pd = { .pd = {
.name = "gpu_gx_gdsc", .name = "gpu_gx_gdsc",
.power_on = gdsc_gx_do_nothing_enable, .power_on = gdsc_gx_do_nothing_enable,

View File

@@ -3,12 +3,14 @@
* Copyright (c) 2021 Pengutronix, Oleksij Rempel <kernel@pengutronix.de> * Copyright (c) 2021 Pengutronix, Oleksij Rempel <kernel@pengutronix.de>
*/ */
#include <linux/cleanup.h>
#include <linux/counter.h> #include <linux/counter.h>
#include <linux/gpio/consumer.h> #include <linux/gpio/consumer.h>
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <linux/irq.h> #include <linux/irq.h>
#include <linux/mod_devicetable.h> #include <linux/mod_devicetable.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/mutex.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/types.h> #include <linux/types.h>
@@ -19,6 +21,7 @@ struct interrupt_cnt_priv {
struct gpio_desc *gpio; struct gpio_desc *gpio;
int irq; int irq;
bool enabled; bool enabled;
struct mutex lock;
struct counter_signal signals; struct counter_signal signals;
struct counter_synapse synapses; struct counter_synapse synapses;
struct counter_count cnts; struct counter_count cnts;
@@ -41,6 +44,8 @@ static int interrupt_cnt_enable_read(struct counter_device *counter,
{ {
struct interrupt_cnt_priv *priv = counter_priv(counter); struct interrupt_cnt_priv *priv = counter_priv(counter);
guard(mutex)(&priv->lock);
*enable = priv->enabled; *enable = priv->enabled;
return 0; return 0;
@@ -51,6 +56,8 @@ static int interrupt_cnt_enable_write(struct counter_device *counter,
{ {
struct interrupt_cnt_priv *priv = counter_priv(counter); struct interrupt_cnt_priv *priv = counter_priv(counter);
guard(mutex)(&priv->lock);
if (priv->enabled == enable) if (priv->enabled == enable)
return 0; return 0;
@@ -227,6 +234,8 @@ static int interrupt_cnt_probe(struct platform_device *pdev)
if (ret) if (ret)
return ret; return ret;
mutex_init(&priv->lock);
ret = devm_counter_add(dev, counter); ret = devm_counter_add(dev, counter);
if (ret < 0) if (ret < 0)
return dev_err_probe(dev, ret, "Failed to add counter\n"); return dev_err_probe(dev, ret, "Failed to add counter\n");

View File

@@ -659,7 +659,7 @@ static u64 get_max_boost_ratio(unsigned int cpu, u64 *nominal_freq)
nominal_perf = perf_caps.nominal_perf; nominal_perf = perf_caps.nominal_perf;
if (nominal_freq) if (nominal_freq)
*nominal_freq = perf_caps.nominal_freq; *nominal_freq = perf_caps.nominal_freq * 1000;
if (!highest_perf || !nominal_perf) { if (!highest_perf || !nominal_perf) {
pr_debug("CPU%d: highest or nominal performance missing\n", cpu); pr_debug("CPU%d: highest or nominal performance missing\n", cpu);

View File

@@ -275,13 +275,16 @@ theend_sgs:
} else { } else {
if (nr_sgs > 0) if (nr_sgs > 0)
dma_unmap_sg(ce->dev, areq->src, ns, DMA_TO_DEVICE); dma_unmap_sg(ce->dev, areq->src, ns, DMA_TO_DEVICE);
if (nr_sgd > 0)
dma_unmap_sg(ce->dev, areq->dst, nd, DMA_FROM_DEVICE); dma_unmap_sg(ce->dev, areq->dst, nd, DMA_FROM_DEVICE);
} }
theend_iv: theend_iv:
if (areq->iv && ivsize > 0) { if (areq->iv && ivsize > 0) {
if (rctx->addr_iv) if (!dma_mapping_error(ce->dev, rctx->addr_iv))
dma_unmap_single(ce->dev, rctx->addr_iv, rctx->ivlen, DMA_TO_DEVICE); dma_unmap_single(ce->dev, rctx->addr_iv, rctx->ivlen, DMA_TO_DEVICE);
offset = areq->cryptlen - ivsize; offset = areq->cryptlen - ivsize;
if (rctx->op_dir & CE_DECRYPTION) { if (rctx->op_dir & CE_DECRYPTION) {
memcpy(areq->iv, chan->backup_iv, ivsize); memcpy(areq->iv, chan->backup_iv, ivsize);

View File

@@ -343,9 +343,8 @@ int sun8i_ce_hash_run(struct crypto_engine *engine, void *breq)
u32 common; u32 common;
u64 byte_count; u64 byte_count;
__le32 *bf; __le32 *bf;
void *buf = NULL; void *buf, *result;
int j, i, todo; int j, i, todo;
void *result = NULL;
u64 bs; u64 bs;
int digestsize; int digestsize;
dma_addr_t addr_res, addr_pad; dma_addr_t addr_res, addr_pad;
@@ -365,14 +364,14 @@ int sun8i_ce_hash_run(struct crypto_engine *engine, void *breq)
buf = kzalloc(bs * 2, GFP_KERNEL | GFP_DMA); buf = kzalloc(bs * 2, GFP_KERNEL | GFP_DMA);
if (!buf) { if (!buf) {
err = -ENOMEM; err = -ENOMEM;
goto theend; goto err_out;
} }
bf = (__le32 *)buf; bf = (__le32 *)buf;
result = kzalloc(digestsize, GFP_KERNEL | GFP_DMA); result = kzalloc(digestsize, GFP_KERNEL | GFP_DMA);
if (!result) { if (!result) {
err = -ENOMEM; err = -ENOMEM;
goto theend; goto err_free_buf;
} }
flow = rctx->flow; flow = rctx->flow;
@@ -398,7 +397,7 @@ int sun8i_ce_hash_run(struct crypto_engine *engine, void *breq)
if (nr_sgs <= 0 || nr_sgs > MAX_SG) { if (nr_sgs <= 0 || nr_sgs > MAX_SG) {
dev_err(ce->dev, "Invalid sg number %d\n", nr_sgs); dev_err(ce->dev, "Invalid sg number %d\n", nr_sgs);
err = -EINVAL; err = -EINVAL;
goto theend; goto err_free_result;
} }
len = areq->nbytes; len = areq->nbytes;
@@ -411,7 +410,7 @@ int sun8i_ce_hash_run(struct crypto_engine *engine, void *breq)
if (len > 0) { if (len > 0) {
dev_err(ce->dev, "remaining len %d\n", len); dev_err(ce->dev, "remaining len %d\n", len);
err = -EINVAL; err = -EINVAL;
goto theend; goto err_unmap_src;
} }
addr_res = dma_map_single(ce->dev, result, digestsize, DMA_FROM_DEVICE); addr_res = dma_map_single(ce->dev, result, digestsize, DMA_FROM_DEVICE);
cet->t_dst[0].addr = cpu_to_le32(addr_res); cet->t_dst[0].addr = cpu_to_le32(addr_res);
@@ -419,7 +418,7 @@ int sun8i_ce_hash_run(struct crypto_engine *engine, void *breq)
if (dma_mapping_error(ce->dev, addr_res)) { if (dma_mapping_error(ce->dev, addr_res)) {
dev_err(ce->dev, "DMA map dest\n"); dev_err(ce->dev, "DMA map dest\n");
err = -EINVAL; err = -EINVAL;
goto theend; goto err_unmap_src;
} }
byte_count = areq->nbytes; byte_count = areq->nbytes;
@@ -441,7 +440,7 @@ int sun8i_ce_hash_run(struct crypto_engine *engine, void *breq)
} }
if (!j) { if (!j) {
err = -EINVAL; err = -EINVAL;
goto theend; goto err_unmap_result;
} }
addr_pad = dma_map_single(ce->dev, buf, j * 4, DMA_TO_DEVICE); addr_pad = dma_map_single(ce->dev, buf, j * 4, DMA_TO_DEVICE);
@@ -450,7 +449,7 @@ int sun8i_ce_hash_run(struct crypto_engine *engine, void *breq)
if (dma_mapping_error(ce->dev, addr_pad)) { if (dma_mapping_error(ce->dev, addr_pad)) {
dev_err(ce->dev, "DMA error on padding SG\n"); dev_err(ce->dev, "DMA error on padding SG\n");
err = -EINVAL; err = -EINVAL;
goto theend; goto err_unmap_result;
} }
if (ce->variant->hash_t_dlen_in_bits) if (ce->variant->hash_t_dlen_in_bits)
@@ -463,16 +462,25 @@ int sun8i_ce_hash_run(struct crypto_engine *engine, void *breq)
err = sun8i_ce_run_task(ce, flow, crypto_ahash_alg_name(tfm)); err = sun8i_ce_run_task(ce, flow, crypto_ahash_alg_name(tfm));
dma_unmap_single(ce->dev, addr_pad, j * 4, DMA_TO_DEVICE); dma_unmap_single(ce->dev, addr_pad, j * 4, DMA_TO_DEVICE);
dma_unmap_sg(ce->dev, areq->src, ns, DMA_TO_DEVICE);
err_unmap_result:
dma_unmap_single(ce->dev, addr_res, digestsize, DMA_FROM_DEVICE); dma_unmap_single(ce->dev, addr_res, digestsize, DMA_FROM_DEVICE);
if (!err)
memcpy(areq->result, result, algt->alg.hash.base.halg.digestsize); memcpy(areq->result, result, algt->alg.hash.base.halg.digestsize);
theend:
kfree(buf); err_unmap_src:
dma_unmap_sg(ce->dev, areq->src, ns, DMA_TO_DEVICE);
err_free_result:
kfree(result); kfree(result);
err_free_buf:
kfree(buf);
err_out:
local_bh_disable(); local_bh_disable();
crypto_finalize_hash_request(engine, breq, err); crypto_finalize_hash_request(engine, breq, err);
local_bh_enable(); local_bh_enable();
return 0; return 0;
} }

View File

@@ -293,8 +293,8 @@ struct sun8i_ce_hash_tfm_ctx {
* @flow: the flow to use for this request * @flow: the flow to use for this request
*/ */
struct sun8i_ce_hash_reqctx { struct sun8i_ce_hash_reqctx {
struct ahash_request fallback_req;
int flow; int flow;
struct ahash_request fallback_req; // keep at the end
}; };
/* /*

View File

@@ -141,7 +141,7 @@ static int sun8i_ss_setup_ivs(struct skcipher_request *areq)
/* we need to copy all IVs from source in case DMA is bi-directionnal */ /* we need to copy all IVs from source in case DMA is bi-directionnal */
while (sg && len) { while (sg && len) {
if (sg_dma_len(sg) == 0) { if (sg->length == 0) {
sg = sg_next(sg); sg = sg_next(sg);
continue; continue;
} }

View File

@@ -459,6 +459,9 @@ static int mv_cesa_skcipher_queue_req(struct skcipher_request *req,
struct mv_cesa_skcipher_req *creq = skcipher_request_ctx(req); struct mv_cesa_skcipher_req *creq = skcipher_request_ctx(req);
struct mv_cesa_engine *engine; struct mv_cesa_engine *engine;
if (!req->cryptlen)
return 0;
ret = mv_cesa_skcipher_req_init(req, tmpl); ret = mv_cesa_skcipher_req_init(req, tmpl);
if (ret) if (ret)
return ret; return ret;

View File

@@ -663,7 +663,7 @@ static int mv_cesa_ahash_dma_req_init(struct ahash_request *req)
if (ret) if (ret)
goto err_free_tdma; goto err_free_tdma;
if (iter.src.sg) { if (iter.base.len > iter.src.op_offset) {
/* /*
* Add all the new data, inserting an operation block and * Add all the new data, inserting an operation block and
* launch command between each full SRAM block-worth of * launch command between each full SRAM block-worth of

View File

@@ -5537,7 +5537,8 @@ static int udma_probe(struct platform_device *pdev)
uc->config.dir = DMA_MEM_TO_MEM; uc->config.dir = DMA_MEM_TO_MEM;
uc->name = devm_kasprintf(dev, GFP_KERNEL, "%s chan%d", uc->name = devm_kasprintf(dev, GFP_KERNEL, "%s chan%d",
dev_name(dev), i); dev_name(dev), i);
if (!uc->name)
return -ENOMEM;
vchan_init(&uc->vc, &ud->ddev); vchan_init(&uc->vc, &ud->ddev);
/* Use custom vchan completion handling */ /* Use custom vchan completion handling */
tasklet_setup(&uc->vc.task, udma_vchan_complete); tasklet_setup(&uc->vc.task, udma_vchan_complete);

View File

@@ -99,7 +99,7 @@ static u32 offsets_demand2_spr[] = {0x22c70, 0x22d80, 0x22f18, 0x22d58, 0x22c64,
static u32 offsets_demand_spr_hbm0[] = {0x2a54, 0x2a60, 0x2b10, 0x2a58, 0x2a5c, 0x0ee0}; static u32 offsets_demand_spr_hbm0[] = {0x2a54, 0x2a60, 0x2b10, 0x2a58, 0x2a5c, 0x0ee0};
static u32 offsets_demand_spr_hbm1[] = {0x2e54, 0x2e60, 0x2f10, 0x2e58, 0x2e5c, 0x0fb0}; static u32 offsets_demand_spr_hbm1[] = {0x2e54, 0x2e60, 0x2f10, 0x2e58, 0x2e5c, 0x0fb0};
static void __enable_retry_rd_err_log(struct skx_imc *imc, int chan, bool enable, static void __enable_retry_rd_err_log(struct skx_imc *imc, int chan, bool enable, u32 *rrl_ctl,
u32 *offsets_scrub, u32 *offsets_demand, u32 *offsets_scrub, u32 *offsets_demand,
u32 *offsets_demand2) u32 *offsets_demand2)
{ {
@@ -112,10 +112,10 @@ static void __enable_retry_rd_err_log(struct skx_imc *imc, int chan, bool enable
if (enable) { if (enable) {
/* Save default configurations */ /* Save default configurations */
imc->chan[chan].retry_rd_err_log_s = s; rrl_ctl[0] = s;
imc->chan[chan].retry_rd_err_log_d = d; rrl_ctl[1] = d;
if (offsets_demand2) if (offsets_demand2)
imc->chan[chan].retry_rd_err_log_d2 = d2; rrl_ctl[2] = d2;
s &= ~RETRY_RD_ERR_LOG_NOOVER_UC; s &= ~RETRY_RD_ERR_LOG_NOOVER_UC;
s |= RETRY_RD_ERR_LOG_EN; s |= RETRY_RD_ERR_LOG_EN;
@@ -129,25 +129,25 @@ static void __enable_retry_rd_err_log(struct skx_imc *imc, int chan, bool enable
} }
} else { } else {
/* Restore default configurations */ /* Restore default configurations */
if (imc->chan[chan].retry_rd_err_log_s & RETRY_RD_ERR_LOG_UC) if (rrl_ctl[0] & RETRY_RD_ERR_LOG_UC)
s |= RETRY_RD_ERR_LOG_UC; s |= RETRY_RD_ERR_LOG_UC;
if (imc->chan[chan].retry_rd_err_log_s & RETRY_RD_ERR_LOG_NOOVER) if (rrl_ctl[0] & RETRY_RD_ERR_LOG_NOOVER)
s |= RETRY_RD_ERR_LOG_NOOVER; s |= RETRY_RD_ERR_LOG_NOOVER;
if (!(imc->chan[chan].retry_rd_err_log_s & RETRY_RD_ERR_LOG_EN)) if (!(rrl_ctl[0] & RETRY_RD_ERR_LOG_EN))
s &= ~RETRY_RD_ERR_LOG_EN; s &= ~RETRY_RD_ERR_LOG_EN;
if (imc->chan[chan].retry_rd_err_log_d & RETRY_RD_ERR_LOG_UC) if (rrl_ctl[1] & RETRY_RD_ERR_LOG_UC)
d |= RETRY_RD_ERR_LOG_UC; d |= RETRY_RD_ERR_LOG_UC;
if (imc->chan[chan].retry_rd_err_log_d & RETRY_RD_ERR_LOG_NOOVER) if (rrl_ctl[1] & RETRY_RD_ERR_LOG_NOOVER)
d |= RETRY_RD_ERR_LOG_NOOVER; d |= RETRY_RD_ERR_LOG_NOOVER;
if (!(imc->chan[chan].retry_rd_err_log_d & RETRY_RD_ERR_LOG_EN)) if (!(rrl_ctl[1] & RETRY_RD_ERR_LOG_EN))
d &= ~RETRY_RD_ERR_LOG_EN; d &= ~RETRY_RD_ERR_LOG_EN;
if (offsets_demand2) { if (offsets_demand2) {
if (imc->chan[chan].retry_rd_err_log_d2 & RETRY_RD_ERR_LOG_UC) if (rrl_ctl[2] & RETRY_RD_ERR_LOG_UC)
d2 |= RETRY_RD_ERR_LOG_UC; d2 |= RETRY_RD_ERR_LOG_UC;
if (!(imc->chan[chan].retry_rd_err_log_d2 & RETRY_RD_ERR_LOG_NOOVER)) if (!(rrl_ctl[2] & RETRY_RD_ERR_LOG_NOOVER))
d2 &= ~RETRY_RD_ERR_LOG_NOOVER; d2 &= ~RETRY_RD_ERR_LOG_NOOVER;
if (!(imc->chan[chan].retry_rd_err_log_d2 & RETRY_RD_ERR_LOG_EN)) if (!(rrl_ctl[2] & RETRY_RD_ERR_LOG_EN))
d2 &= ~RETRY_RD_ERR_LOG_EN; d2 &= ~RETRY_RD_ERR_LOG_EN;
} }
} }
@@ -161,6 +161,7 @@ static void __enable_retry_rd_err_log(struct skx_imc *imc, int chan, bool enable
static void enable_retry_rd_err_log(bool enable) static void enable_retry_rd_err_log(bool enable)
{ {
int i, j, imc_num, chan_num; int i, j, imc_num, chan_num;
struct skx_channel *chan;
struct skx_imc *imc; struct skx_imc *imc;
struct skx_dev *d; struct skx_dev *d;
@@ -175,8 +176,9 @@ static void enable_retry_rd_err_log(bool enable)
if (!imc->mbase) if (!imc->mbase)
continue; continue;
chan = d->imc[i].chan;
for (j = 0; j < chan_num; j++) for (j = 0; j < chan_num; j++)
__enable_retry_rd_err_log(imc, j, enable, __enable_retry_rd_err_log(imc, j, enable, chan[j].rrl_ctl[0],
res_cfg->offsets_scrub, res_cfg->offsets_scrub,
res_cfg->offsets_demand, res_cfg->offsets_demand,
res_cfg->offsets_demand2); res_cfg->offsets_demand2);
@@ -190,12 +192,13 @@ static void enable_retry_rd_err_log(bool enable)
if (!imc->mbase || !imc->hbm_mc) if (!imc->mbase || !imc->hbm_mc)
continue; continue;
chan = d->imc[i].chan;
for (j = 0; j < chan_num; j++) { for (j = 0; j < chan_num; j++) {
__enable_retry_rd_err_log(imc, j, enable, __enable_retry_rd_err_log(imc, j, enable, chan[j].rrl_ctl[0],
res_cfg->offsets_scrub_hbm0, res_cfg->offsets_scrub_hbm0,
res_cfg->offsets_demand_hbm0, res_cfg->offsets_demand_hbm0,
NULL); NULL);
__enable_retry_rd_err_log(imc, j, enable, __enable_retry_rd_err_log(imc, j, enable, chan[j].rrl_ctl[1],
res_cfg->offsets_scrub_hbm1, res_cfg->offsets_scrub_hbm1,
res_cfg->offsets_demand_hbm1, res_cfg->offsets_demand_hbm1,
NULL); NULL);

View File

@@ -115,6 +115,7 @@ EXPORT_SYMBOL_GPL(skx_adxl_get);
void skx_adxl_put(void) void skx_adxl_put(void)
{ {
adxl_component_count = 0;
kfree(adxl_values); kfree(adxl_values);
kfree(adxl_msg); kfree(adxl_msg);
} }

View File

@@ -80,6 +80,9 @@
*/ */
#define MCACOD_EXT_MEM_ERR 0x280 #define MCACOD_EXT_MEM_ERR 0x280
/* Max RRL register sets per {,sub-,pseudo-}channel. */
#define NUM_RRL_SET 3
/* /*
* Each cpu socket contains some pci devices that provide global * Each cpu socket contains some pci devices that provide global
* information, and also some that are local to each of the two * information, and also some that are local to each of the two
@@ -118,9 +121,11 @@ struct skx_dev {
struct skx_channel { struct skx_channel {
struct pci_dev *cdev; struct pci_dev *cdev;
struct pci_dev *edev; struct pci_dev *edev;
u32 retry_rd_err_log_s; /*
u32 retry_rd_err_log_d; * Two groups of RRL control registers per channel to save default RRL
u32 retry_rd_err_log_d2; * settings of two {sub-,pseudo-}channels in Linux RRL control mode.
*/
u32 rrl_ctl[2][NUM_RRL_SET];
struct skx_dimm { struct skx_dimm {
u8 close_pg; u8 close_pg;
u8 bank_xor_enable; u8 bank_xor_enable;

View File

@@ -40,7 +40,6 @@ config ARM_SCPI_POWER_DOMAIN
config ARM_SDE_INTERFACE config ARM_SDE_INTERFACE
bool "ARM Software Delegated Exception Interface (SDEI)" bool "ARM Software Delegated Exception Interface (SDEI)"
depends on ARM64 depends on ARM64
depends on ACPI_APEI_GHES
help help
The Software Delegated Exception Interface (SDEI) is an ARM The Software Delegated Exception Interface (SDEI) is an ARM
standard for registering callbacks from the platform firmware standard for registering callbacks from the platform firmware

View File

@@ -1062,13 +1062,12 @@ static bool __init sdei_present_acpi(void)
return true; return true;
} }
void __init sdei_init(void) void __init acpi_sdei_init(void)
{ {
struct platform_device *pdev; struct platform_device *pdev;
int ret; int ret;
ret = platform_driver_register(&sdei_driver); if (!sdei_present_acpi())
if (ret || !sdei_present_acpi())
return; return;
pdev = platform_device_register_simple(sdei_driver.driver.name, pdev = platform_device_register_simple(sdei_driver.driver.name,
@@ -1081,6 +1080,12 @@ void __init sdei_init(void)
} }
} }
static int __init sdei_init(void)
{
return platform_driver_register(&sdei_driver);
}
arch_initcall(sdei_init);
int sdei_event_handler(struct pt_regs *regs, int sdei_event_handler(struct pt_regs *regs,
struct sdei_registered_event *arg) struct sdei_registered_event *arg)
{ {

View File

@@ -561,6 +561,7 @@ efi_status_t efi_load_initrd_cmdline(efi_loaded_image_t *image,
* @image: EFI loaded image protocol * @image: EFI loaded image protocol
* @soft_limit: preferred address for loading the initrd * @soft_limit: preferred address for loading the initrd
* @hard_limit: upper limit address for loading the initrd * @hard_limit: upper limit address for loading the initrd
* @out: pointer to store the address of the initrd table
* *
* Return: status code * Return: status code
*/ */

View File

@@ -771,8 +771,10 @@ int __init psci_dt_init(void)
np = of_find_matching_node_and_match(NULL, psci_of_match, &matched_np); np = of_find_matching_node_and_match(NULL, psci_of_match, &matched_np);
if (!np || !of_device_is_available(np)) if (!np || !of_device_is_available(np)) {
of_node_put(np);
return -ENODEV; return -ENODEV;
}
init_fn = (psci_initcall_t)matched_np->data; init_fn = (psci_initcall_t)matched_np->data;
ret = init_fn(np); ret = init_fn(np);

View File

@@ -253,6 +253,7 @@ static void fpga_mgr_test_img_load_sgt(struct kunit *test)
img_buf = init_test_buffer(test, IMAGE_SIZE); img_buf = init_test_buffer(test, IMAGE_SIZE);
sgt = kunit_kzalloc(test, sizeof(*sgt), GFP_KERNEL); sgt = kunit_kzalloc(test, sizeof(*sgt), GFP_KERNEL);
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, sgt);
ret = sg_alloc_table(sgt, 1, GFP_KERNEL); ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
KUNIT_ASSERT_EQ(test, ret, 0); KUNIT_ASSERT_EQ(test, ret, 0);
sg_init_one(sgt->sgl, img_buf, IMAGE_SIZE); sg_init_one(sgt->sgl, img_buf, IMAGE_SIZE);

View File

@@ -610,22 +610,16 @@ static void dm_crtc_high_irq(void *interrupt_params)
spin_lock_irqsave(&adev_to_drm(adev)->event_lock, flags); spin_lock_irqsave(&adev_to_drm(adev)->event_lock, flags);
if (acrtc->dm_irq_params.stream && if (acrtc->dm_irq_params.stream &&
acrtc->dm_irq_params.vrr_params.supported) { acrtc->dm_irq_params.vrr_params.supported &&
bool replay_en = acrtc->dm_irq_params.stream->link->replay_settings.replay_feature_enabled; acrtc->dm_irq_params.freesync_config.state ==
bool psr_en = acrtc->dm_irq_params.stream->link->psr_settings.psr_feature_enabled; VRR_STATE_ACTIVE_VARIABLE) {
bool fs_active_var_en = acrtc->dm_irq_params.freesync_config.state == VRR_STATE_ACTIVE_VARIABLE;
mod_freesync_handle_v_update(adev->dm.freesync_module, mod_freesync_handle_v_update(adev->dm.freesync_module,
acrtc->dm_irq_params.stream, acrtc->dm_irq_params.stream,
&acrtc->dm_irq_params.vrr_params); &acrtc->dm_irq_params.vrr_params);
/* update vmin_vmax only if freesync is enabled, or only if PSR and REPLAY are disabled */ dc_stream_adjust_vmin_vmax(adev->dm.dc, acrtc->dm_irq_params.stream,
if (fs_active_var_en || (!fs_active_var_en && !replay_en && !psr_en)) {
dc_stream_adjust_vmin_vmax(adev->dm.dc,
acrtc->dm_irq_params.stream,
&acrtc->dm_irq_params.vrr_params.adjust); &acrtc->dm_irq_params.vrr_params.adjust);
} }
}
/* /*
* If there aren't any active_planes then DCH HUBP may be clock-gated. * If there aren't any active_planes then DCH HUBP may be clock-gated.

View File

@@ -144,6 +144,10 @@ int atomctrl_initialize_mc_reg_table(
vram_info = (ATOM_VRAM_INFO_HEADER_V2_1 *) vram_info = (ATOM_VRAM_INFO_HEADER_V2_1 *)
smu_atom_get_data_table(hwmgr->adev, smu_atom_get_data_table(hwmgr->adev,
GetIndexIntoMasterTable(DATA, VRAM_Info), &size, &frev, &crev); GetIndexIntoMasterTable(DATA, VRAM_Info), &size, &frev, &crev);
if (!vram_info) {
pr_err("Could not retrieve the VramInfo table!");
return -EINVAL;
}
if (module_index >= vram_info->ucNumOfVRAMModule) { if (module_index >= vram_info->ucNumOfVRAMModule) {
pr_err("Invalid VramInfo table."); pr_err("Invalid VramInfo table.");
@@ -181,6 +185,10 @@ int atomctrl_initialize_mc_reg_table_v2_2(
vram_info = (ATOM_VRAM_INFO_HEADER_V2_2 *) vram_info = (ATOM_VRAM_INFO_HEADER_V2_2 *)
smu_atom_get_data_table(hwmgr->adev, smu_atom_get_data_table(hwmgr->adev,
GetIndexIntoMasterTable(DATA, VRAM_Info), &size, &frev, &crev); GetIndexIntoMasterTable(DATA, VRAM_Info), &size, &frev, &crev);
if (!vram_info) {
pr_err("Could not retrieve the VramInfo table!");
return -EINVAL;
}
if (module_index >= vram_info->ucNumOfVRAMModule) { if (module_index >= vram_info->ucNumOfVRAMModule) {
pr_err("Invalid VramInfo table."); pr_err("Invalid VramInfo table.");

View File

@@ -962,7 +962,11 @@ retry:
} }
} }
return lt9611uxc_audio_init(dev, lt9611uxc); ret = lt9611uxc_audio_init(dev, lt9611uxc);
if (ret)
goto err_remove_bridge;
return 0;
err_remove_bridge: err_remove_bridge:
free_irq(client->irq, lt9611uxc); free_irq(client->irq, lt9611uxc);

View File

@@ -431,7 +431,7 @@ static int mtk_drm_kms_init(struct drm_device *drm)
ret = drmm_mode_config_init(drm); ret = drmm_mode_config_init(drm);
if (ret) if (ret)
goto put_mutex_dev; return ret;
drm->mode_config.min_width = 64; drm->mode_config.min_width = 64;
drm->mode_config.min_height = 64; drm->mode_config.min_height = 64;
@@ -449,8 +449,11 @@ static int mtk_drm_kms_init(struct drm_device *drm)
for (i = 0; i < private->data->mmsys_dev_num; i++) { for (i = 0; i < private->data->mmsys_dev_num; i++) {
drm->dev_private = private->all_drm_private[i]; drm->dev_private = private->all_drm_private[i];
ret = component_bind_all(private->all_drm_private[i]->dev, drm); ret = component_bind_all(private->all_drm_private[i]->dev, drm);
if (ret) if (ret) {
goto put_mutex_dev; while (--i >= 0)
component_unbind_all(private->all_drm_private[i]->dev, drm);
return ret;
}
} }
/* /*
@@ -532,9 +535,6 @@ static int mtk_drm_kms_init(struct drm_device *drm)
err_component_unbind: err_component_unbind:
for (i = 0; i < private->data->mmsys_dev_num; i++) for (i = 0; i < private->data->mmsys_dev_num; i++)
component_unbind_all(private->all_drm_private[i]->dev, drm); component_unbind_all(private->all_drm_private[i]->dev, drm);
put_mutex_dev:
for (i = 0; i < private->data->mmsys_dev_num; i++)
put_device(private->all_drm_private[i]->mutex_dev);
return ret; return ret;
} }
@@ -608,8 +608,10 @@ static int mtk_drm_bind(struct device *dev)
return 0; return 0;
drm = drm_dev_alloc(&mtk_drm_driver, dev); drm = drm_dev_alloc(&mtk_drm_driver, dev);
if (IS_ERR(drm)) if (IS_ERR(drm)) {
return PTR_ERR(drm); ret = PTR_ERR(drm);
goto err_put_dev;
}
private->drm_master = true; private->drm_master = true;
drm->dev_private = private; drm->dev_private = private;
@@ -635,18 +637,31 @@ err_free:
drm_dev_put(drm); drm_dev_put(drm);
for (i = 0; i < private->data->mmsys_dev_num; i++) for (i = 0; i < private->data->mmsys_dev_num; i++)
private->all_drm_private[i]->drm = NULL; private->all_drm_private[i]->drm = NULL;
err_put_dev:
for (i = 0; i < private->data->mmsys_dev_num; i++) {
/* For device_find_child in mtk_drm_get_all_priv() */
put_device(private->all_drm_private[i]->dev);
}
put_device(private->mutex_dev);
return ret; return ret;
} }
static void mtk_drm_unbind(struct device *dev) static void mtk_drm_unbind(struct device *dev)
{ {
struct mtk_drm_private *private = dev_get_drvdata(dev); struct mtk_drm_private *private = dev_get_drvdata(dev);
int i;
/* for multi mmsys dev, unregister drm dev in mmsys master */ /* for multi mmsys dev, unregister drm dev in mmsys master */
if (private->drm_master) { if (private->drm_master) {
drm_dev_unregister(private->drm); drm_dev_unregister(private->drm);
mtk_drm_kms_deinit(private->drm); mtk_drm_kms_deinit(private->drm);
drm_dev_put(private->drm); drm_dev_put(private->drm);
for (i = 0; i < private->data->mmsys_dev_num; i++) {
/* For device_find_child in mtk_drm_get_all_priv() */
put_device(private->all_drm_private[i]->dev);
}
put_device(private->mutex_dev);
} }
private->mtk_drm_bound = false; private->mtk_drm_bound = false;
private->drm_master = false; private->drm_master = false;

View File

@@ -168,7 +168,7 @@ static const struct meson_drm_soc_attr meson_drm_soc_attrs[] = {
/* S805X/S805Y HDMI PLL won't lock for HDMI PHY freq > 1,65GHz */ /* S805X/S805Y HDMI PLL won't lock for HDMI PHY freq > 1,65GHz */
{ {
.limits = { .limits = {
.max_hdmi_phy_freq = 1650000, .max_hdmi_phy_freq = 1650000000,
}, },
.attrs = (const struct soc_device_attribute []) { .attrs = (const struct soc_device_attribute []) {
{ .soc_id = "GXL (S805*)", }, { .soc_id = "GXL (S805*)", },

View File

@@ -37,7 +37,7 @@ struct meson_drm_match_data {
}; };
struct meson_drm_soc_limits { struct meson_drm_soc_limits {
unsigned int max_hdmi_phy_freq; unsigned long long max_hdmi_phy_freq;
}; };
struct meson_drm { struct meson_drm {

View File

@@ -70,12 +70,12 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
{ {
struct meson_drm *priv = encoder_hdmi->priv; struct meson_drm *priv = encoder_hdmi->priv;
int vic = drm_match_cea_mode(mode); int vic = drm_match_cea_mode(mode);
unsigned int phy_freq; unsigned long long phy_freq;
unsigned int vclk_freq; unsigned long long vclk_freq;
unsigned int venc_freq; unsigned long long venc_freq;
unsigned int hdmi_freq; unsigned long long hdmi_freq;
vclk_freq = mode->clock; vclk_freq = mode->clock * 1000ULL;
/* For 420, pixel clock is half unlike venc clock */ /* For 420, pixel clock is half unlike venc clock */
if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24) if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)
@@ -107,7 +107,8 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
if (mode->flags & DRM_MODE_FLAG_DBLCLK) if (mode->flags & DRM_MODE_FLAG_DBLCLK)
venc_freq /= 2; venc_freq /= 2;
dev_dbg(priv->dev, "vclk:%d phy=%d venc=%d hdmi=%d enci=%d\n", dev_dbg(priv->dev,
"phy:%lluHz vclk=%lluHz venc=%lluHz hdmi=%lluHz enci=%d\n",
phy_freq, vclk_freq, venc_freq, hdmi_freq, phy_freq, vclk_freq, venc_freq, hdmi_freq,
priv->venc.hdmi_use_enci); priv->venc.hdmi_use_enci);
@@ -122,10 +123,11 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge); struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
struct meson_drm *priv = encoder_hdmi->priv; struct meson_drm *priv = encoder_hdmi->priv;
bool is_hdmi2_sink = display_info->hdmi.scdc.supported; bool is_hdmi2_sink = display_info->hdmi.scdc.supported;
unsigned int phy_freq; unsigned long long clock = mode->clock * 1000ULL;
unsigned int vclk_freq; unsigned long long phy_freq;
unsigned int venc_freq; unsigned long long vclk_freq;
unsigned int hdmi_freq; unsigned long long venc_freq;
unsigned long long hdmi_freq;
int vic = drm_match_cea_mode(mode); int vic = drm_match_cea_mode(mode);
enum drm_mode_status status; enum drm_mode_status status;
@@ -144,12 +146,12 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
if (status != MODE_OK) if (status != MODE_OK)
return status; return status;
return meson_vclk_dmt_supported_freq(priv, mode->clock); return meson_vclk_dmt_supported_freq(priv, clock);
/* Check against supported VIC modes */ /* Check against supported VIC modes */
} else if (!meson_venc_hdmi_supported_vic(vic)) } else if (!meson_venc_hdmi_supported_vic(vic))
return MODE_BAD; return MODE_BAD;
vclk_freq = mode->clock; vclk_freq = clock;
/* For 420, pixel clock is half unlike venc clock */ /* For 420, pixel clock is half unlike venc clock */
if (drm_mode_is_420_only(display_info, mode) || if (drm_mode_is_420_only(display_info, mode) ||
@@ -179,7 +181,8 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
if (mode->flags & DRM_MODE_FLAG_DBLCLK) if (mode->flags & DRM_MODE_FLAG_DBLCLK)
venc_freq /= 2; venc_freq /= 2;
dev_dbg(priv->dev, "%s: vclk:%d phy=%d venc=%d hdmi=%d\n", dev_dbg(priv->dev,
"%s: vclk:%lluHz phy=%lluHz venc=%lluHz hdmi=%lluHz\n",
__func__, phy_freq, vclk_freq, venc_freq, hdmi_freq); __func__, phy_freq, vclk_freq, venc_freq, hdmi_freq);
return meson_vclk_vic_supported_freq(priv, phy_freq, vclk_freq); return meson_vclk_vic_supported_freq(priv, phy_freq, vclk_freq);

View File

@@ -110,7 +110,7 @@
#define HDMI_PLL_LOCK BIT(31) #define HDMI_PLL_LOCK BIT(31)
#define HDMI_PLL_LOCK_G12A (3 << 30) #define HDMI_PLL_LOCK_G12A (3 << 30)
#define FREQ_1000_1001(_freq) DIV_ROUND_CLOSEST(_freq * 1000, 1001) #define FREQ_1000_1001(_freq) DIV_ROUND_CLOSEST_ULL((_freq) * 1000ULL, 1001ULL)
/* VID PLL Dividers */ /* VID PLL Dividers */
enum { enum {
@@ -360,11 +360,11 @@ enum {
}; };
struct meson_vclk_params { struct meson_vclk_params {
unsigned int pll_freq; unsigned long long pll_freq;
unsigned int phy_freq; unsigned long long phy_freq;
unsigned int vclk_freq; unsigned long long vclk_freq;
unsigned int venc_freq; unsigned long long venc_freq;
unsigned int pixel_freq; unsigned long long pixel_freq;
unsigned int pll_od1; unsigned int pll_od1;
unsigned int pll_od2; unsigned int pll_od2;
unsigned int pll_od3; unsigned int pll_od3;
@@ -372,11 +372,11 @@ struct meson_vclk_params {
unsigned int vclk_div; unsigned int vclk_div;
} params[] = { } params[] = {
[MESON_VCLK_HDMI_ENCI_54000] = { [MESON_VCLK_HDMI_ENCI_54000] = {
.pll_freq = 4320000, .pll_freq = 4320000000,
.phy_freq = 270000, .phy_freq = 270000000,
.vclk_freq = 54000, .vclk_freq = 54000000,
.venc_freq = 54000, .venc_freq = 54000000,
.pixel_freq = 54000, .pixel_freq = 54000000,
.pll_od1 = 4, .pll_od1 = 4,
.pll_od2 = 4, .pll_od2 = 4,
.pll_od3 = 1, .pll_od3 = 1,
@@ -384,11 +384,11 @@ struct meson_vclk_params {
.vclk_div = 1, .vclk_div = 1,
}, },
[MESON_VCLK_HDMI_DDR_54000] = { [MESON_VCLK_HDMI_DDR_54000] = {
.pll_freq = 4320000, .pll_freq = 4320000000,
.phy_freq = 270000, .phy_freq = 270000000,
.vclk_freq = 54000, .vclk_freq = 54000000,
.venc_freq = 54000, .venc_freq = 54000000,
.pixel_freq = 27000, .pixel_freq = 27000000,
.pll_od1 = 4, .pll_od1 = 4,
.pll_od2 = 4, .pll_od2 = 4,
.pll_od3 = 1, .pll_od3 = 1,
@@ -396,11 +396,11 @@ struct meson_vclk_params {
.vclk_div = 1, .vclk_div = 1,
}, },
[MESON_VCLK_HDMI_DDR_148500] = { [MESON_VCLK_HDMI_DDR_148500] = {
.pll_freq = 2970000, .pll_freq = 2970000000,
.phy_freq = 742500, .phy_freq = 742500000,
.vclk_freq = 148500, .vclk_freq = 148500000,
.venc_freq = 148500, .venc_freq = 148500000,
.pixel_freq = 74250, .pixel_freq = 74250000,
.pll_od1 = 4, .pll_od1 = 4,
.pll_od2 = 1, .pll_od2 = 1,
.pll_od3 = 1, .pll_od3 = 1,
@@ -408,11 +408,11 @@ struct meson_vclk_params {
.vclk_div = 1, .vclk_div = 1,
}, },
[MESON_VCLK_HDMI_74250] = { [MESON_VCLK_HDMI_74250] = {
.pll_freq = 2970000, .pll_freq = 2970000000,
.phy_freq = 742500, .phy_freq = 742500000,
.vclk_freq = 74250, .vclk_freq = 74250000,
.venc_freq = 74250, .venc_freq = 74250000,
.pixel_freq = 74250, .pixel_freq = 74250000,
.pll_od1 = 2, .pll_od1 = 2,
.pll_od2 = 2, .pll_od2 = 2,
.pll_od3 = 2, .pll_od3 = 2,
@@ -420,11 +420,11 @@ struct meson_vclk_params {
.vclk_div = 1, .vclk_div = 1,
}, },
[MESON_VCLK_HDMI_148500] = { [MESON_VCLK_HDMI_148500] = {
.pll_freq = 2970000, .pll_freq = 2970000000,
.phy_freq = 1485000, .phy_freq = 1485000000,
.vclk_freq = 148500, .vclk_freq = 148500000,
.venc_freq = 148500, .venc_freq = 148500000,
.pixel_freq = 148500, .pixel_freq = 148500000,
.pll_od1 = 1, .pll_od1 = 1,
.pll_od2 = 2, .pll_od2 = 2,
.pll_od3 = 2, .pll_od3 = 2,
@@ -432,11 +432,11 @@ struct meson_vclk_params {
.vclk_div = 1, .vclk_div = 1,
}, },
[MESON_VCLK_HDMI_297000] = { [MESON_VCLK_HDMI_297000] = {
.pll_freq = 5940000, .pll_freq = 5940000000,
.phy_freq = 2970000, .phy_freq = 2970000000,
.venc_freq = 297000, .venc_freq = 297000000,
.vclk_freq = 297000, .vclk_freq = 297000000,
.pixel_freq = 297000, .pixel_freq = 297000000,
.pll_od1 = 2, .pll_od1 = 2,
.pll_od2 = 1, .pll_od2 = 1,
.pll_od3 = 1, .pll_od3 = 1,
@@ -444,11 +444,11 @@ struct meson_vclk_params {
.vclk_div = 2, .vclk_div = 2,
}, },
[MESON_VCLK_HDMI_594000] = { [MESON_VCLK_HDMI_594000] = {
.pll_freq = 5940000, .pll_freq = 5940000000,
.phy_freq = 5940000, .phy_freq = 5940000000,
.venc_freq = 594000, .venc_freq = 594000000,
.vclk_freq = 594000, .vclk_freq = 594000000,
.pixel_freq = 594000, .pixel_freq = 594000000,
.pll_od1 = 1, .pll_od1 = 1,
.pll_od2 = 1, .pll_od2 = 1,
.pll_od3 = 2, .pll_od3 = 2,
@@ -456,11 +456,11 @@ struct meson_vclk_params {
.vclk_div = 1, .vclk_div = 1,
}, },
[MESON_VCLK_HDMI_594000_YUV420] = { [MESON_VCLK_HDMI_594000_YUV420] = {
.pll_freq = 5940000, .pll_freq = 5940000000,
.phy_freq = 2970000, .phy_freq = 2970000000,
.venc_freq = 594000, .venc_freq = 594000000,
.vclk_freq = 594000, .vclk_freq = 594000000,
.pixel_freq = 297000, .pixel_freq = 297000000,
.pll_od1 = 2, .pll_od1 = 2,
.pll_od2 = 1, .pll_od2 = 1,
.pll_od3 = 1, .pll_od3 = 1,
@@ -617,16 +617,16 @@ static void meson_hdmi_pll_set_params(struct meson_drm *priv, unsigned int m,
3 << 20, pll_od_to_reg(od3) << 20); 3 << 20, pll_od_to_reg(od3) << 20);
} }
#define XTAL_FREQ 24000 #define XTAL_FREQ (24 * 1000 * 1000)
static unsigned int meson_hdmi_pll_get_m(struct meson_drm *priv, static unsigned int meson_hdmi_pll_get_m(struct meson_drm *priv,
unsigned int pll_freq) unsigned long long pll_freq)
{ {
/* The GXBB PLL has a /2 pre-multiplier */ /* The GXBB PLL has a /2 pre-multiplier */
if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXBB)) if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXBB))
pll_freq /= 2; pll_freq = DIV_ROUND_DOWN_ULL(pll_freq, 2);
return pll_freq / XTAL_FREQ; return DIV_ROUND_DOWN_ULL(pll_freq, XTAL_FREQ);
} }
#define HDMI_FRAC_MAX_GXBB 4096 #define HDMI_FRAC_MAX_GXBB 4096
@@ -635,12 +635,13 @@ static unsigned int meson_hdmi_pll_get_m(struct meson_drm *priv,
static unsigned int meson_hdmi_pll_get_frac(struct meson_drm *priv, static unsigned int meson_hdmi_pll_get_frac(struct meson_drm *priv,
unsigned int m, unsigned int m,
unsigned int pll_freq) unsigned long long pll_freq)
{ {
unsigned int parent_freq = XTAL_FREQ; unsigned long long parent_freq = XTAL_FREQ;
unsigned int frac_max = HDMI_FRAC_MAX_GXL; unsigned int frac_max = HDMI_FRAC_MAX_GXL;
unsigned int frac_m; unsigned int frac_m;
unsigned int frac; unsigned int frac;
u32 remainder;
/* The GXBB PLL has a /2 pre-multiplier and a larger FRAC width */ /* The GXBB PLL has a /2 pre-multiplier and a larger FRAC width */
if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXBB)) { if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXBB)) {
@@ -652,11 +653,11 @@ static unsigned int meson_hdmi_pll_get_frac(struct meson_drm *priv,
frac_max = HDMI_FRAC_MAX_G12A; frac_max = HDMI_FRAC_MAX_G12A;
/* We can have a perfect match !*/ /* We can have a perfect match !*/
if (pll_freq / m == parent_freq && if (div_u64_rem(pll_freq, m, &remainder) == parent_freq &&
pll_freq % m == 0) remainder == 0)
return 0; return 0;
frac = div_u64((u64)pll_freq * (u64)frac_max, parent_freq); frac = mul_u64_u64_div_u64(pll_freq, frac_max, parent_freq);
frac_m = m * frac_max; frac_m = m * frac_max;
if (frac_m > frac) if (frac_m > frac)
return frac_max; return frac_max;
@@ -666,7 +667,7 @@ static unsigned int meson_hdmi_pll_get_frac(struct meson_drm *priv,
} }
static bool meson_hdmi_pll_validate_params(struct meson_drm *priv, static bool meson_hdmi_pll_validate_params(struct meson_drm *priv,
unsigned int m, unsigned long long m,
unsigned int frac) unsigned int frac)
{ {
if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXBB)) { if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXBB)) {
@@ -694,7 +695,7 @@ static bool meson_hdmi_pll_validate_params(struct meson_drm *priv,
} }
static bool meson_hdmi_pll_find_params(struct meson_drm *priv, static bool meson_hdmi_pll_find_params(struct meson_drm *priv,
unsigned int freq, unsigned long long freq,
unsigned int *m, unsigned int *m,
unsigned int *frac, unsigned int *frac,
unsigned int *od) unsigned int *od)
@@ -706,7 +707,7 @@ static bool meson_hdmi_pll_find_params(struct meson_drm *priv,
continue; continue;
*frac = meson_hdmi_pll_get_frac(priv, *m, freq * *od); *frac = meson_hdmi_pll_get_frac(priv, *m, freq * *od);
DRM_DEBUG_DRIVER("PLL params for %dkHz: m=%x frac=%x od=%d\n", DRM_DEBUG_DRIVER("PLL params for %lluHz: m=%x frac=%x od=%d\n",
freq, *m, *frac, *od); freq, *m, *frac, *od);
if (meson_hdmi_pll_validate_params(priv, *m, *frac)) if (meson_hdmi_pll_validate_params(priv, *m, *frac))
@@ -718,7 +719,7 @@ static bool meson_hdmi_pll_find_params(struct meson_drm *priv,
/* pll_freq is the frequency after the OD dividers */ /* pll_freq is the frequency after the OD dividers */
enum drm_mode_status enum drm_mode_status
meson_vclk_dmt_supported_freq(struct meson_drm *priv, unsigned int freq) meson_vclk_dmt_supported_freq(struct meson_drm *priv, unsigned long long freq)
{ {
unsigned int od, m, frac; unsigned int od, m, frac;
@@ -741,7 +742,7 @@ EXPORT_SYMBOL_GPL(meson_vclk_dmt_supported_freq);
/* pll_freq is the frequency after the OD dividers */ /* pll_freq is the frequency after the OD dividers */
static void meson_hdmi_pll_generic_set(struct meson_drm *priv, static void meson_hdmi_pll_generic_set(struct meson_drm *priv,
unsigned int pll_freq) unsigned long long pll_freq)
{ {
unsigned int od, m, frac, od1, od2, od3; unsigned int od, m, frac, od1, od2, od3;
@@ -756,7 +757,7 @@ static void meson_hdmi_pll_generic_set(struct meson_drm *priv,
od1 = od / od2; od1 = od / od2;
} }
DRM_DEBUG_DRIVER("PLL params for %dkHz: m=%x frac=%x od=%d/%d/%d\n", DRM_DEBUG_DRIVER("PLL params for %lluHz: m=%x frac=%x od=%d/%d/%d\n",
pll_freq, m, frac, od1, od2, od3); pll_freq, m, frac, od1, od2, od3);
meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3);
@@ -764,17 +765,48 @@ static void meson_hdmi_pll_generic_set(struct meson_drm *priv,
return; return;
} }
DRM_ERROR("Fatal, unable to find parameters for PLL freq %d\n", DRM_ERROR("Fatal, unable to find parameters for PLL freq %lluHz\n",
pll_freq); pll_freq);
} }
static bool meson_vclk_freqs_are_matching_param(unsigned int idx,
unsigned long long phy_freq,
unsigned long long vclk_freq)
{
DRM_DEBUG_DRIVER("i = %d vclk_freq = %lluHz alt = %lluHz\n",
idx, params[idx].vclk_freq,
FREQ_1000_1001(params[idx].vclk_freq));
DRM_DEBUG_DRIVER("i = %d phy_freq = %lluHz alt = %lluHz\n",
idx, params[idx].phy_freq,
FREQ_1000_1001(params[idx].phy_freq));
/* Match strict frequency */
if (phy_freq == params[idx].phy_freq &&
vclk_freq == params[idx].vclk_freq)
return true;
/* Match 1000/1001 variant: vclk deviation has to be less than 1kHz
* (drm EDID is defined in 1kHz steps, so everything smaller must be
* rounding error) and the PHY freq deviation has to be less than
* 10kHz (as the TMDS clock is 10 times the pixel clock, so anything
* smaller must be rounding error as well).
*/
if (abs(vclk_freq - FREQ_1000_1001(params[idx].vclk_freq)) < 1000 &&
abs(phy_freq - FREQ_1000_1001(params[idx].phy_freq)) < 10000)
return true;
/* no match */
return false;
}
enum drm_mode_status enum drm_mode_status
meson_vclk_vic_supported_freq(struct meson_drm *priv, unsigned int phy_freq, meson_vclk_vic_supported_freq(struct meson_drm *priv,
unsigned int vclk_freq) unsigned long long phy_freq,
unsigned long long vclk_freq)
{ {
int i; int i;
DRM_DEBUG_DRIVER("phy_freq = %d vclk_freq = %d\n", DRM_DEBUG_DRIVER("phy_freq = %lluHz vclk_freq = %lluHz\n",
phy_freq, vclk_freq); phy_freq, vclk_freq);
/* Check against soc revision/package limits */ /* Check against soc revision/package limits */
@@ -785,19 +817,7 @@ meson_vclk_vic_supported_freq(struct meson_drm *priv, unsigned int phy_freq,
} }
for (i = 0 ; params[i].pixel_freq ; ++i) { for (i = 0 ; params[i].pixel_freq ; ++i) {
DRM_DEBUG_DRIVER("i = %d pixel_freq = %d alt = %d\n", if (meson_vclk_freqs_are_matching_param(i, phy_freq, vclk_freq))
i, params[i].pixel_freq,
FREQ_1000_1001(params[i].pixel_freq));
DRM_DEBUG_DRIVER("i = %d phy_freq = %d alt = %d\n",
i, params[i].phy_freq,
FREQ_1000_1001(params[i].phy_freq/10)*10);
/* Match strict frequency */
if (phy_freq == params[i].phy_freq &&
vclk_freq == params[i].vclk_freq)
return MODE_OK;
/* Match 1000/1001 variant */
if (phy_freq == (FREQ_1000_1001(params[i].phy_freq/10)*10) &&
vclk_freq == FREQ_1000_1001(params[i].vclk_freq))
return MODE_OK; return MODE_OK;
} }
@@ -805,8 +825,9 @@ meson_vclk_vic_supported_freq(struct meson_drm *priv, unsigned int phy_freq,
} }
EXPORT_SYMBOL_GPL(meson_vclk_vic_supported_freq); EXPORT_SYMBOL_GPL(meson_vclk_vic_supported_freq);
static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq, static void meson_vclk_set(struct meson_drm *priv,
unsigned int od1, unsigned int od2, unsigned int od3, unsigned long long pll_base_freq, unsigned int od1,
unsigned int od2, unsigned int od3,
unsigned int vid_pll_div, unsigned int vclk_div, unsigned int vid_pll_div, unsigned int vclk_div,
unsigned int hdmi_tx_div, unsigned int venc_div, unsigned int hdmi_tx_div, unsigned int venc_div,
bool hdmi_use_enci, bool vic_alternate_clock) bool hdmi_use_enci, bool vic_alternate_clock)
@@ -826,15 +847,15 @@ static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq,
meson_hdmi_pll_generic_set(priv, pll_base_freq); meson_hdmi_pll_generic_set(priv, pll_base_freq);
} else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXBB)) { } else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXBB)) {
switch (pll_base_freq) { switch (pll_base_freq) {
case 2970000: case 2970000000:
m = 0x3d; m = 0x3d;
frac = vic_alternate_clock ? 0xd02 : 0xe00; frac = vic_alternate_clock ? 0xd02 : 0xe00;
break; break;
case 4320000: case 4320000000:
m = vic_alternate_clock ? 0x59 : 0x5a; m = vic_alternate_clock ? 0x59 : 0x5a;
frac = vic_alternate_clock ? 0xe8f : 0; frac = vic_alternate_clock ? 0xe8f : 0;
break; break;
case 5940000: case 5940000000:
m = 0x7b; m = 0x7b;
frac = vic_alternate_clock ? 0xa05 : 0xc00; frac = vic_alternate_clock ? 0xa05 : 0xc00;
break; break;
@@ -844,15 +865,15 @@ static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq,
} else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXM) || } else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXM) ||
meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXL)) { meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXL)) {
switch (pll_base_freq) { switch (pll_base_freq) {
case 2970000: case 2970000000:
m = 0x7b; m = 0x7b;
frac = vic_alternate_clock ? 0x281 : 0x300; frac = vic_alternate_clock ? 0x281 : 0x300;
break; break;
case 4320000: case 4320000000:
m = vic_alternate_clock ? 0xb3 : 0xb4; m = vic_alternate_clock ? 0xb3 : 0xb4;
frac = vic_alternate_clock ? 0x347 : 0; frac = vic_alternate_clock ? 0x347 : 0;
break; break;
case 5940000: case 5940000000:
m = 0xf7; m = 0xf7;
frac = vic_alternate_clock ? 0x102 : 0x200; frac = vic_alternate_clock ? 0x102 : 0x200;
break; break;
@@ -861,15 +882,15 @@ static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq,
meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3);
} else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) { } else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) {
switch (pll_base_freq) { switch (pll_base_freq) {
case 2970000: case 2970000000:
m = 0x7b; m = 0x7b;
frac = vic_alternate_clock ? 0x140b4 : 0x18000; frac = vic_alternate_clock ? 0x140b4 : 0x18000;
break; break;
case 4320000: case 4320000000:
m = vic_alternate_clock ? 0xb3 : 0xb4; m = vic_alternate_clock ? 0xb3 : 0xb4;
frac = vic_alternate_clock ? 0x1a3ee : 0; frac = vic_alternate_clock ? 0x1a3ee : 0;
break; break;
case 5940000: case 5940000000:
m = 0xf7; m = 0xf7;
frac = vic_alternate_clock ? 0x8148 : 0x10000; frac = vic_alternate_clock ? 0x8148 : 0x10000;
break; break;
@@ -1025,14 +1046,14 @@ static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq,
} }
void meson_vclk_setup(struct meson_drm *priv, unsigned int target, void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
unsigned int phy_freq, unsigned int vclk_freq, unsigned long long phy_freq, unsigned long long vclk_freq,
unsigned int venc_freq, unsigned int dac_freq, unsigned long long venc_freq, unsigned long long dac_freq,
bool hdmi_use_enci) bool hdmi_use_enci)
{ {
bool vic_alternate_clock = false; bool vic_alternate_clock = false;
unsigned int freq; unsigned long long freq;
unsigned int hdmi_tx_div; unsigned long long hdmi_tx_div;
unsigned int venc_div; unsigned long long venc_div;
if (target == MESON_VCLK_TARGET_CVBS) { if (target == MESON_VCLK_TARGET_CVBS) {
meson_venci_cvbs_clock_config(priv); meson_venci_cvbs_clock_config(priv);
@@ -1052,27 +1073,25 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
return; return;
} }
hdmi_tx_div = vclk_freq / dac_freq; hdmi_tx_div = DIV_ROUND_DOWN_ULL(vclk_freq, dac_freq);
if (hdmi_tx_div == 0) { if (hdmi_tx_div == 0) {
pr_err("Fatal Error, invalid HDMI-TX freq %d\n", pr_err("Fatal Error, invalid HDMI-TX freq %lluHz\n",
dac_freq); dac_freq);
return; return;
} }
venc_div = vclk_freq / venc_freq; venc_div = DIV_ROUND_DOWN_ULL(vclk_freq, venc_freq);
if (venc_div == 0) { if (venc_div == 0) {
pr_err("Fatal Error, invalid HDMI venc freq %d\n", pr_err("Fatal Error, invalid HDMI venc freq %lluHz\n",
venc_freq); venc_freq);
return; return;
} }
for (freq = 0 ; params[freq].pixel_freq ; ++freq) { for (freq = 0 ; params[freq].pixel_freq ; ++freq) {
if ((phy_freq == params[freq].phy_freq || if (meson_vclk_freqs_are_matching_param(freq, phy_freq,
phy_freq == FREQ_1000_1001(params[freq].phy_freq/10)*10) && vclk_freq)) {
(vclk_freq == params[freq].vclk_freq ||
vclk_freq == FREQ_1000_1001(params[freq].vclk_freq))) {
if (vclk_freq != params[freq].vclk_freq) if (vclk_freq != params[freq].vclk_freq)
vic_alternate_clock = true; vic_alternate_clock = true;
else else
@@ -1098,7 +1117,8 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
} }
if (!params[freq].pixel_freq) { if (!params[freq].pixel_freq) {
pr_err("Fatal Error, invalid HDMI vclk freq %d\n", vclk_freq); pr_err("Fatal Error, invalid HDMI vclk freq %lluHz\n",
vclk_freq);
return; return;
} }

View File

@@ -20,17 +20,18 @@ enum {
}; };
/* 27MHz is the CVBS Pixel Clock */ /* 27MHz is the CVBS Pixel Clock */
#define MESON_VCLK_CVBS 27000 #define MESON_VCLK_CVBS (27 * 1000 * 1000)
enum drm_mode_status enum drm_mode_status
meson_vclk_dmt_supported_freq(struct meson_drm *priv, unsigned int freq); meson_vclk_dmt_supported_freq(struct meson_drm *priv, unsigned long long freq);
enum drm_mode_status enum drm_mode_status
meson_vclk_vic_supported_freq(struct meson_drm *priv, unsigned int phy_freq, meson_vclk_vic_supported_freq(struct meson_drm *priv,
unsigned int vclk_freq); unsigned long long phy_freq,
unsigned long long vclk_freq);
void meson_vclk_setup(struct meson_drm *priv, unsigned int target, void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
unsigned int phy_freq, unsigned int vclk_freq, unsigned long long phy_freq, unsigned long long vclk_freq,
unsigned int venc_freq, unsigned int dac_freq, unsigned long long venc_freq, unsigned long long dac_freq,
bool hdmi_use_enci); bool hdmi_use_enci);
#endif /* __MESON_VCLK_H */ #endif /* __MESON_VCLK_H */

View File

@@ -705,7 +705,7 @@ static int rcar_du_vsps_init(struct rcar_du_device *rcdu)
ret = of_parse_phandle_with_fixed_args(np, vsps_prop_name, ret = of_parse_phandle_with_fixed_args(np, vsps_prop_name,
cells, i, &args); cells, i, &args);
if (ret < 0) if (ret < 0)
goto error; goto done;
/* /*
* Add the VSP to the list or update the corresponding existing * Add the VSP to the list or update the corresponding existing
@@ -743,13 +743,11 @@ static int rcar_du_vsps_init(struct rcar_du_device *rcdu)
vsp->dev = rcdu; vsp->dev = rcdu;
ret = rcar_du_vsp_init(vsp, vsps[i].np, vsps[i].crtcs_mask); ret = rcar_du_vsp_init(vsp, vsps[i].np, vsps[i].crtcs_mask);
if (ret < 0) if (ret)
goto error; goto done;
} }
return 0; done:
error:
for (i = 0; i < ARRAY_SIZE(vsps); ++i) for (i = 0; i < ARRAY_SIZE(vsps); ++i)
of_node_put(vsps[i].np); of_node_put(vsps[i].np);

View File

@@ -190,6 +190,11 @@ static const struct drm_encoder_helper_funcs tegra_rgb_encoder_helper_funcs = {
.atomic_check = tegra_rgb_encoder_atomic_check, .atomic_check = tegra_rgb_encoder_atomic_check,
}; };
static void tegra_dc_of_node_put(void *data)
{
of_node_put(data);
}
int tegra_dc_rgb_probe(struct tegra_dc *dc) int tegra_dc_rgb_probe(struct tegra_dc *dc)
{ {
struct device_node *np; struct device_node *np;
@@ -197,7 +202,14 @@ int tegra_dc_rgb_probe(struct tegra_dc *dc)
int err; int err;
np = of_get_child_by_name(dc->dev->of_node, "rgb"); np = of_get_child_by_name(dc->dev->of_node, "rgb");
if (!np || !of_device_is_available(np)) if (!np)
return -ENODEV;
err = devm_add_action_or_reset(dc->dev, tegra_dc_of_node_put, np);
if (err < 0)
return err;
if (!of_device_is_available(np))
return -ENODEV; return -ENODEV;
rgb = devm_kzalloc(dc->dev, sizeof(*rgb), GFP_KERNEL); rgb = devm_kzalloc(dc->dev, sizeof(*rgb), GFP_KERNEL);

View File

@@ -75,24 +75,30 @@ int vc4_mock_atomic_add_output(struct kunit *test,
int ret; int ret;
encoder = vc4_find_encoder_by_type(drm, type); encoder = vc4_find_encoder_by_type(drm, type);
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, encoder); if (!encoder)
return -ENODEV;
crtc = vc4_find_crtc_for_encoder(test, drm, encoder); crtc = vc4_find_crtc_for_encoder(test, drm, encoder);
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, crtc); if (!crtc)
return -ENODEV;
output = encoder_to_vc4_dummy_output(encoder); output = encoder_to_vc4_dummy_output(encoder);
conn = &output->connector; conn = &output->connector;
conn_state = drm_atomic_get_connector_state(state, conn); conn_state = drm_atomic_get_connector_state(state, conn);
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, conn_state); if (IS_ERR(conn_state))
return PTR_ERR(conn_state);
ret = drm_atomic_set_crtc_for_connector(conn_state, crtc); ret = drm_atomic_set_crtc_for_connector(conn_state, crtc);
KUNIT_EXPECT_EQ(test, ret, 0); if (ret)
return ret;
crtc_state = drm_atomic_get_crtc_state(state, crtc); crtc_state = drm_atomic_get_crtc_state(state, crtc);
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, crtc_state); if (IS_ERR(crtc_state))
return PTR_ERR(crtc_state);
ret = drm_atomic_set_mode_for_crtc(crtc_state, &default_mode); ret = drm_atomic_set_mode_for_crtc(crtc_state, &default_mode);
KUNIT_EXPECT_EQ(test, ret, 0); if (ret)
return ret;
crtc_state->active = true; crtc_state->active = true;
@@ -113,26 +119,32 @@ int vc4_mock_atomic_del_output(struct kunit *test,
int ret; int ret;
encoder = vc4_find_encoder_by_type(drm, type); encoder = vc4_find_encoder_by_type(drm, type);
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, encoder); if (!encoder)
return -ENODEV;
crtc = vc4_find_crtc_for_encoder(test, drm, encoder); crtc = vc4_find_crtc_for_encoder(test, drm, encoder);
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, crtc); if (!crtc)
return -ENODEV;
crtc_state = drm_atomic_get_crtc_state(state, crtc); crtc_state = drm_atomic_get_crtc_state(state, crtc);
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, crtc_state); if (IS_ERR(crtc_state))
return PTR_ERR(crtc_state);
crtc_state->active = false; crtc_state->active = false;
ret = drm_atomic_set_mode_for_crtc(crtc_state, NULL); ret = drm_atomic_set_mode_for_crtc(crtc_state, NULL);
KUNIT_ASSERT_EQ(test, ret, 0); if (ret)
return ret;
output = encoder_to_vc4_dummy_output(encoder); output = encoder_to_vc4_dummy_output(encoder);
conn = &output->connector; conn = &output->connector;
conn_state = drm_atomic_get_connector_state(state, conn); conn_state = drm_atomic_get_connector_state(state, conn);
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, conn_state); if (IS_ERR(conn_state))
return PTR_ERR(conn_state);
ret = drm_atomic_set_crtc_for_connector(conn_state, NULL); ret = drm_atomic_set_crtc_for_connector(conn_state, NULL);
KUNIT_ASSERT_EQ(test, ret, 0); if (ret)
return ret;
return 0; return 0;
} }

View File

@@ -201,7 +201,7 @@ static int vkms_crtc_atomic_check(struct drm_crtc *crtc,
i++; i++;
} }
vkms_state->active_planes = kcalloc(i, sizeof(plane), GFP_KERNEL); vkms_state->active_planes = kcalloc(i, sizeof(*vkms_state->active_planes), GFP_KERNEL);
if (!vkms_state->active_planes) if (!vkms_state->active_planes)
return -ENOMEM; return -ENOMEM;
vkms_state->num_active_planes = i; vkms_state->num_active_planes = i;

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