iio: adc: rockchip: Fix clock initialization sequence
commit 839f81de397019f55161c5982d670ac19d836173 upstream.
clock_set_rate should be executed after devm_clk_get_enabled.
Fixes: 97ad10bb29
("iio: adc: rockchip_saradc: Make use of devm_clk_get_enabled")
Signed-off-by: Simon Xue <xxm@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20250312062016.137821-1-xxm@rock-chips.com
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
badda05d6b
commit
7748b1b27f
@@ -485,15 +485,6 @@ static int rockchip_saradc_probe(struct platform_device *pdev)
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if (info->reset)
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rockchip_saradc_reset_controller(info->reset);
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/*
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* Use a default value for the converter clock.
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* This may become user-configurable in the future.
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*/
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ret = clk_set_rate(info->clk, info->data->clk_rate);
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if (ret < 0)
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return dev_err_probe(&pdev->dev, ret,
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"failed to set adc clk rate\n");
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ret = regulator_enable(info->vref);
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if (ret < 0)
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return dev_err_probe(&pdev->dev, ret,
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@@ -520,6 +511,14 @@ static int rockchip_saradc_probe(struct platform_device *pdev)
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if (IS_ERR(info->clk))
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return dev_err_probe(&pdev->dev, PTR_ERR(info->clk),
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"failed to get adc clock\n");
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/*
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* Use a default value for the converter clock.
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* This may become user-configurable in the future.
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*/
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ret = clk_set_rate(info->clk, info->data->clk_rate);
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if (ret < 0)
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return dev_err_probe(&pdev->dev, ret,
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"failed to set adc clk rate\n");
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platform_set_drvdata(pdev, indio_dev);
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