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ARM: OMAP2+: Fix l4ls clk domain handling in STANDBY

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[ Upstream commit 47fe74098f3dadba2f9cc1e507d813a4aa93f5f3 ]

Don't put the l4ls clk domain to sleep in case of standby.
Since CM3 PM FW[1](ti-v4.1.y) doesn't wake-up/enable the l4ls clk domain
upon wake-up, CM3 PM FW fails to wake-up the MPU.

[1] https://git.ti.com/cgit/processor-firmware/ti-amx3-cm3-pm-firmware/

Signed-off-by: Sukrut Bellary <sbellary@baylibre.com>
Tested-by: Judith Mendez <jm@ti.com>
Link: https://lore.kernel.org/r/20250318230042.3138542-2-sbellary@baylibre.com
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Sukrut Bellary
2025-03-18 16:00:39 -07:00
committed by Greg Kroah-Hartman
parent bca6fe52bd
commit 59b7304d0d
3 changed files with 15 additions and 2 deletions
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1
arch/arm/mach-omap2/clockdomain.h
View File

@@ -48,6 +48,7 @@
#define CLKDM_NO_AUTODEPS (1 << 4) #define CLKDM_NO_AUTODEPS (1 << 4)
#define CLKDM_ACTIVE_WITH_MPU (1 << 5) #define CLKDM_ACTIVE_WITH_MPU (1 << 5)
#define CLKDM_MISSING_IDLE_REPORTING (1 << 6) #define CLKDM_MISSING_IDLE_REPORTING (1 << 6)
#define CLKDM_STANDBY_FORCE_WAKEUP BIT(7)
#define CLKDM_CAN_HWSUP (CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_DISABLE_AUTO) #define CLKDM_CAN_HWSUP (CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_DISABLE_AUTO)
#define CLKDM_CAN_SWSUP (CLKDM_CAN_FORCE_SLEEP | CLKDM_CAN_FORCE_WAKEUP) #define CLKDM_CAN_SWSUP (CLKDM_CAN_FORCE_SLEEP | CLKDM_CAN_FORCE_WAKEUP)

2
arch/arm/mach-omap2/clockdomains33xx_data.c
View File

@@ -19,7 +19,7 @@ static struct clockdomain l4ls_am33xx_clkdm = {
.pwrdm = { .name = "per_pwrdm" }, .pwrdm = { .name = "per_pwrdm" },
.cm_inst = AM33XX_CM_PER_MOD, .cm_inst = AM33XX_CM_PER_MOD,
.clkdm_offs = AM33XX_CM_PER_L4LS_CLKSTCTRL_OFFSET, .clkdm_offs = AM33XX_CM_PER_L4LS_CLKSTCTRL_OFFSET,
.flags = CLKDM_CAN_SWSUP, .flags = CLKDM_CAN_SWSUP | CLKDM_STANDBY_FORCE_WAKEUP,
}; };
static struct clockdomain l3s_am33xx_clkdm = { static struct clockdomain l3s_am33xx_clkdm = {

14
arch/arm/mach-omap2/cm33xx.c
View File

@@ -20,6 +20,9 @@
#include "cm-regbits-34xx.h" #include "cm-regbits-34xx.h"
#include "cm-regbits-33xx.h" #include "cm-regbits-33xx.h"
#include "prm33xx.h" #include "prm33xx.h"
#if IS_ENABLED(CONFIG_SUSPEND)
#include <linux/suspend.h>
#endif
/* /*
* CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield: * CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield:
@@ -328,8 +331,17 @@ static int am33xx_clkdm_clk_disable(struct clockdomain *clkdm)
{ {
bool hwsup = false; bool hwsup = false;
#if IS_ENABLED(CONFIG_SUSPEND)
/*
* In case of standby, Don't put the l4ls clk domain to sleep.
* Since CM3 PM FW doesn't wake-up/enable the l4ls clk domain
* upon wake-up, CM3 PM FW fails to wake-up th MPU.
*/
if (pm_suspend_target_state == PM_SUSPEND_STANDBY &&
(clkdm->flags & CLKDM_STANDBY_FORCE_WAKEUP))
return 0;
#endif
hwsup = am33xx_cm_is_clkdm_in_hwsup(clkdm->cm_inst, clkdm->clkdm_offs); hwsup = am33xx_cm_is_clkdm_in_hwsup(clkdm->cm_inst, clkdm->clkdm_offs);
if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP))
am33xx_clkdm_sleep(clkdm); am33xx_clkdm_sleep(clkdm);