Add samsung specific changes
This commit is contained in:
@@ -73,6 +73,23 @@ config DEVFREQ_GOV_PASSIVE
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through sysfs entries. The passive governor recommends that
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devfreq device uses the OPP table to get the frequency/voltage.
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config DEVFREQ_GOV_QCOM_ADRENO_TZ
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tristate "Qualcomm Technologies, Inc. GPU frequency governor"
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help
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GPU frequency governor for the Adreno GPU. Sets the frequency
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using an "on demand" algorithm in conjunction with other
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components on Adreno platforms. This is not useful for non-Adreno
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devices.
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config DEVFREQ_GOV_QCOM_GPUBW_MON
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tristate "Qualcomm Technologies, Inc. GPU bandwidth governor"
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depends on DEVFREQ_GOV_QCOM_ADRENO_TZ
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help
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This governor works together with the Adreno GPU governor to
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select bus frequency votes using an "on-demand" algorithm.
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This governor will not be useful for non-Adreno based
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targets.
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comment "DEVFREQ Drivers"
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config ARM_EXYNOS_BUS_DEVFREQ
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@@ -6,6 +6,8 @@ obj-$(CONFIG_DEVFREQ_GOV_PERFORMANCE) += governor_performance.o
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obj-$(CONFIG_DEVFREQ_GOV_POWERSAVE) += governor_powersave.o
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obj-$(CONFIG_DEVFREQ_GOV_USERSPACE) += governor_userspace.o
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obj-$(CONFIG_DEVFREQ_GOV_PASSIVE) += governor_passive.o
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obj-$(CONFIG_DEVFREQ_GOV_QCOM_ADRENO_TZ) += governor_msm_adreno_tz.o
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obj-$(CONFIG_DEVFREQ_GOV_QCOM_GPUBW_MON) += governor_gpubw_mon.o
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# DEVFREQ Drivers
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obj-$(CONFIG_ARM_EXYNOS_BUS_DEVFREQ) += exynos-bus.o
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346
drivers/devfreq/governor_gpubw_mon.c
Normal file
346
drivers/devfreq/governor_gpubw_mon.c
Normal file
@@ -0,0 +1,346 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2014-2021, The Linux Foundation. All rights reserved.
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* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <linux/devfreq.h>
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#include <linux/slab.h>
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#include <linux/soc/qcom/msm_adreno_devfreq.h>
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#include "governor.h"
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#define MIN_BUSY 1000
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#define LONG_FLOOR 50000
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#define HIST 5
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#define TARGET 80
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#define CAP 75
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#define WAIT_THRESHOLD 10
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/* AB vote is in multiple of BW_STEP Mega bytes */
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#define BW_STEP 50
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static void _update_cutoff(struct devfreq_msm_adreno_tz_data *priv,
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unsigned int norm_max)
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{
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int i;
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priv->bus.max = norm_max;
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for (i = 0; i < priv->bus.num; i++) {
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priv->bus.up[i] = priv->bus.p_up[i] * norm_max / 100;
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priv->bus.down[i] = priv->bus.p_down[i] * norm_max / 100;
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}
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}
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static ssize_t cur_ab_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct devfreq *df = to_devfreq(dev);
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struct msm_busmon_extended_profile *bus_profile = container_of(
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(df->profile),
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struct msm_busmon_extended_profile,
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profile);
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return scnprintf(buf, PAGE_SIZE, "%lu\n", bus_profile->ab_mbytes);
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}
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static ssize_t sampling_interval_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct devfreq *df = to_devfreq(dev);
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struct msm_busmon_extended_profile *bus_profile = container_of(
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(df->profile),
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struct msm_busmon_extended_profile,
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profile);
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return scnprintf(buf, PAGE_SIZE, "%d\n", bus_profile->sampling_ms);
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}
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static ssize_t sampling_interval_store(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t count)
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{
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struct devfreq *df = to_devfreq(dev);
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struct msm_busmon_extended_profile *bus_profile = container_of(
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(df->profile),
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struct msm_busmon_extended_profile,
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profile);
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u32 value;
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int ret;
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ret = kstrtou32(buf, 0, &value);
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if (ret)
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return ret;
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bus_profile->sampling_ms = value;
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return count;
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}
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static DEVICE_ATTR_RW(sampling_interval);
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static DEVICE_ATTR_RO(cur_ab);
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static const struct device_attribute *gpubw_attr_list[] = {
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&dev_attr_sampling_interval,
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&dev_attr_cur_ab,
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NULL
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};
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static u32 generate_hint(struct devfreq_msm_adreno_tz_data *priv, int buslevel,
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unsigned long freq, unsigned long minfreq)
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{
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int act_level;
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int norm_max_cycles;
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int norm_cycles;
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int wait_active_percent;
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int gpu_percent;
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norm_max_cycles = (unsigned int)(priv->bus.ram_time) /
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(unsigned int) priv->bus.total_time;
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norm_cycles = (unsigned int)(priv->bus.ram_time + priv->bus.ram_wait) /
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(unsigned int) priv->bus.total_time;
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wait_active_percent = (100 * (unsigned int)priv->bus.ram_wait) /
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(unsigned int) priv->bus.ram_time;
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gpu_percent = (100 * (unsigned int)priv->bus.gpu_time) /
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(unsigned int) priv->bus.total_time;
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/*
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* If there's a new high watermark, update the cutoffs and send the
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* FAST hint, provided that we are using a floating watermark.
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* Otherwise check the current value against the current
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* cutoffs.
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*/
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if (norm_max_cycles > priv->bus.max && priv->bus.floating) {
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_update_cutoff(priv, norm_max_cycles);
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return BUSMON_FLAG_FAST_HINT;
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}
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/* Increase BW vote to avoid starving GPU for BW if required */
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if (priv->fast_bus_hint && minfreq == freq) {
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if (wait_active_percent > 95)
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return BUSMON_FLAG_SUPER_FAST_HINT;
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if (wait_active_percent > 80)
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return BUSMON_FLAG_FAST_HINT;
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}
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/* GPU votes for IB not AB so don't under vote the system */
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norm_cycles = (100 * norm_cycles) / TARGET;
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act_level = max_t(int, buslevel, 0);
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act_level = min_t(int, act_level, priv->bus.num - 1);
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if ((norm_cycles > priv->bus.up[act_level] ||
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wait_active_percent > WAIT_THRESHOLD) &&
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gpu_percent > CAP)
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return BUSMON_FLAG_FAST_HINT;
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if (norm_cycles < priv->bus.down[act_level] && buslevel)
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return BUSMON_FLAG_SLOW_HINT;
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return 0;
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}
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static int devfreq_gpubw_get_target(struct devfreq *df,
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unsigned long *freq)
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{
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struct devfreq_msm_adreno_tz_data *priv = df->data;
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struct msm_busmon_extended_profile *bus_profile = container_of(
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(df->profile),
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struct msm_busmon_extended_profile,
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profile);
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struct devfreq_dev_status *stats = &df->last_status;
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struct xstats b = {0};
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int result;
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int norm_ab;
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unsigned long ab_mbytes = 0;
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/*
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* Normalized AB should at max usage be the gpu_bimc frequency in MHz.
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* Start with a reasonable value and let the system push it up to max.
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*/
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static int norm_ab_max = 300;
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if (priv == NULL)
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return 0;
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stats->private_data = &b;
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result = devfreq_update_stats(df);
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/* Return if devfreq is not enabled */
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if (result)
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return result;
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*freq = stats->current_frequency;
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priv->bus.total_time += stats->total_time;
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priv->bus.gpu_time += stats->busy_time;
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priv->bus.ram_time += b.ram_time;
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priv->bus.ram_wait += b.ram_wait;
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if (priv->bus.total_time < bus_profile->sampling_ms)
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return result;
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bus_profile->flag = generate_hint(priv, b.buslevel, *freq,
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b.gpu_minfreq);
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/* Calculate the AB vote based on bus width if defined */
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if (priv->bus.width) {
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norm_ab = (unsigned int)priv->bus.ram_time /
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(unsigned int) priv->bus.total_time;
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/* Calculate AB in Mega Bytes and roundup in BW_STEP */
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ab_mbytes = (norm_ab * priv->bus.width * 1000000ULL) >> 20;
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bus_profile->ab_mbytes = roundup(ab_mbytes, BW_STEP);
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} else if (bus_profile->flag) {
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/* Re-calculate the AB percentage for a new IB vote */
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norm_ab = (unsigned int)priv->bus.ram_time /
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(unsigned int) priv->bus.total_time;
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if (norm_ab > norm_ab_max)
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norm_ab_max = norm_ab;
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bus_profile->percent_ab = (100 * norm_ab) / norm_ab_max;
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}
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priv->bus.total_time = 0;
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priv->bus.gpu_time = 0;
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priv->bus.ram_time = 0;
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priv->bus.ram_wait = 0;
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return result;
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}
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static int gpubw_start(struct devfreq *devfreq)
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{
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struct devfreq_msm_adreno_tz_data *priv;
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struct msm_busmon_extended_profile *bus_profile = container_of(
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(devfreq->profile),
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struct msm_busmon_extended_profile,
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profile);
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unsigned int t1, t2 = 2 * HIST;
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int i, bus_size;
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devfreq->data = bus_profile->private_data;
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priv = devfreq->data;
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bus_size = sizeof(u32) * priv->bus.num;
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priv->bus.up = kzalloc(bus_size, GFP_KERNEL);
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priv->bus.down = kzalloc(bus_size, GFP_KERNEL);
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priv->bus.p_up = kzalloc(bus_size, GFP_KERNEL);
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priv->bus.p_down = kzalloc(bus_size, GFP_KERNEL);
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if (priv->bus.up == NULL || priv->bus.down == NULL ||
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priv->bus.p_up == NULL || priv->bus.p_down == NULL)
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return -ENOMEM;
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/* Set up the cut-over percentages for the bus calculation. */
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for (i = 0; i < priv->bus.num; i++) {
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t1 = (u32)(100 * priv->bus.ib_kbps[i]) /
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(u32)priv->bus.ib_kbps[priv->bus.num - 1];
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priv->bus.p_up[i] = t1 - HIST;
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priv->bus.p_down[i] = t2 - 2 * HIST;
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t2 = t1;
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}
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/* Set the upper-most and lower-most bounds correctly. */
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priv->bus.p_down[0] = 0;
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for (i = 0; i < priv->bus.num; i++) {
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if (priv->bus.p_down[i] < 2 * HIST)
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priv->bus.p_down[i] = 2 * HIST;
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}
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if (priv->bus.num >= 1)
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priv->bus.p_up[priv->bus.num - 1] = 100;
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_update_cutoff(priv, priv->bus.max);
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bus_profile->sampling_ms = LONG_FLOOR;
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for (i = 0; gpubw_attr_list[i] != NULL; i++)
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device_create_file(&devfreq->dev, gpubw_attr_list[i]);
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return 0;
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}
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static int gpubw_stop(struct devfreq *devfreq)
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{
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struct devfreq_msm_adreno_tz_data *priv = devfreq->data;
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int i;
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for (i = 0; gpubw_attr_list[i] != NULL; i++)
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device_remove_file(&devfreq->dev, gpubw_attr_list[i]);
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if (priv) {
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kfree(priv->bus.up);
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kfree(priv->bus.down);
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kfree(priv->bus.p_up);
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kfree(priv->bus.p_down);
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}
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devfreq->data = NULL;
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return 0;
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}
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static int devfreq_gpubw_event_handler(struct devfreq *devfreq,
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unsigned int event, void *data)
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{
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int result = 0;
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unsigned long freq;
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if (strcmp(dev_name(devfreq->dev.parent), "kgsl-busmon"))
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return -EINVAL;
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mutex_lock(&devfreq->lock);
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freq = devfreq->previous_freq;
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switch (event) {
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case DEVFREQ_GOV_START:
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result = gpubw_start(devfreq);
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break;
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case DEVFREQ_GOV_STOP:
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result = gpubw_stop(devfreq);
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break;
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case DEVFREQ_GOV_RESUME:
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/* TODO ..... */
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/* ret = update_devfreq(devfreq); */
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break;
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case DEVFREQ_GOV_SUSPEND:
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{
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struct devfreq_msm_adreno_tz_data *priv = devfreq->data;
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if (priv) {
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priv->bus.total_time = 0;
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priv->bus.gpu_time = 0;
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priv->bus.ram_time = 0;
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}
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}
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break;
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default:
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result = 0;
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break;
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}
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mutex_unlock(&devfreq->lock);
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return result;
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}
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static struct devfreq_governor devfreq_gpubw = {
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.name = "gpubw_mon",
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.get_target_freq = devfreq_gpubw_get_target,
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.event_handler = devfreq_gpubw_event_handler,
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.flags = DEVFREQ_GOV_FLAG_IMMUTABLE,
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};
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int devfreq_gpubw_init(void)
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{
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return devfreq_add_governor(&devfreq_gpubw);
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}
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subsys_initcall(devfreq_gpubw_init);
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void devfreq_gpubw_exit(void)
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{
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int ret;
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ret = devfreq_remove_governor(&devfreq_gpubw);
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if (ret)
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pr_err("%s: failed remove governor %d\n", __func__, ret);
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}
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module_exit(devfreq_gpubw_exit);
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MODULE_DESCRIPTION("GPU bus bandwidth voting driver. Uses VBIF counters");
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MODULE_LICENSE("GPL");
|
586
drivers/devfreq/governor_msm_adreno_tz.c
Normal file
586
drivers/devfreq/governor_msm_adreno_tz.c
Normal file
@@ -0,0 +1,586 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2010-2021, The Linux Foundation. All rights reserved.
|
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* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
|
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*/
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#include <linux/errno.h>
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#include <linux/cacheflush.h>
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#include <linux/devfreq.h>
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#include <linux/dma-mapping.h>
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#include <linux/firmware/qcom/qcom_scm.h>
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#include <linux/math64.h>
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#include <linux/of_platform.h>
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#include <linux/spinlock.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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#include <linux/ftrace.h>
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#include <linux/mm.h>
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#include <linux/qtee_shmbridge.h>
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#include <linux/soc/qcom/msm_adreno_devfreq.h>
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#include "governor.h"
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static DEFINE_SPINLOCK(tz_lock);
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static DEFINE_SPINLOCK(sample_lock);
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static DEFINE_SPINLOCK(suspend_lock);
|
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/*
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* FLOOR is 5msec to capture up to 3 re-draws
|
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* per frame for 60fps content.
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*/
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#define FLOOR 5000
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/*
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* MIN_BUSY is 1 msec for the sample to be sent
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*/
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#define MIN_BUSY 1000
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#define MAX_TZ_VERSION 0
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||||
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/*
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* CEILING is 50msec, larger than any standard
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* frame length, but less than the idle timer.
|
||||
*/
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#define CEILING 50000
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||||
#define TZ_RESET_ID 0x3
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#define TZ_UPDATE_ID 0x4
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#define TZ_INIT_ID 0x6
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#define TZ_RESET_ID_64 0x7
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#define TZ_UPDATE_ID_64 0x8
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#define TZ_INIT_ID_64 0x9
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||||
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#define TZ_V2_UPDATE_ID_64 0xA
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||||
#define TZ_V2_INIT_ID_64 0xB
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||||
#define TZ_V2_INIT_CA_ID_64 0xC
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||||
#define TZ_V2_UPDATE_WITH_CA_ID_64 0xD
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||||
|
||||
#define TAG "msm_adreno_tz: "
|
||||
|
||||
static u64 suspend_time;
|
||||
static u64 suspend_start;
|
||||
static unsigned long acc_total, acc_relative_busy;
|
||||
|
||||
/*
|
||||
* Returns GPU suspend time in millisecond.
|
||||
*/
|
||||
u64 suspend_time_ms(void)
|
||||
{
|
||||
u64 suspend_sampling_time;
|
||||
u64 time_diff = 0;
|
||||
|
||||
if (suspend_start == 0)
|
||||
return 0;
|
||||
|
||||
suspend_sampling_time = (u64)ktime_to_ms(ktime_get());
|
||||
time_diff = suspend_sampling_time - suspend_start;
|
||||
/* Update the suspend_start sample again */
|
||||
suspend_start = suspend_sampling_time;
|
||||
return time_diff;
|
||||
}
|
||||
|
||||
static ssize_t gpu_load_show(struct device *dev,
|
||||
struct device_attribute *attr,
|
||||
char *buf)
|
||||
{
|
||||
unsigned long sysfs_busy_perc = 0;
|
||||
/*
|
||||
* Average out the samples taken since last read
|
||||
* This will keep the average value in sync with
|
||||
* the client sampling duration.
|
||||
*/
|
||||
spin_lock(&sample_lock);
|
||||
if (acc_total)
|
||||
sysfs_busy_perc = (acc_relative_busy * 100) / acc_total;
|
||||
|
||||
/* Reset the parameters */
|
||||
acc_total = 0;
|
||||
acc_relative_busy = 0;
|
||||
spin_unlock(&sample_lock);
|
||||
return snprintf(buf, PAGE_SIZE, "%lu\n", sysfs_busy_perc);
|
||||
}
|
||||
|
||||
/*
|
||||
* Returns the time in ms for which gpu was in suspend state
|
||||
* since last time the entry is read.
|
||||
*/
|
||||
static ssize_t suspend_time_show(struct device *dev,
|
||||
struct device_attribute *attr,
|
||||
char *buf)
|
||||
{
|
||||
u64 time_diff = 0;
|
||||
|
||||
spin_lock(&suspend_lock);
|
||||
time_diff = suspend_time_ms();
|
||||
/*
|
||||
* Adding the previous suspend time also as the gpu
|
||||
* can go and come out of suspend states in between
|
||||
* reads also and we should have the total suspend
|
||||
* since last read.
|
||||
*/
|
||||
time_diff += suspend_time;
|
||||
suspend_time = 0;
|
||||
spin_unlock(&suspend_lock);
|
||||
|
||||
return snprintf(buf, PAGE_SIZE, "%llu\n", time_diff);
|
||||
}
|
||||
|
||||
static ssize_t mod_percent_store(struct device *dev,
|
||||
struct device_attribute *attr,
|
||||
const char *buf, size_t count)
|
||||
{
|
||||
int ret;
|
||||
unsigned int val;
|
||||
struct devfreq *devfreq = to_devfreq(dev);
|
||||
struct devfreq_msm_adreno_tz_data *priv = devfreq->data;
|
||||
|
||||
ret = kstrtou32(buf, 0, &val);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
priv->mod_percent = clamp_t(u32, val, 10, 1000);
|
||||
|
||||
return count;
|
||||
}
|
||||
|
||||
static ssize_t mod_percent_show(struct device *dev,
|
||||
struct device_attribute *attr, char *buf)
|
||||
{
|
||||
struct devfreq *devfreq = to_devfreq(dev);
|
||||
struct devfreq_msm_adreno_tz_data *priv = devfreq->data;
|
||||
|
||||
return scnprintf(buf, PAGE_SIZE, "%u\n", priv->mod_percent);
|
||||
}
|
||||
|
||||
static DEVICE_ATTR_RO(gpu_load);
|
||||
|
||||
static DEVICE_ATTR_RO(suspend_time);
|
||||
static DEVICE_ATTR_RW(mod_percent);
|
||||
|
||||
static const struct device_attribute *adreno_tz_attr_list[] = {
|
||||
&dev_attr_gpu_load,
|
||||
&dev_attr_suspend_time,
|
||||
&dev_attr_mod_percent,
|
||||
NULL
|
||||
};
|
||||
|
||||
void compute_work_load(struct devfreq_dev_status *stats,
|
||||
struct devfreq_msm_adreno_tz_data *priv,
|
||||
struct devfreq *devfreq)
|
||||
{
|
||||
u64 busy;
|
||||
|
||||
spin_lock(&sample_lock);
|
||||
/*
|
||||
* Keep collecting the stats till the client
|
||||
* reads it. Average of all samples and reset
|
||||
* is done when the entry is read
|
||||
*/
|
||||
acc_total += stats->total_time;
|
||||
busy = (u64)stats->busy_time * stats->current_frequency;
|
||||
do_div(busy, devfreq->profile->freq_table[0]);
|
||||
acc_relative_busy += busy;
|
||||
|
||||
spin_unlock(&sample_lock);
|
||||
}
|
||||
|
||||
/* Trap into the TrustZone, and call funcs there. */
|
||||
static int __secure_tz_reset_entry2(unsigned int *scm_data, u32 size_scm_data,
|
||||
bool is_64)
|
||||
{
|
||||
int ret;
|
||||
/* sync memory before sending the commands to tz */
|
||||
__iowmb();
|
||||
|
||||
if (!is_64) {
|
||||
spin_lock(&tz_lock);
|
||||
ret = qcom_scm_io_reset();
|
||||
spin_unlock(&tz_lock);
|
||||
} else {
|
||||
ret = qcom_scm_dcvs_reset();
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int __secure_tz_update_entry3(int level, s64 total_time, s64 busy_time,
|
||||
int context_count, struct devfreq_msm_adreno_tz_data *priv)
|
||||
{
|
||||
int ret;
|
||||
/* sync memory before sending the commands to tz */
|
||||
__iowmb();
|
||||
|
||||
if (!priv->is_64) {
|
||||
spin_lock(&tz_lock);
|
||||
ret = qcom_scm_dcvs_update(level, total_time, busy_time);
|
||||
spin_unlock(&tz_lock);
|
||||
} else if (!priv->ctxt_aware_enable) {
|
||||
ret = qcom_scm_dcvs_update_v2(level, total_time, busy_time);
|
||||
} else {
|
||||
ret = qcom_scm_dcvs_update_ca_v2(level, total_time, busy_time,
|
||||
context_count);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int tz_init_ca(struct device *dev,
|
||||
struct devfreq_msm_adreno_tz_data *priv)
|
||||
{
|
||||
unsigned int tz_ca_data[2];
|
||||
phys_addr_t paddr;
|
||||
u8 *tz_buf;
|
||||
int ret;
|
||||
struct qtee_shm shm;
|
||||
|
||||
/* Set data for TZ */
|
||||
tz_ca_data[0] = priv->bin.ctxt_aware_target_pwrlevel;
|
||||
tz_ca_data[1] = priv->bin.ctxt_aware_busy_penalty;
|
||||
|
||||
if (!qtee_shmbridge_is_enabled()) {
|
||||
tz_buf = kzalloc(PAGE_ALIGN(sizeof(tz_ca_data)), GFP_KERNEL);
|
||||
if (!tz_buf)
|
||||
return -ENOMEM;
|
||||
paddr = virt_to_phys(tz_buf);
|
||||
} else {
|
||||
ret = qtee_shmbridge_allocate_shm(
|
||||
PAGE_ALIGN(sizeof(tz_ca_data)), &shm);
|
||||
if (ret)
|
||||
return -ENOMEM;
|
||||
tz_buf = shm.vaddr;
|
||||
paddr = shm.paddr;
|
||||
}
|
||||
|
||||
memcpy(tz_buf, tz_ca_data, sizeof(tz_ca_data));
|
||||
/* Ensure memcpy completes execution */
|
||||
mb();
|
||||
dma_sync_single_for_device(dev, paddr,
|
||||
PAGE_ALIGN(sizeof(tz_ca_data)), DMA_BIDIRECTIONAL);
|
||||
|
||||
ret = qcom_scm_dcvs_init_ca_v2(paddr, sizeof(tz_ca_data));
|
||||
|
||||
if (!qtee_shmbridge_is_enabled())
|
||||
kfree_sensitive(tz_buf);
|
||||
else
|
||||
qtee_shmbridge_free_shm(&shm);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int tz_init(struct device *dev, struct devfreq_msm_adreno_tz_data *priv,
|
||||
unsigned int *tz_pwrlevels, u32 size_pwrlevels,
|
||||
unsigned int *version, u32 size_version)
|
||||
{
|
||||
int ret;
|
||||
phys_addr_t paddr;
|
||||
|
||||
if (qcom_scm_dcvs_core_available()) {
|
||||
u8 *tz_buf;
|
||||
struct qtee_shm shm;
|
||||
|
||||
if (!qtee_shmbridge_is_enabled()) {
|
||||
tz_buf = kzalloc(PAGE_ALIGN(size_pwrlevels),
|
||||
GFP_KERNEL);
|
||||
if (!tz_buf)
|
||||
return -ENOMEM;
|
||||
paddr = virt_to_phys(tz_buf);
|
||||
} else {
|
||||
ret = qtee_shmbridge_allocate_shm(
|
||||
PAGE_ALIGN(size_pwrlevels), &shm);
|
||||
if (ret)
|
||||
return -ENOMEM;
|
||||
tz_buf = shm.vaddr;
|
||||
paddr = shm.paddr;
|
||||
}
|
||||
|
||||
memcpy(tz_buf, tz_pwrlevels, size_pwrlevels);
|
||||
/* Ensure memcpy completes execution */
|
||||
mb();
|
||||
dma_sync_single_for_device(dev, paddr,
|
||||
PAGE_ALIGN(size_pwrlevels), DMA_BIDIRECTIONAL);
|
||||
|
||||
ret = qcom_scm_dcvs_init_v2(paddr, size_pwrlevels, version);
|
||||
if (!ret)
|
||||
priv->is_64 = true;
|
||||
if (!qtee_shmbridge_is_enabled())
|
||||
kfree_sensitive(tz_buf);
|
||||
else
|
||||
qtee_shmbridge_free_shm(&shm);
|
||||
} else
|
||||
ret = -EINVAL;
|
||||
|
||||
/* Initialize context aware feature, if enabled. */
|
||||
if (!ret && priv->ctxt_aware_enable) {
|
||||
if (priv->is_64 && qcom_scm_dcvs_ca_available()) {
|
||||
ret = tz_init_ca(dev, priv);
|
||||
/*
|
||||
* If context aware feature initialization fails,
|
||||
* just print an error message and return
|
||||
* success as normal DCVS will still work.
|
||||
*/
|
||||
if (ret) {
|
||||
pr_err(TAG "tz: context aware DCVS init failed\n");
|
||||
priv->ctxt_aware_enable = false;
|
||||
return 0;
|
||||
}
|
||||
} else {
|
||||
pr_warn(TAG "tz: context aware DCVS not supported\n");
|
||||
priv->ctxt_aware_enable = false;
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static inline int devfreq_get_freq_level(struct devfreq *devfreq,
|
||||
unsigned long freq)
|
||||
{
|
||||
int lev;
|
||||
|
||||
for (lev = 0; lev < devfreq->profile->max_state; lev++)
|
||||
if (freq == devfreq->profile->freq_table[lev])
|
||||
return lev;
|
||||
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
static int tz_get_target_freq(struct devfreq *devfreq, unsigned long *freq)
|
||||
{
|
||||
int result = 0;
|
||||
struct devfreq_msm_adreno_tz_data *priv = devfreq->data;
|
||||
struct devfreq_dev_status *stats = &devfreq->last_status;
|
||||
int val, level = 0;
|
||||
int context_count = 0;
|
||||
u64 busy_time;
|
||||
|
||||
if (!priv)
|
||||
return 0;
|
||||
|
||||
/* keeps stats.private_data == NULL */
|
||||
result = devfreq_update_stats(devfreq);
|
||||
if (result) {
|
||||
pr_err(TAG "get_status failed %d\n", result);
|
||||
return result;
|
||||
}
|
||||
|
||||
*freq = stats->current_frequency;
|
||||
priv->bin.total_time += stats->total_time;
|
||||
|
||||
/* Update gpu busy time as per mod_percent */
|
||||
busy_time = stats->busy_time * priv->mod_percent;
|
||||
do_div(busy_time, 100);
|
||||
|
||||
/* busy_time should not go over total_time */
|
||||
stats->busy_time = min_t(u64, busy_time, stats->total_time);
|
||||
|
||||
priv->bin.busy_time += stats->busy_time;
|
||||
|
||||
if (stats->private_data)
|
||||
context_count = *((int *)stats->private_data);
|
||||
|
||||
/* Update the GPU load statistics */
|
||||
compute_work_load(stats, priv, devfreq);
|
||||
/*
|
||||
* Do not waste CPU cycles running this algorithm if
|
||||
* the GPU just started, or if less than FLOOR time
|
||||
* has passed since the last run or the gpu hasn't been
|
||||
* busier than MIN_BUSY.
|
||||
*/
|
||||
if ((stats->total_time == 0) ||
|
||||
(priv->bin.total_time < FLOOR) ||
|
||||
(unsigned int) priv->bin.busy_time < MIN_BUSY) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
level = devfreq_get_freq_level(devfreq, stats->current_frequency);
|
||||
if (level < 0) {
|
||||
pr_err(TAG "bad freq %ld\n", stats->current_frequency);
|
||||
return level;
|
||||
}
|
||||
|
||||
/*
|
||||
* If there is an extended block of busy processing,
|
||||
* increase frequency. Otherwise run the normal algorithm.
|
||||
*/
|
||||
if (!priv->disable_busy_time_burst &&
|
||||
priv->bin.busy_time > CEILING) {
|
||||
val = -1 * level;
|
||||
} else {
|
||||
val = __secure_tz_update_entry3(level, priv->bin.total_time,
|
||||
priv->bin.busy_time, context_count, priv);
|
||||
}
|
||||
|
||||
priv->bin.total_time = 0;
|
||||
priv->bin.busy_time = 0;
|
||||
|
||||
/*
|
||||
* If the decision is to move to a different level, make sure the GPU
|
||||
* frequency changes.
|
||||
*/
|
||||
if (val) {
|
||||
level += val;
|
||||
level = max(level, 0);
|
||||
level = min_t(int, level, devfreq->profile->max_state - 1);
|
||||
}
|
||||
|
||||
*freq = devfreq->profile->freq_table[level];
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __tz_init(struct devfreq *devfreq)
|
||||
{
|
||||
struct devfreq_msm_adreno_tz_data *priv;
|
||||
unsigned int tz_pwrlevels[MSM_ADRENO_MAX_PWRLEVELS + 1];
|
||||
int i, out, ret;
|
||||
unsigned int version;
|
||||
|
||||
struct msm_adreno_extended_profile *gpu_profile = container_of(
|
||||
(devfreq->profile),
|
||||
struct msm_adreno_extended_profile,
|
||||
profile);
|
||||
|
||||
/*
|
||||
* Assuming that we have only one instance of the adreno device
|
||||
* connected to this governor,
|
||||
* can safely restore the pointer to the governor private data
|
||||
* from the container of the device profile
|
||||
*/
|
||||
devfreq->data = gpu_profile->private_data;
|
||||
|
||||
priv = devfreq->data;
|
||||
|
||||
out = 1;
|
||||
if (devfreq->profile->max_state < ARRAY_SIZE(tz_pwrlevels)) {
|
||||
for (i = 0; i < devfreq->profile->max_state; i++)
|
||||
tz_pwrlevels[out++] = devfreq->profile->freq_table[i];
|
||||
tz_pwrlevels[0] = i;
|
||||
} else {
|
||||
pr_err(TAG "tz_pwrlevels[] is too short\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
ret = tz_init(&devfreq->dev, priv, tz_pwrlevels, sizeof(tz_pwrlevels),
|
||||
&version, sizeof(version));
|
||||
if (ret != 0 || version > MAX_TZ_VERSION) {
|
||||
pr_err(TAG "tz_init failed\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tz_start(struct devfreq *devfreq)
|
||||
{
|
||||
int i, ret;
|
||||
|
||||
ret = __tz_init(devfreq);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
for (i = 0; adreno_tz_attr_list[i] != NULL; i++)
|
||||
device_create_file(&devfreq->dev, adreno_tz_attr_list[i]);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tz_stop(struct devfreq *devfreq)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; adreno_tz_attr_list[i] != NULL; i++)
|
||||
device_remove_file(&devfreq->dev, adreno_tz_attr_list[i]);
|
||||
|
||||
/* leaving the governor and cleaning the pointer to private data */
|
||||
devfreq->data = NULL;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tz_suspend(struct devfreq *devfreq)
|
||||
{
|
||||
struct devfreq_msm_adreno_tz_data *priv = devfreq->data;
|
||||
unsigned int scm_data[2] = {0, 0};
|
||||
|
||||
if (!priv)
|
||||
return 0;
|
||||
|
||||
__secure_tz_reset_entry2(scm_data, sizeof(scm_data), priv->is_64);
|
||||
|
||||
priv->bin.total_time = 0;
|
||||
priv->bin.busy_time = 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tz_handler(struct devfreq *devfreq, unsigned int event, void *data)
|
||||
{
|
||||
int result;
|
||||
struct device_node *node = devfreq->dev.parent->of_node;
|
||||
|
||||
if (!of_device_is_compatible(node, "qcom,kgsl-3d0"))
|
||||
return -EINVAL;
|
||||
|
||||
switch (event) {
|
||||
case DEVFREQ_GOV_START:
|
||||
result = tz_start(devfreq);
|
||||
break;
|
||||
|
||||
case DEVFREQ_GOV_STOP:
|
||||
spin_lock(&suspend_lock);
|
||||
suspend_start = 0;
|
||||
spin_unlock(&suspend_lock);
|
||||
result = tz_stop(devfreq);
|
||||
break;
|
||||
|
||||
case DEVFREQ_GOV_SUSPEND:
|
||||
result = tz_suspend(devfreq);
|
||||
if (!result) {
|
||||
spin_lock(&suspend_lock);
|
||||
/* Collect the start sample for suspend time */
|
||||
suspend_start = (u64)ktime_to_ms(ktime_get());
|
||||
spin_unlock(&suspend_lock);
|
||||
}
|
||||
break;
|
||||
|
||||
case DEVFREQ_GOV_RESUME:
|
||||
spin_lock(&suspend_lock);
|
||||
suspend_time += suspend_time_ms();
|
||||
/* Reset the suspend_start when gpu resumes */
|
||||
suspend_start = 0;
|
||||
spin_unlock(&suspend_lock);
|
||||
fallthrough;
|
||||
case DEVFREQ_GOV_UPDATE_INTERVAL:
|
||||
/* This governor doesn't use polling */
|
||||
fallthrough;
|
||||
default:
|
||||
result = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
static struct devfreq_governor msm_adreno_tz = {
|
||||
.name = "msm-adreno-tz",
|
||||
.get_target_freq = tz_get_target_freq,
|
||||
.event_handler = tz_handler,
|
||||
.flags = DEVFREQ_GOV_FLAG_IMMUTABLE,
|
||||
};
|
||||
|
||||
int msm_adreno_tz_reinit(struct devfreq *devfreq)
|
||||
{
|
||||
return __tz_init(devfreq);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(msm_adreno_tz_reinit);
|
||||
|
||||
int msm_adreno_tz_init(void)
|
||||
{
|
||||
return devfreq_add_governor(&msm_adreno_tz);
|
||||
}
|
||||
subsys_initcall(msm_adreno_tz_init);
|
||||
|
||||
void msm_adreno_tz_exit(void)
|
||||
{
|
||||
int ret = devfreq_remove_governor(&msm_adreno_tz);
|
||||
|
||||
if (ret)
|
||||
pr_err(TAG "failed to remove governor %d\n", ret);
|
||||
}
|
||||
module_exit(msm_adreno_tz_exit);
|
||||
|
||||
MODULE_LICENSE("GPL");
|
Reference in New Issue
Block a user