samsung_sm8750/android_kernel_samsung_sm8750
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

arm64: tegra: Drop remaining serial clock-names and reset-names

Browse Source 
[ Upstream commit 4cd763297c2203c6ba587d7d4a9105f96597b998 ]

The referenced commit only removed some of the names, missing all that
weren't in use at the time. The commit removes the rest.

Fixes: 71de0a054d ("arm64: tegra: Drop serial clock-names and reset-names")
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Link: https://lore.kernel.org/r/20250428-tegra-serial-fixes-v1-1-4f47c5d85bf6@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Aaron Kling
2025-04-28 20:51:47 -05:00
committed by Greg Kroah-Hartman
parent 1aaffafdd4
commit 38caeda97b
2 changed files with 0 additions and 24 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
arch/arm64/boot/dts/nvidia/tegra186.dtsi
View File

@@ -621,9 +621,7 @@
reg-shift = <2>; reg-shift = <2>;
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTB>; clocks = <&bpmp TEGRA186_CLK_UARTB>;
clock-names = "serial";
resets = <&bpmp TEGRA186_RESET_UARTB>; resets = <&bpmp TEGRA186_RESET_UARTB>;
reset-names = "serial";
status = "disabled"; status = "disabled";
}; };
@@ -633,9 +631,7 @@
reg-shift = <2>; reg-shift = <2>;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTD>; clocks = <&bpmp TEGRA186_CLK_UARTD>;
clock-names = "serial";
resets = <&bpmp TEGRA186_RESET_UARTD>; resets = <&bpmp TEGRA186_RESET_UARTD>;
reset-names = "serial";
status = "disabled"; status = "disabled";
}; };
@@ -645,9 +641,7 @@
reg-shift = <2>; reg-shift = <2>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTE>; clocks = <&bpmp TEGRA186_CLK_UARTE>;
clock-names = "serial";
resets = <&bpmp TEGRA186_RESET_UARTE>; resets = <&bpmp TEGRA186_RESET_UARTE>;
reset-names = "serial";
status = "disabled"; status = "disabled";
}; };
@@ -657,9 +651,7 @@
reg-shift = <2>; reg-shift = <2>;
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTF>; clocks = <&bpmp TEGRA186_CLK_UARTF>;
clock-names = "serial";
resets = <&bpmp TEGRA186_RESET_UARTF>; resets = <&bpmp TEGRA186_RESET_UARTF>;
reset-names = "serial";
status = "disabled"; status = "disabled";
}; };
@@ -1236,9 +1228,7 @@
reg-shift = <2>; reg-shift = <2>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTC>; clocks = <&bpmp TEGRA186_CLK_UARTC>;
clock-names = "serial";
resets = <&bpmp TEGRA186_RESET_UARTC>; resets = <&bpmp TEGRA186_RESET_UARTC>;
reset-names = "serial";
status = "disabled"; status = "disabled";
}; };
@@ -1248,9 +1238,7 @@
reg-shift = <2>; reg-shift = <2>;
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTG>; clocks = <&bpmp TEGRA186_CLK_UARTG>;
clock-names = "serial";
resets = <&bpmp TEGRA186_RESET_UARTG>; resets = <&bpmp TEGRA186_RESET_UARTG>;
reset-names = "serial";
status = "disabled"; status = "disabled";
}; };

12
arch/arm64/boot/dts/nvidia/tegra194.dtsi
View File

@@ -766,9 +766,7 @@
reg-shift = <2>; reg-shift = <2>;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_UARTD>; clocks = <&bpmp TEGRA194_CLK_UARTD>;
clock-names = "serial";
resets = <&bpmp TEGRA194_RESET_UARTD>; resets = <&bpmp TEGRA194_RESET_UARTD>;
reset-names = "serial";
status = "disabled"; status = "disabled";
}; };
@@ -778,9 +776,7 @@
reg-shift = <2>; reg-shift = <2>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_UARTE>; clocks = <&bpmp TEGRA194_CLK_UARTE>;
clock-names = "serial";
resets = <&bpmp TEGRA194_RESET_UARTE>; resets = <&bpmp TEGRA194_RESET_UARTE>;
reset-names = "serial";
status = "disabled"; status = "disabled";
}; };
@@ -790,9 +786,7 @@
reg-shift = <2>; reg-shift = <2>;
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_UARTF>; clocks = <&bpmp TEGRA194_CLK_UARTF>;
clock-names = "serial";
resets = <&bpmp TEGRA194_RESET_UARTF>; resets = <&bpmp TEGRA194_RESET_UARTF>;
reset-names = "serial";
status = "disabled"; status = "disabled";
}; };
@@ -817,9 +811,7 @@
reg-shift = <2>; reg-shift = <2>;
interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_UARTH>; clocks = <&bpmp TEGRA194_CLK_UARTH>;
clock-names = "serial";
resets = <&bpmp TEGRA194_RESET_UARTH>; resets = <&bpmp TEGRA194_RESET_UARTH>;
reset-names = "serial";
status = "disabled"; status = "disabled";
}; };
@@ -1616,9 +1608,7 @@
reg-shift = <2>; reg-shift = <2>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_UARTC>; clocks = <&bpmp TEGRA194_CLK_UARTC>;
clock-names = "serial";
resets = <&bpmp TEGRA194_RESET_UARTC>; resets = <&bpmp TEGRA194_RESET_UARTC>;
reset-names = "serial";
status = "disabled"; status = "disabled";
}; };
@@ -1628,9 +1618,7 @@
reg-shift = <2>; reg-shift = <2>;
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_UARTG>; clocks = <&bpmp TEGRA194_CLK_UARTG>;
clock-names = "serial";
resets = <&bpmp TEGRA194_RESET_UARTG>; resets = <&bpmp TEGRA194_RESET_UARTG>;
reset-names = "serial";
status = "disabled"; status = "disabled";
}; };