KVM: SVM: Advertise TSA CPUID bits to guests
Commit 31272abd5974b38ba312e9cf2ec2f09f9dd7dcba upstream. Synthesize the TSA CPUID feature bits for guests. Set TSA_{SQ,L1}_NO on unaffected machines. Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
90293047df
commit
276499bb69
@@ -780,6 +780,7 @@ void kvm_set_cpu_caps(void)
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kvm_cpu_cap_mask(CPUID_8000_0021_EAX,
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kvm_cpu_cap_mask(CPUID_8000_0021_EAX,
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F(NO_NESTED_DATA_BP) | F(LFENCE_RDTSC) | 0 /* SmmPgCfgLock */ |
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F(NO_NESTED_DATA_BP) | F(LFENCE_RDTSC) | 0 /* SmmPgCfgLock */ |
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F(VERW_CLEAR) |
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F(NULL_SEL_CLR_BASE) | F(AUTOIBRS) | 0 /* PrefetchCtlMsr */
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F(NULL_SEL_CLR_BASE) | F(AUTOIBRS) | 0 /* PrefetchCtlMsr */
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);
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);
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@@ -790,6 +791,10 @@ void kvm_set_cpu_caps(void)
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F(PERFMON_V2)
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F(PERFMON_V2)
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);
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);
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kvm_cpu_cap_init_kvm_defined(CPUID_8000_0021_ECX,
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F(TSA_SQ_NO) | F(TSA_L1_NO)
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);
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/*
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/*
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* Synthesize "LFENCE is serializing" into the AMD-defined entry in
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* Synthesize "LFENCE is serializing" into the AMD-defined entry in
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* KVM's supported CPUID if the feature is reported as supported by the
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* KVM's supported CPUID if the feature is reported as supported by the
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@@ -1296,8 +1301,9 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
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entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
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entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
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break;
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break;
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case 0x80000021:
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case 0x80000021:
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entry->ebx = entry->ecx = entry->edx = 0;
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entry->ebx = entry->edx = 0;
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cpuid_entry_override(entry, CPUID_8000_0021_EAX);
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cpuid_entry_override(entry, CPUID_8000_0021_EAX);
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cpuid_entry_override(entry, CPUID_8000_0021_ECX);
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break;
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break;
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/* AMD Extended Performance Monitoring and Debug */
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/* AMD Extended Performance Monitoring and Debug */
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case 0x80000022: {
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case 0x80000022: {
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@@ -17,6 +17,7 @@ enum kvm_only_cpuid_leafs {
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CPUID_8000_0007_EDX,
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CPUID_8000_0007_EDX,
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CPUID_8000_0022_EAX,
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CPUID_8000_0022_EAX,
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CPUID_7_2_EDX,
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CPUID_7_2_EDX,
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CPUID_8000_0021_ECX,
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NR_KVM_CPU_CAPS,
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NR_KVM_CPU_CAPS,
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NKVMCAPINTS = NR_KVM_CPU_CAPS - NCAPINTS,
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NKVMCAPINTS = NR_KVM_CPU_CAPS - NCAPINTS,
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@@ -61,6 +62,10 @@ enum kvm_only_cpuid_leafs {
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/* CPUID level 0x80000022 (EAX) */
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/* CPUID level 0x80000022 (EAX) */
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#define KVM_X86_FEATURE_PERFMON_V2 KVM_X86_FEATURE(CPUID_8000_0022_EAX, 0)
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#define KVM_X86_FEATURE_PERFMON_V2 KVM_X86_FEATURE(CPUID_8000_0022_EAX, 0)
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/* CPUID level 0x80000021 (ECX) */
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#define KVM_X86_FEATURE_TSA_SQ_NO KVM_X86_FEATURE(CPUID_8000_0021_ECX, 1)
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#define KVM_X86_FEATURE_TSA_L1_NO KVM_X86_FEATURE(CPUID_8000_0021_ECX, 2)
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struct cpuid_reg {
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struct cpuid_reg {
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u32 function;
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u32 function;
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u32 index;
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u32 index;
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@@ -90,6 +95,7 @@ static const struct cpuid_reg reverse_cpuid[] = {
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[CPUID_8000_0021_EAX] = {0x80000021, 0, CPUID_EAX},
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[CPUID_8000_0021_EAX] = {0x80000021, 0, CPUID_EAX},
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[CPUID_8000_0022_EAX] = {0x80000022, 0, CPUID_EAX},
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[CPUID_8000_0022_EAX] = {0x80000022, 0, CPUID_EAX},
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[CPUID_7_2_EDX] = { 7, 2, CPUID_EDX},
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[CPUID_7_2_EDX] = { 7, 2, CPUID_EDX},
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[CPUID_8000_0021_ECX] = {0x80000021, 0, CPUID_ECX},
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};
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};
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/*
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/*
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@@ -129,6 +135,8 @@ static __always_inline u32 __feature_translate(int x86_feature)
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KVM_X86_TRANSLATE_FEATURE(PERFMON_V2);
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KVM_X86_TRANSLATE_FEATURE(PERFMON_V2);
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KVM_X86_TRANSLATE_FEATURE(RRSBA_CTRL);
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KVM_X86_TRANSLATE_FEATURE(RRSBA_CTRL);
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KVM_X86_TRANSLATE_FEATURE(BHI_CTRL);
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KVM_X86_TRANSLATE_FEATURE(BHI_CTRL);
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KVM_X86_TRANSLATE_FEATURE(TSA_SQ_NO);
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KVM_X86_TRANSLATE_FEATURE(TSA_L1_NO);
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default:
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default:
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return x86_feature;
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return x86_feature;
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}
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}
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