sparc64: Add 'reg_num' argument to pcr_ops methods.
SPARC-T4 and later have multiple PCR registers, one for each PIC counter. Signed-off-by: David S. Miller <davem@davemloft.net>
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@@ -109,7 +109,7 @@ notrace __kprobes void perfctr_irq(int irq, struct pt_regs *regs)
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pt_regs_trap_type(regs), SIGINT) == NOTIFY_STOP)
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touched = 1;
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else
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pcr_ops->write(PCR_PIC_PRIV);
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pcr_ops->write(0, PCR_PIC_PRIV);
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sum = local_cpu_data().irq0_irqs;
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if (__get_cpu_var(nmi_touch)) {
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@@ -127,7 +127,7 @@ notrace __kprobes void perfctr_irq(int irq, struct pt_regs *regs)
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}
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if (__get_cpu_var(wd_enabled)) {
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write_pic(picl_value(nmi_hz));
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pcr_ops->write(pcr_enable);
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pcr_ops->write(0, pcr_enable);
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}
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restore_hardirq_stack(orig_sp);
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@@ -166,7 +166,7 @@ static void report_broken_nmi(int cpu, int *prev_nmi_count)
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void stop_nmi_watchdog(void *unused)
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{
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pcr_ops->write(PCR_PIC_PRIV);
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pcr_ops->write(0, PCR_PIC_PRIV);
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__get_cpu_var(wd_enabled) = 0;
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atomic_dec(&nmi_active);
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}
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@@ -223,10 +223,10 @@ void start_nmi_watchdog(void *unused)
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__get_cpu_var(wd_enabled) = 1;
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atomic_inc(&nmi_active);
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pcr_ops->write(PCR_PIC_PRIV);
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pcr_ops->write(0, PCR_PIC_PRIV);
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write_pic(picl_value(nmi_hz));
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pcr_ops->write(pcr_enable);
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pcr_ops->write(0, pcr_enable);
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}
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static void nmi_adjust_hz_one(void *unused)
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@@ -234,10 +234,10 @@ static void nmi_adjust_hz_one(void *unused)
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if (!__get_cpu_var(wd_enabled))
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return;
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pcr_ops->write(PCR_PIC_PRIV);
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pcr_ops->write(0, PCR_PIC_PRIV);
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write_pic(picl_value(nmi_hz));
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pcr_ops->write(pcr_enable);
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pcr_ops->write(0, pcr_enable);
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}
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void nmi_adjust_hz(unsigned int new_hz)
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