samsung_sm8750/android_kernel_samsung_sm8750
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

xillybus.txt: standardize document format

Browse Source 
Each text file under Documentation follows a different
format. Some doesn't even have titles!

Change its representation to follow the adopted standard,
using ReST markups for it to be parseable by Sphinx:
- Adjust indentation;
- Mark authorship;
- Comment internal contents table;
- Mark literal blocks;
- Don't use all-upercase titles.

Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
This commit is contained in:
Mauro Carvalho Chehab
2017-05-17 09:45:31 -03:00
committed by Jonathan Corbet
parent c6f4d41338
commit 05a07392c3
1 changed files with 14 additions and 15 deletions
Download Patch File Download Diff File Expand all files Collapse all files

17
Documentation/xillybus.txt
View File

@@ -1,12 +1,11 @@
========================================== ==========================================
Xillybus driver for generic FPGA interface Xillybus driver for generic FPGA interface
========================================== ==========================================
Author: Eli Billauer, Xillybus Ltd. (http://xillybus.com) :Author: Eli Billauer, Xillybus Ltd. (http://xillybus.com)
Email: eli.billauer@gmail.com or as advertised on Xillybus' site. :Email: eli.billauer@gmail.com or as advertised on Xillybus' site.
Contents: .. Contents:
- Introduction - Introduction
-- Background -- Background
@@ -29,7 +28,7 @@ Contents:
-- The "nonempty" message (supporting poll) -- The "nonempty" message (supporting poll)
INTRODUCTION Introduction
============ ============
Background Background
@@ -105,7 +104,7 @@ driver is used to work out of the box with any Xillybus IP core.
The data structure just mentioned should not be confused with PCI's The data structure just mentioned should not be confused with PCI's
configuration space or the Flattened Device Tree. configuration space or the Flattened Device Tree.
USAGE Usage
===== =====
User interface User interface
@@ -117,7 +116,7 @@ names of these files depend on the IP core that is loaded in the FPGA (see
Probing below). To communicate with the FPGA, open the device file that Probing below). To communicate with the FPGA, open the device file that
corresponds to the hardware FIFO you want to send data or receive data from, corresponds to the hardware FIFO you want to send data or receive data from,
and use plain write() or read() calls, just like with a regular pipe. In and use plain write() or read() calls, just like with a regular pipe. In
particular, it makes perfect sense to go: particular, it makes perfect sense to go::
$ cat mydata > /dev/xillybus_thisfifo $ cat mydata > /dev/xillybus_thisfifo
@@ -178,7 +177,7 @@ the attached memory is done by seeking to the desired address, and calling
read() or write() as required. read() or write() as required.
INTERNALS Internals
========= =========
Source code organization Source code organization
@@ -365,7 +364,7 @@ into that page. It can be shown that all pages requested from the kernel
(except possibly for the last) are 100% utilized this way. (except possibly for the last) are 100% utilized this way.
The "nonempty" message (supporting poll) The "nonempty" message (supporting poll)
--------------------------------------- ----------------------------------------
In order to support the "poll" method (and hence select() ), there is a small In order to support the "poll" method (and hence select() ), there is a small
catch regarding the FPGA to host direction: The FPGA may have filled a DMA catch regarding the FPGA to host direction: The FPGA may have filled a DMA