&remoteproc_adsp_glink {
	qcom,fastrpc {
		compatible = "qcom,fastrpc";
		qcom,glink-channels = "fastrpcglink-apps-dsp";
		qcom,intents = <0x64 64>;
		label = "adsp";
		memory-region = <&adsp_mem_heap>;
		qcom,vmids = <22 37>;

		compute-cb@1 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <3>;
			iommus = <&apps_smmu 0x00A3 0x0000>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable", "HUPCF";
			dma-coherent;
		};

		compute-cb@2 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <4>;
			iommus = <&apps_smmu 0x00A4 0x0000>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable", "HUPCF";
			dma-coherent;
		};

		compute-cb@3 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <5>;
			iommus = <&apps_smmu 0x00A5 0x0000>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable", "HUPCF";
			qcom,nsessions = <8>;
			dma-coherent;
		};

		compute-cb@4 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <6>;
			iommus = <&apps_smmu 0x00A6 0x0000>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable", "HUPCF";
			dma-coherent;
		};

		compute-cb@5 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <7>;
			iommus = <&apps_smmu 0x00A7 0x0000>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable", "HUPCF";
			dma-coherent;
		};
	};
};

&remoteproc_cdsp_glink {
	qcom,fastrpc {
		compatible = "qcom,fastrpc";
		qcom,glink-channels = "fastrpcglink-apps-dsp";
		qcom,intents = <0x64 64>;
		label = "cdsp";
		qcom,fastrpc-gids = <2908>;
		qcom,rpc-latency-us = <611>;

		compute-cb@1 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <1>;
			iommus = <&apps_smmu 0x1001 0x0000>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable", "HUPCF";
			dma-coherent;
		};

		compute-cb@2 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <2>;
			iommus = <&apps_smmu 0x1002 0x0000>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable", "HUPCF";
			dma-coherent;
		};

		compute-cb@3 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <3>;
			iommus = <&apps_smmu 0x1003 0x0000>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable", "HUPCF";
			dma-coherent;
		};

		compute-cb@4 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <4>;
			iommus = <&apps_smmu 0x1004 0x0000>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable", "HUPCF";
			dma-coherent;
		};

		compute-cb@5 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <5>;
			iommus = <&apps_smmu 0x1005 0x0000>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable", "HUPCF";
			dma-coherent;
		};

		compute-cb@6 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <6>;
			iommus = <&apps_smmu 0x1006 0x0000>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable", "HUPCF";
			dma-coherent;
		};

		compute-cb@9 {
			compatible = "qcom,fastrpc-compute-cb";
			reg = <9>;
			qcom,secure-context-bank;
			iommus = <&apps_smmu 0x1009 0x0000>;
			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
			qcom,iommu-faults = "stall-disable", "HUPCF";
			qcom,iommu-vmid = <0xA>;	/* VMID_CP_PIXEL */
			dma-coherent;
		};
	};
};