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sm8750: init kernel modules repo

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This commit is contained in:
Sascha Nesterovic
2025-08-11 12:21:01 +02:00
parent 2681143b87
commit facad83b01
8851 changed files with 6894561 additions and 0 deletions
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10
qcom/opensource/camera-kernel/include/uapi/Android.mk Normal file
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# Standalone camera UAPI header android target
LOCAL_PATH := $(call my-dir)
# Path variable for other modules to include for compilation
LOCAL_EXPORT_CAMERA_UAPI_INCLUDE := $(LOCAL_PATH)/camera/
CAMERA_HEADERS := $(call all-subdir-named-files,*.h)
KERNEL_SCRIPTS := $(LOCAL_PATH)/kernel/msm-$(TARGET_KERNEL_VERSION)/scripts
include $(CLEAR_VARS)
LOCAL_MODULE := camera-uapi

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qcom/opensource/camera-kernel/include/uapi/camera/media/cam_cpas.h Normal file
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/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef __UAPI_CAM_CPAS_H__
#define __UAPI_CAM_CPAS_H__
#include <media/cam_defs.h>
#define CAM_FAMILY_CAMERA_SS 1
#define CAM_FAMILY_CPAS_SS 2
/* AXI BW Voting Version */
#define CAM_AXI_BW_VOTING_V2 2
/* AXI BW Voting Transaction Type */
#define CAM_AXI_TRANSACTION_READ 0
#define CAM_AXI_TRANSACTION_WRITE 1
/* AXI BW Voting Path Data Type */
#define CAM_AXI_PATH_DATA_IFE_START_OFFSET 0
#define CAM_AXI_PATH_DATA_IFE_LINEAR (CAM_AXI_PATH_DATA_IFE_START_OFFSET + 0)
#define CAM_AXI_PATH_DATA_IFE_VID (CAM_AXI_PATH_DATA_IFE_START_OFFSET + 1)
#define CAM_AXI_PATH_DATA_IFE_DISP (CAM_AXI_PATH_DATA_IFE_START_OFFSET + 2)
#define CAM_AXI_PATH_DATA_IFE_STATS (CAM_AXI_PATH_DATA_IFE_START_OFFSET + 3)
#define CAM_AXI_PATH_DATA_IFE_RDI0 (CAM_AXI_PATH_DATA_IFE_START_OFFSET + 4)
#define CAM_AXI_PATH_DATA_IFE_RDI1 (CAM_AXI_PATH_DATA_IFE_START_OFFSET + 5)
#define CAM_AXI_PATH_DATA_IFE_RDI2 (CAM_AXI_PATH_DATA_IFE_START_OFFSET + 6)
#define CAM_AXI_PATH_DATA_IFE_RDI3 (CAM_AXI_PATH_DATA_IFE_START_OFFSET + 7)
#define CAM_AXI_PATH_DATA_IFE_PDAF (CAM_AXI_PATH_DATA_IFE_START_OFFSET + 8)
#define CAM_AXI_PATH_DATA_IFE_PIXEL_RAW \
(CAM_AXI_PATH_DATA_IFE_START_OFFSET + 9)
#define CAM_AXI_PATH_DATA_IFE_FULL (CAM_AXI_PATH_DATA_IFE_START_OFFSET + 10)
#define CAM_AXI_PATH_DATA_IFE_DS2 (CAM_AXI_PATH_DATA_IFE_START_OFFSET + 11)
#define CAM_AXI_PATH_DATA_IFE_DS4 (CAM_AXI_PATH_DATA_IFE_START_OFFSET + 12)
#define CAM_AXI_PATH_DATA_IFE_DS16 (CAM_AXI_PATH_DATA_IFE_START_OFFSET + 13)
#define CAM_AXI_PATH_DATA_IFE_RDI4 (CAM_AXI_PATH_DATA_IFE_START_OFFSET + 14)
#define CAM_AXI_PATH_DATA_IFE_PDAF_1 (CAM_AXI_PATH_DATA_IFE_START_OFFSET + 15)
#define CAM_AXI_PATH_DATA_IFE_PDAF_2 (CAM_AXI_PATH_DATA_IFE_START_OFFSET + 16)
#define CAM_AXI_PATH_DATA_IFE_PDAF_3 (CAM_AXI_PATH_DATA_IFE_START_OFFSET + 17)
#define CAM_AXI_PATH_DATA_IFE_IR (CAM_AXI_PATH_DATA_IFE_START_OFFSET + 18)
#define CAM_AXI_PATH_DATA_IFE_FD (CAM_AXI_PATH_DATA_IFE_START_OFFSET + 19)
#define CAM_AXI_PATH_DATA_IFE_MAX_OFFSET \
(CAM_AXI_PATH_DATA_IFE_START_OFFSET + 31)
#define CAM_AXI_PATH_DATA_IPE_START_OFFSET 32
#define CAM_AXI_PATH_DATA_IPE_RD_IN (CAM_AXI_PATH_DATA_IPE_START_OFFSET + 0)
#define CAM_AXI_PATH_DATA_IPE_RD_REF (CAM_AXI_PATH_DATA_IPE_START_OFFSET + 1)
#define CAM_AXI_PATH_DATA_IPE_WR_VID (CAM_AXI_PATH_DATA_IPE_START_OFFSET + 2)
#define CAM_AXI_PATH_DATA_IPE_WR_DISP (CAM_AXI_PATH_DATA_IPE_START_OFFSET + 3)
#define CAM_AXI_PATH_DATA_IPE_WR_REF (CAM_AXI_PATH_DATA_IPE_START_OFFSET + 4)
#define CAM_AXI_PATH_DATA_IPE_WR_APP (CAM_AXI_PATH_DATA_IPE_START_OFFSET + 5)
#define CAM_AXI_PATH_DATA_IPE_MAX_OFFSET \
(CAM_AXI_PATH_DATA_IPE_START_OFFSET + 31)
#define CAM_AXI_PATH_DATA_OPE_START_OFFSET 64
#define CAM_AXI_PATH_DATA_OPE_RD_IN (CAM_AXI_PATH_DATA_OPE_START_OFFSET + 0)
#define CAM_AXI_PATH_DATA_OPE_RD_REF (CAM_AXI_PATH_DATA_OPE_START_OFFSET + 1)
#define CAM_AXI_PATH_DATA_OPE_WR_VID (CAM_AXI_PATH_DATA_OPE_START_OFFSET + 2)
#define CAM_AXI_PATH_DATA_OPE_WR_DISP (CAM_AXI_PATH_DATA_OPE_START_OFFSET + 3)
#define CAM_AXI_PATH_DATA_OPE_WR_REF (CAM_AXI_PATH_DATA_OPE_START_OFFSET + 4)
#define CAM_AXI_PATH_DATA_OPE_MAX_OFFSET \
(CAM_AXI_PATH_DATA_OPE_START_OFFSET + 31)
#define CAM_AXI_PATH_DATA_SFE_START_OFFSET 96
#define CAM_AXI_PATH_DATA_SFE_NRDI (CAM_AXI_PATH_DATA_SFE_START_OFFSET + 0)
#define CAM_AXI_PATH_DATA_SFE_RDI0 (CAM_AXI_PATH_DATA_SFE_START_OFFSET + 1)
#define CAM_AXI_PATH_DATA_SFE_RDI1 (CAM_AXI_PATH_DATA_SFE_START_OFFSET + 2)
#define CAM_AXI_PATH_DATA_SFE_RDI2 (CAM_AXI_PATH_DATA_SFE_START_OFFSET + 3)
#define CAM_AXI_PATH_DATA_SFE_RDI3 (CAM_AXI_PATH_DATA_SFE_START_OFFSET + 4)
#define CAM_AXI_PATH_DATA_SFE_RDI4 (CAM_AXI_PATH_DATA_SFE_START_OFFSET + 5)
#define CAM_AXI_PATH_DATA_SFE_STATS (CAM_AXI_PATH_DATA_SFE_START_OFFSET + 6)
#define CAM_AXI_PATH_DATA_SFE_MAX_OFFSET \
(CAM_AXI_PATH_DATA_SFE_START_OFFSET + 31)
#define CAM_AXI_PATH_DATA_CRE_START_OFFSET (CAM_AXI_PATH_DATA_SFE_MAX_OFFSET + 1)
#define CAM_AXI_PATH_DATA_CRE_RD_IN (CAM_AXI_PATH_DATA_CRE_START_OFFSET + 0)
#define CAM_AXI_PATH_DATA_CRE_WR_OUT (CAM_AXI_PATH_DATA_CRE_START_OFFSET + 1)
#define CAM_AXI_PATH_DATA_CRE_MAX_OFFSET \
(CAM_AXI_PATH_DATA_CRE_START_OFFSET + 31)
#define CAM_AXI_PATH_DATA_OFE_START_OFFSET (CAM_AXI_PATH_DATA_CRE_MAX_OFFSET + 1)
#define CAM_AXI_PATH_DATA_OFE_RD_EXT (CAM_AXI_PATH_DATA_OFE_START_OFFSET + 0)
#define CAM_AXI_PATH_DATA_OFE_RD_INT_PDI (CAM_AXI_PATH_DATA_OFE_START_OFFSET + 1)
#define CAM_AXI_PATH_DATA_OFE_RD_INT_HDR (CAM_AXI_PATH_DATA_OFE_START_OFFSET + 2)
#define CAM_AXI_PATH_DATA_OFE_WR_VID (CAM_AXI_PATH_DATA_OFE_START_OFFSET + 3)
#define CAM_AXI_PATH_DATA_OFE_WR_DISP (CAM_AXI_PATH_DATA_OFE_START_OFFSET + 4)
#define CAM_AXI_PATH_DATA_OFE_WR_IR (CAM_AXI_PATH_DATA_OFE_START_OFFSET + 5)
#define CAM_AXI_PATH_DATA_OFE_WR_HDR_LTM (CAM_AXI_PATH_DATA_OFE_START_OFFSET + 6)
#define CAM_AXI_PATH_DATA_OFE_WR_DC4 (CAM_AXI_PATH_DATA_OFE_START_OFFSET + 7)
#define CAM_AXI_PATH_DATA_OFE_WR_AI (CAM_AXI_PATH_DATA_OFE_START_OFFSET + 8)
#define CAM_AXI_PATH_DATA_OFE_WR_PDI (CAM_AXI_PATH_DATA_OFE_START_OFFSET + 9)
#define CAM_AXI_PATH_DATA_OFE_WR_IDEALRAW (CAM_AXI_PATH_DATA_OFE_START_OFFSET + 10)
#define CAM_AXI_PATH_DATA_OFE_WR_STATS (CAM_AXI_PATH_DATA_OFE_START_OFFSET + 11)
#define CAM_AXI_PATH_DATA_OFE_MAX_OFFSET \
(CAM_AXI_PATH_DATA_OFE_START_OFFSET + 31)
#define CAM_AXI_PATH_DATA_ALL 256
#define CAM_CPAS_FUSES_MAX 32
#define CAM_CPAS_DOMAIN_ID_MAX 5
/* DRV Vote level */
#define CAM_CPAS_VOTE_LEVEL_HIGH 1
#define CAM_CPAS_VOTE_LEVEL_LOW 2
/* Domain id types */
#define CAM_CPAS_NON_SECURE_DOMAIN 0
#define CAM_CPAS_SECURE_DOMAIN 1
/* sysfs entry of camera subparts info */
#define CAM_SYSFS_SUBPARTS_INFO_FILENAME "subparts_info"
/* Total number of sys cache */
#define CAM_NUM_SYS_CACHE 20
/* sys cache type */
#define CAM_LLCC_SMALL_1 0
#define CAM_LLCC_SMALL_2 1
#define CAM_LLCC_LARGE_1 2
#define CAM_LLCC_LARGE_2 3
#define CAM_LLCC_LARGE_3 4
#define CAM_LLCC_LARGE_4 5
#define CAM_LLCC_OFE_IP 6
#define CAM_LLCC_IPE_RT_IP 7
#define CAM_LLCC_IPE_SRT_IP 8
#define CAM_LLCC_IPE_RT_RF 9
#define CAM_LLCC_IPE_SRT_RF 10
/* cam sys cache llcc staling mode */
#define CAM_LLCC_STALING_MODE_CAPACITY 1
#define CAM_LLCC_STALING_MODE_NOTIFY 2
/* cam sys cache operating type */
#define CAM_LLCC_NOTIFY_STALING_EVICT 1
#define CAM_LLCC_NOTIFY_STALING_FORGET 2
/* cam cpas query type */
#define CAM_CPAS_QUERY_BLOB_BASE CAM_COMMON_QUERY_BLOB_END
#define CAM_CPAS_QUERY_BLOB_V3 (CAM_CPAS_QUERY_BLOB_BASE + 1)
#define CAM_CPAS_QUERY_BLOB_SYSCACHE (CAM_CPAS_QUERY_BLOB_BASE + 2)
/**
* struct cam_cpas_fuse_value - CPAS fuse value
*
* @fuse_id : Camera fuse identification
* @fuse_val : Camera Fuse Value
*/
struct cam_cpas_fuse_value {
__u32 fuse_id;
__u32 fuse_val;
};
/**
* struct cam_cpas_fuse_info - CPAS fuse info
*
* @num_fuses : Number of fuses
* @fuse_val : Array of different fuse info.
*/
struct cam_cpas_fuse_info {
__u32 num_fuses;
struct cam_cpas_fuse_value fuse_val[CAM_CPAS_FUSES_MAX];
};
/**
* struct cam_cpas_domain_id_pairing - CPAS domain id mapping
*
* @domain_type : Domain type
* @mapping_id : ID of domain type
*/
struct cam_cpas_domain_id_pairing {
__u32 domain_type;
__u32 mapping_id;
__u32 num_valid_params;
__u32 valid_param_mask;
__u32 params[4];
};
/**
* struct cam_cpas_domain_id_caps - CPAS domain id info
*
* @is_supported : If domain id is supported on target
* @num_mapping : Number of domain id types supported, if any
* @entries : Stores mapping between domain type and its ID
* @num_valid_params : Number of valid params
* @valid_param_mask : Valid param mask
* @params : These fields are reserved for future extensions
* to this structure.
*/
struct cam_cpas_domain_id_caps {
__u32 is_supported;
__u32 num_mapping;
struct cam_cpas_domain_id_pairing entries[CAM_CPAS_DOMAIN_ID_MAX];
__u32 num_valid_params;
__u32 valid_param_mask;
__u32 params[6];
};
/**
* struct cam_cpas_query_cap - CPAS query device capability payload
*
* @camera_family : Camera family type
* @reserved : Reserved field for alignment
* @camera_version : Camera platform version
* @cpas_version : Camera CPAS version within camera platform
*
*/
struct cam_cpas_query_cap {
__u32 camera_family;
__u32 reserved;
struct cam_hw_version camera_version;
struct cam_hw_version cpas_version;
};
/**
* struct cam_cpas_query_cap - CPAS query device capability payload
*
* @camera_family : Camera family type
* @reserved : Reserved field for alignment
* @camera_version : Camera platform version
* @cpas_version : Camera CPAS version within camera platform
* @fuse_info : Camera fuse info
*
*/
struct cam_cpas_query_cap_v2 {
__u32 camera_family;
__u32 reserved;
struct cam_hw_version camera_version;
struct cam_hw_version cpas_version;
struct cam_cpas_fuse_info fuse_info;
};
/**
* struct cam_cpas_sys_cache_cap - sys cache payload information
*
* @version : struct version
* @scid_id : sys cache id
* @scid_num : sys cache number
* @concur_usage : concurrent usage
*
*/
struct cam_cpas_sys_cache_cap {
__u32 version;
__u32 scid_id;
__u32 scid_num;
__u32 concur_usage;
__u32 num_valid_params;
__u32 valid_param_mask;
__u32 params[10];
};
/**
* struct cam_cpas_sys_cache_query - cache query capability payload
*
* @num_cache : number of cache
* @reserved : reserved paramas
* @sys_cache_cap : information of sys cache
*/
struct cam_cpas_sys_cache_query {
__u32 num_cache;
__u32 reserved;
struct cam_cpas_sys_cache_cap sys_cache_cap[CAM_NUM_SYS_CACHE];
};
/**
* struct cam_cpas_query_cap - CPAS query device capability payload
*
* @version : Struct version
* @camera_family : Camera family type
* @camera_caps : Camera capability
* @camera_version : Camera platform version
* @cpas_version : Camera CPAS version within camera platform
* @fuse_info : Camera fuse info
* @domain_id_info : Domain id info
* @num_valid_params : Number of valid params
* @valid_param_mask : Valid param mask
* @params : Reserved fields to make this query cap
* extendable in the future
*/
struct cam_cpas_query_cap_v3 {
__u32 version;
__u32 camera_family;
__u32 camera_caps;
struct cam_hw_version camera_version;
struct cam_hw_version cpas_version;
struct cam_cpas_fuse_info fuse_info;
struct cam_cpas_domain_id_caps domain_id_info;
__u32 num_valid_params;
__u32 valid_param_mask;
__u32 params[10];
};
/**
* struct cam_axi_per_path_bw_vote_v2 - Per path bandwidth vote information
*
* @usage_data: client usage data (left/right/rdi)
* @transac_type: Transaction type on the path (read/write)
* @path_data_type: Path for which vote is given (video, display, rdi)
* @vote_level: Vote level for this path
* @camnoc_bw: CAMNOC bw for this path
* @mnoc_ab_bw: MNOC AB bw for this path
* @mnoc_ib_bw: MNOC IB bw for this path
* @ddr_ab_bw: DDR AB bw for this path
* @ddr_ib_bw: DDR IB bw for this path
* @num_valid_params: Number of valid params
* @valid_param_mask: Valid param mask
* @params: params
*/
struct cam_axi_per_path_bw_vote_v2 {
__u32 usage_data;
__u32 transac_type;
__u32 path_data_type;
__u32 vote_level;
__u64 camnoc_bw;
__u64 mnoc_ab_bw;
__u64 mnoc_ib_bw;
__u64 ddr_ab_bw;
__u64 ddr_ib_bw;
__u32 num_valid_params;
__u32 valid_param_mask;
__u32 params[4];
};
/**
* struct cam_axi_per_path_bw_vote - Per path bandwidth vote information
*
* @usage_data client usage data (left/right/rdi)
* @transac_type Transaction type on the path (read/write)
* @path_data_type Path for which vote is given (video, display, rdi)
* @reserved Reserved for alignment
* @camnoc_bw CAMNOC bw for this path
* @mnoc_ab_bw MNOC AB bw for this path
* @mnoc_ib_bw MNOC IB bw for this path
* @ddr_ab_bw DDR AB bw for this path
* @ddr_ib_bw DDR IB bw for this path
*/
struct cam_axi_per_path_bw_vote {
__u32 usage_data;
__u32 transac_type;
__u32 path_data_type;
__u32 reserved;
__u64 camnoc_bw;
__u64 mnoc_ab_bw;
__u64 mnoc_ib_bw;
__u64 ddr_ab_bw;
__u64 ddr_ib_bw;
};
#define CAM_CPAS_CUSTOM_CMD_FD_PORT_CFG 0
/**
* struct cam_cpas_fd_port_config : CPAS custom cmd struct for updating FD
* port config
*
* @is_secure Security mode of the FD port
* @reserved Reserved for alignment
*/
struct cam_cpas_fd_port_config {
__u32 is_secure;
__u32 reserved;
};
/**
* struct cam_sys_cache_config - sys cache config information
*
* @version struct version
* @scid_id cache scid id
* @activate sys cache need to activate or not
* @deactivate to deactivate any specific sys cache
* @staling_distance staling distance used for notification
* @llcc_staling_mode staling mode evict/forget
* @llcc_staling_op_type operation type capacity/notify
* @change_params this parameter to tell param change needed or not
* @num_valid_params: Number of valid params
* @valid_param_mask: Valid param mask
* @params: params
*/
struct cam_sys_cache_config {
__u32 version;
__u32 scid_id;
__u32 activate;
__u32 deactivate;
__u32 staling_distance;
__s32 llcc_staling_mode;
__s32 llcc_staling_op_type;
__u32 change_params;
__u32 num_valid_params;
__u32 valid_param_mask;
__u32 params[6];
};
/**
* struct cam_sys_cache_config_request - sys cache config request
*
* @num: num of cache
* @reserved: reserved params
* @sys_cache_config: sys cache config data
*/
struct cam_sys_cache_config_request {
__u32 num;
__u32 reserved;
union {
struct cam_sys_cache_config sys_cache_config[1];
__DECLARE_FLEX_ARRAY(struct cam_sys_cache_config, sys_cache_config_flex);
};
};
#endif /* __UAPI_CAM_CPAS_H__ */

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qcom/opensource/camera-kernel/include/uapi/camera/media/cam_cre.h Normal file
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/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* Copyright (c) 2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef __UAPI_CAM_CRE_H__
#define __UAPI_CAM_CRE_H__
#include <media/cam_defs.h>
#include <media/cam_cpas.h>
#define CAM_CRE_DEV_NAME_SIZE 128
/* CRE HW TYPE */
#define CAM_CRE_HW_TYPE_CRE 0x1
#define CAM_CRE_HW_TYPE_MAX 0x1
/* packet opcode types */
#define CAM_CRE_OPCODE_CONFIG 0x1
/* input port resource type */
#define CAM_CRE_INPUT_IMAGE 0x1
#define CAM_CRE_INPUT_IMAGES_MAX (CAM_CRE_INPUT_IMAGE + 1)
/* output port resource type */
#define CAM_CRE_OUTPUT_IMAGE 0x1
#define CAM_CRE_OUTPUT_IMAGES_MAX (CAM_CRE_OUTPUT_IMAGE + 1)
#define CAM_CRE_MAX_PLANES 0x2
#define CRE_MAX_BATCH_SIZE 0x10
/* definitions needed for cre aquire device */
#define CAM_CRE_DEV_TYPE_NRT 0x1
#define CAM_CRE_DEV_TYPE_RT 0x2
#define CAM_CRE_DEV_TYPE_MAX 0x3
#define CAM_CRE_CMD_META_GENERIC_BLOB 0x1
/* Clock blob */
#define CAM_CRE_CMD_GENERIC_BLOB_CLK_V2 0x1
/**
* struct cam_cre_hw_ver - Device information for particular hw type
*
* This is used to get device version info of CRE
* from hardware and use this info in CAM_QUERY_CAP IOCTL
*
* @hw_ver: Major, minor and incr values of a device version
*/
struct cam_cre_hw_ver {
struct cam_hw_version hw_ver;
};
/**
* struct cam_cre_query_cap_cmd - CRE query device capability payload
*
* @dev_iommu_handle: CRE iommu handles for secure/non secure modes
* @num_dev: Number of cre
* @reserved: Reserved field
* @dev_ver: Returned device capability array
*/
struct cam_cre_query_cap_cmd {
struct cam_iommu_handle dev_iommu_handle;
__u32 num_dev;
__u32 reserved;
struct cam_cre_hw_ver dev_ver[CAM_CRE_HW_TYPE_MAX];
};
/**
* struct cam_cre_io_buf_info - CRE IO buffers meta
*
* @direction: Direction of a buffer of a port(Input/Output)
* @res_id: Resource ID
* @num_planes: Number of planes
* @width: Height of a plane buffer
* @height: Height of a plane buffer
* @stride: Plane stride
* @format: unpacker format for FE, packer format for WE
* @alignment: Alignment
* @reserved: Reserved field 0
*/
struct cam_cre_io_buf_info {
__u32 direction;
__u32 res_id;
__u32 num_planes;
__u32 width;
__u32 height;
__u32 stride;
__u32 fence;
__u32 format;
__u32 alignment;
__u32 reserved;
};
/**
* struct cam_cre_acquire_dev_info - An CRE device info
*
* @dev_type: NRT/RT Acquire
* @dev_name: Device name (CRE)
* @secure_mode: Tells if CRE will process the secure buff or not.
* @batch_size: Batch size
* @num_in_res: Number of In resources
* @num_out_res: Number of Out resources
* @reserved: Reserved field 0
* @in_res: In resource info
* @in_res: Out resource info
*/
struct cam_cre_acquire_dev_info {
char dev_name[CAM_CRE_DEV_NAME_SIZE];
__u32 dev_type;
__u32 secure_mode;
__u32 batch_size;
__u32 num_in_res;
__u32 num_out_res;
__u32 reserved;
struct cam_cre_io_buf_info in_res[CAM_CRE_INPUT_IMAGES_MAX];
struct cam_cre_io_buf_info out_res[CAM_CRE_OUTPUT_IMAGES_MAX];
}__attribute__((__packed__));
/**
* struct cre_clk_bw_request_v2
*
* @budget_ns: Time required to process frame
* @frame_cycles: Frame cycles needed to process the frame
* @rt_flag: Flag to indicate real time stream
* @reserved: Reserved field 0
* @num_path: Number of AXI Paths
*/
struct cre_clk_bw_request_v2 {
__u64 budget_ns;
__u32 frame_cycles;
__u32 rt_flag;
__u32 reserved;
__u32 num_paths;
union {
struct cam_axi_per_path_bw_vote axi_path[1];
__DECLARE_FLEX_ARRAY(struct cam_axi_per_path_bw_vote, axi_path_flex);
};
};
#endif /* __UAPI_CAM_CRE_H__ */

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qcom/opensource/camera-kernel/include/uapi/camera/media/cam_custom.h Normal file
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/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef __UAPI_CAM_CUSTOM_H__
#define __UAPI_CAM_CUSTOM_H__
#include <media/cam_defs.h>
/* Custom driver name */
#define CAM_CUSTOM_DEV_NAME "cam-custom"
#define CAM_CUSTOM_NUM_SUB_DEVICES 2
/* HW type */
#define CAM_CUSTOM_HW1 0
#define CAM_CUSTOM_HW2 1
/* output path resource id's */
#define CAM_CUSTOM_OUT_RES_UDI_0 1
#define CAM_CUSTOM_OUT_RES_UDI_1 2
#define CAM_CUSTOM_OUT_RES_UDI_2 3
/* input resource for custom hw */
#define CAM_CUSTOM_IN_RES_UDI_0 1
/* Resource ID */
#define CAM_CUSTOM_RES_ID_PORT 0
/* Packet opcode for Custom */
#define CAM_CUSTOM_PACKET_OP_BASE 0
#define CAM_CUSTOM_PACKET_INIT_DEV 1
#define CAM_CUSTOM_PACKET_UPDATE_DEV 2
#define CAM_CUSTOM_PACKET_OP_MAX 3
/* max number of vc-dt cfg for a given input */
#define CAM_CUSTOM_VC_DT_CFG_MAX 4
/* phy input resource types */
#define CAM_CUSTOM_IN_RES_BASE 0x5000
#define CAM_CUSTOM_IN_RES_PHY_0 (CAM_CUSTOM_IN_RES_BASE + 1)
#define CAM_CUSTOM_IN_RES_PHY_1 (CAM_CUSTOM_IN_RES_BASE + 2)
#define CAM_CUSTOM_IN_RES_PHY_2 (CAM_CUSTOM_IN_RES_BASE + 3)
#define CAM_CUSTOM_IN_RES_PHY_3 (CAM_CUSTOM_IN_RES_BASE + 4)
/* Query devices */
/**
* struct cam_custom_dev_cap_info - A cap info for particular hw type
*
* @hw_type: Custom HW type
* @hw_version: Hardware version
*
*/
struct cam_custom_dev_cap_info {
__u32 hw_type;
__u32 hw_version;
};
/**
* struct cam_custom_query_cap_cmd - Custom HW query device capability payload
*
* @device_iommu: returned iommu handles for device
* @cdm_iommu: returned iommu handles for cdm
* @num_dev: returned number of device capabilities
* @reserved: reserved field for alignment
* @dev_caps: returned device capability array
*
*/
struct cam_custom_query_cap_cmd {
struct cam_iommu_handle device_iommu;
struct cam_iommu_handle cdm_iommu;
__s32 num_dev;
__u32 reserved;
struct cam_custom_dev_cap_info dev_caps[CAM_CUSTOM_NUM_SUB_DEVICES];
};
/* Acquire Device */
/**
* struct cam_custom_out_port_info - An output port resource info
*
* @res_type: output resource type
* @format: output format of the resource
* @custom_info 1-3: custom params
* @reserved: reserved field for alignment
*
*/
struct cam_custom_out_port_info {
__u32 res_type;
__u32 format;
__u32 custom_info1;
__u32 custom_info2;
__u32 custom_info3;
__u32 reserved;
};
/**
* struct cam_custom_in_port_info - An input port resource info
*
* @res_type: input resource type
* @lane_type: lane type: c-phy or d-phy.
* @lane_num: active lane number
* @lane_cfg: lane configurations: 4 bits per lane
* @vc: input virtual channel number
* @dt: input data type number
* @num_valid_vc_dt: number of valid vc-dt
* @format: input format
* @test_pattern: test pattern for the testgen
* @usage_type: whether dual vfe is required
* @left_start: left input start offset in pixels
* @left_stop: left input stop offset in pixels
* @left_width: left input width in pixels
* @right_start: right input start offset in pixels.
* @right_stop: right input stop offset in pixels.
* @right_width: right input width in pixels.
* @line_start: top of the line number
* @line_stop: bottome of the line number
* @height: input height in lines
* @pixel_clk; sensor output clock
* @num_out_byte: number of valid output bytes per cycle
* @custom_info1: custom_info1
* @custom_info2: custom info 2
* @num_out_res: number of the output resource associated
* @data: payload that contains the output resources
*
*/
struct cam_custom_in_port_info {
__u32 res_type;
__u32 lane_type;
__u32 lane_num;
__u32 lane_cfg;
__u32 vc[CAM_CUSTOM_VC_DT_CFG_MAX];
__u32 dt[CAM_CUSTOM_VC_DT_CFG_MAX];
__u32 num_valid_vc_dt;
__u32 format;
__u32 test_pattern;
__u32 usage_type;
__u32 left_start;
__u32 left_stop;
__u32 left_width;
__u32 right_start;
__u32 right_stop;
__u32 right_width;
__u32 line_start;
__u32 line_stop;
__u32 height;
__u32 pixel_clk;
__u32 num_bytes_out;
__u32 custom_info1;
__u32 custom_info2;
__u32 num_out_res;
union {
struct cam_custom_out_port_info data[1];
__DECLARE_FLEX_ARRAY(struct cam_custom_out_port_info, data_flex);
};
};
/**
* struct cam_custom_resource - A resource bundle
*
* @resoruce_id: resource id for the resource bundle
* @length: length of the while resource blob
* @handle_type: type of the resource handle
* @reserved: reserved field for alignment
* @res_hdl: resource handle that points to the
* resource array;
*/
struct cam_custom_resource {
__u32 resource_id;
__u32 length;
__u32 handle_type;
__u32 reserved;
__u64 res_hdl;
};
/**
* struct cam_custom_acquire_hw_info - Custom acquire HW params
*
* @num_inputs : Number of inputs
* @input_info_size : Size of input info struct used
* @input_info_offset : Offset of input info from start of data
* @reserved : reserved
* @data : Start of data region
*/
struct cam_custom_acquire_hw_info {
__u32 num_inputs;
__u32 input_info_size;
__u32 input_info_offset;
__u32 reserved;
__u64 data;
};
/**
* struct cam_custom_cmd_buf_type_1 - cmd buf type 1
*
* @custom_info: custom info
* @reserved: reserved
*/
struct cam_custom_cmd_buf_type_1 {
__u32 custom_info;
__u32 reserved;
};
/**
* struct cam_custom_cmd_buf_type_2 - cmd buf type 2
*
* @custom_info1: Custom info 1
* @custom_info2: Custom info 2
* @custom_info3: Custom info 3
* @reserved: reserved
*/
struct cam_custom_cmd_buf_type_2 {
__u32 custom_info1;
__u32 custom_info2;
__u32 custom_info3;
__u32 reserved;
};
#endif /* __UAPI_CAM_CUSTOM_H__ */

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/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
*/
#ifndef __UAPI_CAM_FD_H__
#define __UAPI_CAM_FD_H__
#include <media/cam_defs.h>
#define CAM_FD_MAX_FACES 35
#define CAM_FD_RAW_RESULT_ENTRIES 512
/* FD Op Codes */
#define CAM_PACKET_OPCODES_FD_FRAME_UPDATE 0x0
/* FD Command Buffer identifiers */
#define CAM_FD_CMD_BUFFER_ID_GENERIC 0x0
#define CAM_FD_CMD_BUFFER_ID_CDM 0x1
#define CAM_FD_CMD_BUFFER_ID_MAX 0x2
/* FD Blob types */
#define CAM_FD_BLOB_TYPE_SOC_CLOCK_BW_REQUEST 0x0
#define CAM_FD_BLOB_TYPE_RAW_RESULTS_REQUIRED 0x1
/* FD Resource IDs */
#define CAM_FD_INPUT_PORT_ID_IMAGE 0x0
#define CAM_FD_INPUT_PORT_ID_MAX 0x1
#define CAM_FD_OUTPUT_PORT_ID_RESULTS 0x0
#define CAM_FD_OUTPUT_PORT_ID_RAW_RESULTS 0x1
#define CAM_FD_OUTPUT_PORT_ID_WORK_BUFFER 0x2
#define CAM_FD_OUTPUT_PORT_ID_MAX 0x3
/**
* struct cam_fd_soc_clock_bw_request - SOC clock, bandwidth request info
*
* @clock_rate : Clock rate required while processing frame
* @bandwidth : Bandwidth required while processing frame
* @reserved : Reserved for future use
*/
struct cam_fd_soc_clock_bw_request {
__u64 clock_rate;
__u64 bandwidth;
__u64 reserved[4];
};
/**
* struct cam_fd_face - Face properties
*
* @prop1 : Property 1 of face
* @prop2 : Property 2 of face
* @prop3 : Property 3 of face
* @prop4 : Property 4 of face
*
* Do not change this layout, this is inline with how HW writes
* these values directly when the buffer is programmed to HW
*/
struct cam_fd_face {
__u32 prop1;
__u32 prop2;
__u32 prop3;
__u32 prop4;
};
/**
* struct cam_fd_results - FD results layout
*
* @faces : Array of faces with face properties
* @face_count : Number of faces detected
* @reserved : Reserved for alignment
*
* Do not change this layout, this is inline with how HW writes
* these values directly when the buffer is programmed to HW
*/
struct cam_fd_results {
struct cam_fd_face faces[CAM_FD_MAX_FACES];
__u32 face_count;
__u32 reserved[3];
};
/**
* struct cam_fd_hw_caps - Face properties
*
* @core_version : FD core version
* @wrapper_version : FD wrapper version
* @raw_results_available : Whether raw results are available on this HW
* @supported_modes : Modes supported by this HW.
* @reserved : Reserved for future use
*/
struct cam_fd_hw_caps {
struct cam_hw_version core_version;
struct cam_hw_version wrapper_version;
__u32 raw_results_available;
__u32 supported_modes;
__u64 reserved;
};
/**
* struct cam_fd_query_cap_cmd - FD Query capabilities information
*
* @device_iommu : FD IOMMU handles
* @cdm_iommu : CDM iommu handles
* @hw_caps : FD HW capabilities
* @reserved : Reserved for alignment
*/
struct cam_fd_query_cap_cmd {
struct cam_iommu_handle device_iommu;
struct cam_iommu_handle cdm_iommu;
struct cam_fd_hw_caps hw_caps;
__u64 reserved;
};
/**
* struct cam_fd_acquire_dev_info - FD acquire device information
*
* @clk_bw_request : SOC clock, bandwidth request
* @priority : Priority for this acquire
* @mode : Mode in which to run FD HW.
* @get_raw_results : Whether this acquire needs face raw results
* while frame processing
* @reserved : Reserved field for 64 bit alignment
*/
struct cam_fd_acquire_dev_info {
struct cam_fd_soc_clock_bw_request clk_bw_request;
__u32 priority;
__u32 mode;
__u32 get_raw_results;
__u32 reserved[13];
};
#endif /* __UAPI_CAM_FD_H__ */

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/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef __UAPI_CAM_ICP_H__
#define __UAPI_CAM_ICP_H__
#include <media/cam_defs.h>
#include <media/cam_cpas.h>
/* icp, ipe, bps, cdm(ipe/bps) are used in querycap */
#define CAM_ICP_DEV_TYPE_A5 1
#define CAM_ICP_DEV_TYPE_IPE 2
#define CAM_ICP_DEV_TYPE_BPS 3
#define CAM_ICP_DEV_TYPE_IPE_CDM 4
#define CAM_ICP_DEV_TYPE_BPS_CDM 5
/**
* This macro is deprecated; a device type max is not necessary.
* The new macro CAM_ICP_MAX_NUM_OF_DEV_TYPES will dictate
* max number of different types of devices supported by a single
* instance of the ICP device.
*/
#define CAM_ICP_DEV_TYPE_MAX 5
/* ICP and OFE types added to indicate capability to userspace */
#define CAM_ICP_DEV_TYPE_ICP 6
#define CAM_ICP_DEV_TYPE_OFE 7
/* definitions needed for icp aquire device */
#define CAM_ICP_RES_TYPE_BPS 1
#define CAM_ICP_RES_TYPE_IPE_RT 2
#define CAM_ICP_RES_TYPE_IPE 3
#define CAM_ICP_RES_TYPE_IPE_SEMI_RT 4
#define CAM_ICP_RES_TYPE_BPS_RT 5
#define CAM_ICP_RES_TYPE_BPS_SEMI_RT 6
/* This macro is deprecated and no longer needed */
#define CAM_ICP_RES_TYPE_MAX 7
#define CAM_ICP_RES_TYPE_OFE_RT 7
#define CAM_ICP_RES_TYPE_OFE 8
#define CAM_ICP_RES_TYPE_OFE_SEMI_RT 9
/* packet opcode types */
#define CAM_ICP_OPCODE_IPE_UPDATE 0
#define CAM_ICP_OPCODE_BPS_UPDATE 1
#define CAM_ICP_OPCODE_IPE_SETTINGS 2
#define CAM_ICP_OPCODE_BPS_SETTINGS 3
#define CAM_ICP_OPCODE_OFE_UPDATE 4
#define CAM_ICP_OPCODE_OFE_SETTINGS 5
/* IPE input port resource type */
#define CAM_ICP_IPE_INPUT_IMAGE_FULL 0x0
#define CAM_ICP_IPE_INPUT_IMAGE_DS4 0x1
#define CAM_ICP_IPE_INPUT_IMAGE_DS16 0x2
#define CAM_ICP_IPE_INPUT_IMAGE_DS64 0x3
#define CAM_ICP_IPE_INPUT_IMAGE_FULL_REF 0x4
#define CAM_ICP_IPE_INPUT_IMAGE_DS4_REF 0x5
#define CAM_ICP_IPE_INPUT_IMAGE_DS16_REF 0x6
#define CAM_ICP_IPE_INPUT_IMAGE_DS64_REF 0x7
/* IPE output port resource type */
#define CAM_ICP_IPE_OUTPUT_IMAGE_DISPLAY 0x8
#define CAM_ICP_IPE_OUTPUT_IMAGE_VIDEO 0x9
#define CAM_ICP_IPE_OUTPUT_IMAGE_FULL_REF 0xA
#define CAM_ICP_IPE_OUTPUT_IMAGE_DS4_REF 0xB
#define CAM_ICP_IPE_OUTPUT_IMAGE_DS16_REF 0xC
#define CAM_ICP_IPE_OUTPUT_IMAGE_DS64_REF 0xD
#define CAM_ICP_IPE_OUTPUT_IMAGE_FD 0x33
#define CAM_ICP_IPE_OUTPUT_IMAGE_STATS_IHIST 0x3D
#define CAM_ICP_IPE_IMAGE_MAX (CAM_ICP_IPE_OUTPUT_IMAGE_STATS_IHIST + 1)
/* BPS input port resource type */
#define CAM_ICP_BPS_INPUT_IMAGE 0x0
/* BPS output port resource type */
#define CAM_ICP_BPS_OUTPUT_IMAGE_FULL 0x1
#define CAM_ICP_BPS_OUTPUT_IMAGE_DS4 0x2
#define CAM_ICP_BPS_OUTPUT_IMAGE_DS16 0x3
#define CAM_ICP_BPS_OUTPUT_IMAGE_DS64 0x4
#define CAM_ICP_BPS_OUTPUT_IMAGE_STATS_BG 0x5
#define CAM_ICP_BPS_OUTPUT_IMAGE_STATS_BHIST 0x6
#define CAM_ICP_BPS_OUTPUT_IMAGE_REG1 0x7
#define CAM_ICP_BPS_OUTPUT_IMAGE_REG2 0x8
#define CAM_ICP_BPS_IO_IMAGES_MAX 0x9
/* Command meta types */
#define CAM_ICP_CMD_META_GENERIC_BLOB 0x1
/* Generic blob types */
#define CAM_ICP_CMD_GENERIC_BLOB_CLK 0x1
#define CAM_ICP_CMD_GENERIC_BLOB_CFG_IO 0x2
#define CAM_ICP_CMD_GENERIC_BLOB_FW_MEM_MAP 0x3
#define CAM_ICP_CMD_GENERIC_BLOB_FW_MEM_UNMAP 0x4
#define CAM_ICP_CMD_GENERIC_BLOB_CLK_V2 0x5
#define CAM_ICP_CMD_GENERIC_BLOB_PRESIL_HANGDUMP 0x6
#define CAM_ICP_CMD_GENERIC_BLOB_SYSCACHE_CONFIG 0x7
/* Max number of device types supported per ICP instance */
#define CAM_ICP_MAX_NUM_OF_DEV_TYPES 0x5
/*
* The index to the max version of the ACQUIRE_DEV API
* supported in ICP in the query cap params
*/
#define CAM_ICP_QUERY_MAX_ACQUIRE_DEV_VER_SUPPORTED_INDEX 0
/**
* struct cam_icp_clk_bw_request_v2
*
* @budget_ns: Time required to process frame
* @frame_cycles: Frame cycles needed to process the frame
* @rt_flag: Flag to indicate real time stream
* @reserved: For memory alignment
* @num_paths: Number of axi paths in bw request
* @axi_path: Per path vote info for IPE/BPS
*/
struct cam_icp_clk_bw_request_v2 {
__u64 budget_ns;
__u32 frame_cycles;
__u32 rt_flag;
__u32 reserved;
__u32 num_paths;
union {
struct cam_axi_per_path_bw_vote axi_path[1];
__DECLARE_FLEX_ARRAY(struct cam_axi_per_path_bw_vote, axi_path_flex);
};
};
/**
* struct cam_icp_clk_bw_request
*
* @budget_ns: Time required to process frame
* @frame_cycles: Frame cycles needed to process the frame
* @rt_flag: Flag to indicate real time stream
* @uncompressed_bw: Bandwidth required to process frame
* @compressed_bw: Compressed bandwidth to process frame
*/
struct cam_icp_clk_bw_request {
__u64 budget_ns;
__u32 frame_cycles;
__u32 rt_flag;
__u64 uncompressed_bw;
__u64 compressed_bw;
};
/**
* struct cam_icp_dev_ver - Device information for particular hw type
*
* This is used to get device version info of
* ICP, IPE, BPS and CDM related IPE and BPS from firmware
* and use this info in CAM_QUERY_CAP IOCTL
*
* @dev_type: hardware type for the cap info(icp, ipe, bps, cdm(ipe/bps))
* @reserved: reserved field
* @hw_ver: major, minor and incr values of a device version
*/
struct cam_icp_dev_ver {
__u32 dev_type;
__u32 reserved;
struct cam_hw_version hw_ver;
};
/**
* struct cam_icp_ver - ICP version info
*
* This strcuture is used for fw and api version
* this is used to get firmware version and api version from firmware
* and use this info in CAM_QUERY_CAP IOCTL
*
* @major: FW version major
* @minor: FW version minor
* @revision: FW version increment
*/
struct cam_icp_ver {
__u32 major;
__u32 minor;
__u32 revision;
__u32 reserved;
};
/**
* struct cam_icp_query_cap_cmd - ICP query device capability payload
*
* @dev_iommu_handle: icp iommu handles for secure/non secure modes
* @cdm_iommu_handle: iommu handles for secure/non secure modes
* @fw_version: firmware version info
* @api_version: api version info
* @num_ipe: number of ipes
* @num_bps: number of bps
* @dev_ver: returned device capability array
*/
struct cam_icp_query_cap_cmd {
struct cam_iommu_handle dev_iommu_handle;
struct cam_iommu_handle cdm_iommu_handle;
struct cam_icp_ver fw_version;
struct cam_icp_ver api_version;
__u32 num_ipe;
__u32 num_bps;
struct cam_icp_dev_ver dev_ver[CAM_ICP_DEV_TYPE_MAX];
};
/**
* struct cam_icp_device_info - ICP device info
*
* @dev_type: type of the device (IPE/BPS/..)
* @num_devices: number of such devices
* @dev_version: device HW version
* @num_valid_params: number of valid params
* @valid_param_mask: valid param mask
* @params: additional parameters for future usage
*/
struct cam_icp_device_info {
__u32 dev_type;
__u32 num_devices;
struct cam_hw_version dev_version;
__u32 num_valid_params;
__u32 valid_param_mask;
__u32 params[6];
};
/**
* struct cam_icp_query_cap_cmd_v2 - ICP query device capability payload
*
* @version: struct version
* @dev_iommu_handle: icp iommu handles for secure/non secure modes
* @cdm_iommu_handle: iommu handles for secure/non secure modes
* @fw_version: firmware version info
* @num_dev_info: number of devices present in this queried subdevice
* @dev_info: returned icp devices capability array
* @hw_fence_info_size: size of the data pointed to by hw_fence_info_hdl
* if the size is 0, hw fence info will not be populated
* treated as non-fatal
* @hw_fence_info_hdl: Handle to the hw fence session data if applicable
* @num_valid_params: number of valid params
* @valid_param_mask: valid param mask
* @params: additional parameters for future usage
*/
struct cam_icp_query_cap_cmd_v2 {
__u32 version;
struct cam_iommu_handle dev_iommu_handle;
struct cam_iommu_handle cdm_iommu_handle;
struct cam_icp_ver fw_version;
__u32 num_dev_info;
struct cam_icp_device_info dev_info[CAM_ICP_MAX_NUM_OF_DEV_TYPES];
__u32 hw_fence_info_size;
__u64 hw_fence_info_hdl;
__u32 num_valid_params;
__u32 valid_param_mask;
__u32 params[5];
} __attribute__((__packed__));
/**
* struct cam_icp_res_info - ICP output resource info
*
* @format: format of the resource
* @width: width in pixels
* @height: height in lines
* @fps: fps
*/
struct cam_icp_res_info {
__u32 format;
__u32 width;
__u32 height;
__u32 fps;
};
/**
* struct cam_icp_acquire_dev_info - An ICP device info
*
* @scratch_mem_size: Output param - size of scratch memory
* @dev_type: device type (IPE_RT/IPE_NON_RT/BPS)
* @io_config_cmd_size: size of IO config command
* @io_config_cmd_handle: IO config command for each acquire
* @secure_mode: camera mode (secure/non secure)
* @chain_info: chaining info of FW device handles
* @in_res: resource info used for clock and bandwidth calculation
* @num_out_res: number of output resources
* @out_res: output resource
*/
struct cam_icp_acquire_dev_info {
__u32 scratch_mem_size;
__u32 dev_type;
__u32 io_config_cmd_size;
__s32 io_config_cmd_handle;
__u32 secure_mode;
__s32 chain_info;
struct cam_icp_res_info in_res;
__u32 num_out_res;
union {
struct cam_icp_res_info out_res[1];
__DECLARE_FLEX_ARRAY(struct cam_icp_res_info, out_res_flex);
};
} __attribute__((__packed__));
/**
* struct cam_icp_res_info_v2 - ICP output resource info
*
* @format: format of the resource
* @width: width in pixels
* @height: height in lines
* @fps: fps
* @port_id: ID of the out resource
* @is_secure: whether the port is secure
* @num_valid_params: number of valid params
* @valid_param_mask: valid param mask
* @params: additional parameters for future usage
*/
struct cam_icp_res_info_v2 {
__u32 format;
__u32 width;
__u32 height;
__u32 fps;
__u32 port_id;
__u32 is_secure;
__u32 num_valid_params;
__u32 valid_param_mask;
__u32 params[6];
} __attribute__((__packed__));
/**
* struct cam_icp_acquire_dev_info_v2 - An ICP device info
*
* @scratch_mem_size: Output param - size of scratch memory
* @dev_type: device type (IPE_RT/IPE_NON_RT/BPS)
* @io_config_cmd_size: size of IO config command
* @io_config_cmd_handle: IO config command for each acquire
* @secure_mode: camera mode (secure/non secure)
* @chain_info: chaining info of FW device handles
* @in_res: resource info used for clock and bandwidth calculation
* @num_out_res: number of output resources
* @out_res_flex: output resource
* @num_valid_params: number of valid params
* @valid_param_mask: valid param mask
* @params: additional parameters for future usage
*/
struct cam_icp_acquire_dev_info_v2 {
__u32 scratch_mem_size;
__u32 dev_type;
__u32 io_config_cmd_size;
__s32 io_config_cmd_handle;
__u32 secure_mode;
__s32 chain_info;
struct cam_icp_res_info_v2 in_res;
__u32 num_out_res;
__u32 num_valid_params;
__u32 valid_param_mask;
__u32 params[5];
__DECLARE_FLEX_ARRAY(struct cam_icp_res_info_v2, out_res_flex);
} __attribute__((__packed__));
#endif /* __UAPI_CAM_ICP_H__ */

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/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef __UAPI_CAM_ISP_IFE_H__
#define __UAPI_CAM_ISP_IFE_H__
/* IFE output port resource type (global unique)*/
#define CAM_ISP_IFE_OUT_RES_BASE 0x3000
#define CAM_ISP_IFE_OUT_RES_FULL (CAM_ISP_IFE_OUT_RES_BASE + 0)
#define CAM_ISP_IFE_OUT_RES_DS4 (CAM_ISP_IFE_OUT_RES_BASE + 1)
#define CAM_ISP_IFE_OUT_RES_DS16 (CAM_ISP_IFE_OUT_RES_BASE + 2)
#define CAM_ISP_IFE_OUT_RES_RAW_DUMP (CAM_ISP_IFE_OUT_RES_BASE + 3)
#define CAM_ISP_IFE_OUT_RES_FD (CAM_ISP_IFE_OUT_RES_BASE + 4)
#define CAM_ISP_IFE_OUT_RES_PDAF (CAM_ISP_IFE_OUT_RES_BASE + 5)
#define CAM_ISP_IFE_OUT_RES_RDI_0 (CAM_ISP_IFE_OUT_RES_BASE + 6)
#define CAM_ISP_IFE_OUT_RES_RDI_1 (CAM_ISP_IFE_OUT_RES_BASE + 7)
#define CAM_ISP_IFE_OUT_RES_RDI_2 (CAM_ISP_IFE_OUT_RES_BASE + 8)
#define CAM_ISP_IFE_OUT_RES_RDI_3 (CAM_ISP_IFE_OUT_RES_BASE + 9)
#define CAM_ISP_IFE_OUT_RES_STATS_HDR_BE (CAM_ISP_IFE_OUT_RES_BASE + 10)
#define CAM_ISP_IFE_OUT_RES_STATS_HDR_BHIST (CAM_ISP_IFE_OUT_RES_BASE + 11)
#define CAM_ISP_IFE_OUT_RES_STATS_TL_BG (CAM_ISP_IFE_OUT_RES_BASE + 12)
#define CAM_ISP_IFE_OUT_RES_STATS_BF (CAM_ISP_IFE_OUT_RES_BASE + 13)
#define CAM_ISP_IFE_OUT_RES_STATS_AWB_BG (CAM_ISP_IFE_OUT_RES_BASE + 14)
#define CAM_ISP_IFE_OUT_RES_STATS_BHIST (CAM_ISP_IFE_OUT_RES_BASE + 15)
#define CAM_ISP_IFE_OUT_RES_STATS_RS (CAM_ISP_IFE_OUT_RES_BASE + 16)
#define CAM_ISP_IFE_OUT_RES_STATS_CS (CAM_ISP_IFE_OUT_RES_BASE + 17)
#define CAM_ISP_IFE_OUT_RES_STATS_IHIST (CAM_ISP_IFE_OUT_RES_BASE + 18)
#define CAM_ISP_IFE_OUT_RES_FULL_DISP (CAM_ISP_IFE_OUT_RES_BASE + 19)
#define CAM_ISP_IFE_OUT_RES_DS4_DISP (CAM_ISP_IFE_OUT_RES_BASE + 20)
#define CAM_ISP_IFE_OUT_RES_DS16_DISP (CAM_ISP_IFE_OUT_RES_BASE + 21)
#define CAM_ISP_IFE_OUT_RES_2PD (CAM_ISP_IFE_OUT_RES_BASE + 22)
#define CAM_ISP_IFE_OUT_RES_RDI_RD (CAM_ISP_IFE_OUT_RES_BASE + 23)
#define CAM_ISP_IFE_OUT_RES_LCR (CAM_ISP_IFE_OUT_RES_BASE + 24)
#define CAM_ISP_IFE_OUT_RES_SPARSE_PD (CAM_ISP_IFE_OUT_RES_BASE + 25)
#define CAM_ISP_IFE_OUT_RES_PREPROCESS_2PD (CAM_ISP_IFE_OUT_RES_BASE + 26)
#define CAM_ISP_IFE_OUT_RES_AWB_BFW (CAM_ISP_IFE_OUT_RES_BASE + 27)
#define CAM_ISP_IFE_OUT_RES_STATS_AEC_BE (CAM_ISP_IFE_OUT_RES_BASE + 28)
#define CAM_ISP_IFE_OUT_RES_LTM_STATS (CAM_ISP_IFE_OUT_RES_BASE + 29)
#define CAM_ISP_IFE_OUT_RES_STATS_GTM_BHIST (CAM_ISP_IFE_OUT_RES_BASE + 30)
#define CAM_ISP_IFE_LITE_OUT_RES_STATS_BG (CAM_ISP_IFE_OUT_RES_BASE + 31)
#define CAM_ISP_IFE_LITE_OUT_RES_PREPROCESS_RAW (CAM_ISP_IFE_OUT_RES_BASE + 32)
#define CAM_ISP_IFE_OUT_RES_STATS_CAF (CAM_ISP_IFE_OUT_RES_BASE + 33)
#define CAM_ISP_IFE_OUT_RES_STATS_BAYER_RS (CAM_ISP_IFE_OUT_RES_BASE + 34)
#define CAM_ISP_IFE_OUT_RES_PDAF_PARSED_DATA (CAM_ISP_IFE_OUT_RES_BASE + 35)
#define CAM_ISP_IFE_OUT_RES_STATS_ALSC (CAM_ISP_IFE_OUT_RES_BASE + 36)
#define CAM_ISP_IFE_OUT_RES_DS2 (CAM_ISP_IFE_OUT_RES_BASE + 37)
#define CAM_ISP_IFE_OUT_RES_IR (CAM_ISP_IFE_OUT_RES_BASE + 38)
#define CAM_ISP_IFE_OUT_RES_RDI_4 (CAM_ISP_IFE_OUT_RES_BASE + 39)
#define CAM_ISP_IFE_OUT_RES_STATS_TMC_BHIST (CAM_ISP_IFE_OUT_RES_BASE + 40)
#define CAM_ISP_IFE_OUT_RES_STATS_AF_BHIST (CAM_ISP_IFE_OUT_RES_BASE + 41)
#define CAM_ISP_IFE_OUT_RES_STATS_AEC_BHIST (CAM_ISP_IFE_OUT_RES_BASE + 42)
/* IFE input port resource type (global unique) */
#define CAM_ISP_IFE_IN_RES_BASE 0x4000
#define CAM_ISP_IFE_IN_RES_TPG (CAM_ISP_IFE_IN_RES_BASE + 0)
#define CAM_ISP_IFE_IN_RES_PHY_0 (CAM_ISP_IFE_IN_RES_BASE + 1)
#define CAM_ISP_IFE_IN_RES_PHY_1 (CAM_ISP_IFE_IN_RES_BASE + 2)
#define CAM_ISP_IFE_IN_RES_PHY_2 (CAM_ISP_IFE_IN_RES_BASE + 3)
#define CAM_ISP_IFE_IN_RES_PHY_3 (CAM_ISP_IFE_IN_RES_BASE + 4)
#define CAM_ISP_IFE_IN_RES_PHY_4 (CAM_ISP_IFE_IN_RES_BASE + 5)
#define CAM_ISP_IFE_IN_RES_PHY_5 (CAM_ISP_IFE_IN_RES_BASE + 6)
#define CAM_ISP_IFE_IN_RES_RD (CAM_ISP_IFE_IN_RES_BASE + 7)
#define CAM_ISP_IFE_IN_RES_CPHY_TPG_0 (CAM_ISP_IFE_IN_RES_BASE + 8)
#define CAM_ISP_IFE_IN_RES_CPHY_TPG_1 (CAM_ISP_IFE_IN_RES_BASE + 9)
#define CAM_ISP_IFE_IN_RES_CPHY_TPG_2 (CAM_ISP_IFE_IN_RES_BASE + 10)
#define CAM_ISP_IFE_IN_RES_MAX (CAM_ISP_IFE_IN_RES_BASE + 11)
#endif /* __UAPI_CAM_ISP_IFE_H__ */

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/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef __UAPI_CAM_ISP_SFE_H__
#define __UAPI_CAM_ISP_SFE_H__
/* SFE output port resource type */
#define CAM_ISP_SFE_OUT_RES_BASE 0x6000
#define CAM_ISP_SFE_OUT_RES_RDI_0 (CAM_ISP_SFE_OUT_RES_BASE + 0)
#define CAM_ISP_SFE_OUT_RES_RDI_1 (CAM_ISP_SFE_OUT_RES_BASE + 1)
#define CAM_ISP_SFE_OUT_RES_RDI_2 (CAM_ISP_SFE_OUT_RES_BASE + 2)
#define CAM_ISP_SFE_OUT_RES_RDI_3 (CAM_ISP_SFE_OUT_RES_BASE + 3)
#define CAM_ISP_SFE_OUT_RES_RDI_4 (CAM_ISP_SFE_OUT_RES_BASE + 4)
#define CAM_ISP_SFE_OUT_BE_STATS_0 (CAM_ISP_SFE_OUT_RES_BASE + 5)
#define CAM_ISP_SFE_OUT_BHIST_STATS_0 (CAM_ISP_SFE_OUT_RES_BASE + 6)
#define CAM_ISP_SFE_OUT_BE_STATS_1 (CAM_ISP_SFE_OUT_RES_BASE + 7)
#define CAM_ISP_SFE_OUT_BHIST_STATS_1 (CAM_ISP_SFE_OUT_RES_BASE + 8)
#define CAM_ISP_SFE_OUT_BE_STATS_2 (CAM_ISP_SFE_OUT_RES_BASE + 9)
#define CAM_ISP_SFE_OUT_BHIST_STATS_2 (CAM_ISP_SFE_OUT_RES_BASE + 10)
#define CAM_ISP_SFE_OUT_RES_LCR (CAM_ISP_SFE_OUT_RES_BASE + 11)
#define CAM_ISP_SFE_OUT_RES_RAW_DUMP (CAM_ISP_SFE_OUT_RES_BASE + 12)
#define CAM_ISP_SFE_OUT_RES_IR (CAM_ISP_SFE_OUT_RES_BASE + 13)
#define CAM_ISP_SFE_OUT_BAYER_RS_STATS_0 (CAM_ISP_SFE_OUT_RES_BASE + 14)
#define CAM_ISP_SFE_OUT_BAYER_RS_STATS_1 (CAM_ISP_SFE_OUT_RES_BASE + 15)
#define CAM_ISP_SFE_OUT_BAYER_RS_STATS_2 (CAM_ISP_SFE_OUT_RES_BASE + 16)
#define CAM_ISP_SFE_OUT_HDR_STATS (CAM_ISP_SFE_OUT_RES_BASE + 17)
/* This Macro is deprecated and shall not be used */
#define CAM_ISP_SFE_OUT_RES_MAX (CAM_ISP_SFE_OUT_RES_BASE + 17)
/* SFE input port resource type */
#define CAM_ISP_SFE_IN_RES_BASE 0x5000
#define CAM_ISP_SFE_INLINE_PIX (CAM_ISP_SFE_IN_RES_BASE + 0)
#define CAM_ISP_SFE_IN_RD_0 (CAM_ISP_SFE_IN_RES_BASE + 1)
#define CAM_ISP_SFE_IN_RD_1 (CAM_ISP_SFE_IN_RES_BASE + 2)
#define CAM_ISP_SFE_IN_RD_2 (CAM_ISP_SFE_IN_RES_BASE + 3)
#define CAM_ISP_SFE_IN_RES_MAX (CAM_ISP_SFE_IN_RES_BASE + 4)
#endif /* __UAPI_CAM_ISP_SFE_H__ */

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/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef __UAPI_CAM_ISP_TFE_H__
#define __UAPI_CAM_ISP_TFE_H__
/* TFE output port resource id number */
#define CAM_ISP_TFE_OUT_RES_BASE 0x1
#define CAM_ISP_TFE_OUT_RES_FULL (CAM_ISP_TFE_OUT_RES_BASE + 0)
#define CAM_ISP_TFE_OUT_RES_RAW_DUMP (CAM_ISP_TFE_OUT_RES_BASE + 1)
#define CAM_ISP_TFE_OUT_RES_PDAF (CAM_ISP_TFE_OUT_RES_BASE + 2)
#define CAM_ISP_TFE_OUT_RES_RDI_0 (CAM_ISP_TFE_OUT_RES_BASE + 3)
#define CAM_ISP_TFE_OUT_RES_RDI_1 (CAM_ISP_TFE_OUT_RES_BASE + 4)
#define CAM_ISP_TFE_OUT_RES_RDI_2 (CAM_ISP_TFE_OUT_RES_BASE + 5)
#define CAM_ISP_TFE_OUT_RES_STATS_HDR_BE (CAM_ISP_TFE_OUT_RES_BASE + 6)
#define CAM_ISP_TFE_OUT_RES_STATS_HDR_BHIST (CAM_ISP_TFE_OUT_RES_BASE + 7)
#define CAM_ISP_TFE_OUT_RES_STATS_TL_BG (CAM_ISP_TFE_OUT_RES_BASE + 8)
#define CAM_ISP_TFE_OUT_RES_STATS_BF (CAM_ISP_TFE_OUT_RES_BASE + 9)
#define CAM_ISP_TFE_OUT_RES_STATS_AWB_BG (CAM_ISP_TFE_OUT_RES_BASE + 10)
#define CAM_ISP_TFE_OUT_RES_STATS_RS (CAM_ISP_TFE_OUT_RES_BASE + 11)
#define CAM_ISP_TFE_OUT_RES_DS4 (CAM_ISP_TFE_OUT_RES_BASE + 12)
#define CAM_ISP_TFE_OUT_RES_DS16 (CAM_ISP_TFE_OUT_RES_BASE + 13)
#define CAM_ISP_TFE_OUT_RES_AI (CAM_ISP_TFE_OUT_RES_BASE + 14)
#define CAM_ISP_TFE_OUT_RES_PD_LCR_STATS (CAM_ISP_TFE_OUT_RES_BASE + 15)
#define CAM_ISP_TFE_OUT_RES_PD_PREPROCESSED (CAM_ISP_TFE_OUT_RES_BASE + 16)
#define CAM_ISP_TFE_OUT_RES_PD_PARSED (CAM_ISP_TFE_OUT_RES_BASE + 17)
#define CAM_ISP_TFE_OUT_RES_MAX (CAM_ISP_TFE_OUT_RES_BASE + 18)
/* TFE input port resource type */
#define CAM_ISP_TFE_IN_RES_BASE 0x1
#define CAM_ISP_TFE_IN_RES_TPG (CAM_ISP_TFE_IN_RES_BASE + 0)
#define CAM_ISP_TFE_IN_RES_PHY_0 (CAM_ISP_TFE_IN_RES_BASE + 1)
#define CAM_ISP_TFE_IN_RES_PHY_1 (CAM_ISP_TFE_IN_RES_BASE + 2)
#define CAM_ISP_TFE_IN_RES_PHY_2 (CAM_ISP_TFE_IN_RES_BASE + 3)
#define CAM_ISP_TFE_IN_RES_PHY_3 (CAM_ISP_TFE_IN_RES_BASE + 4)
#define CAM_ISP_TFE_IN_RES_CPHY_TPG_0 (CAM_ISP_TFE_IN_RES_BASE + 8)
#define CAM_ISP_TFE_IN_RES_CPHY_TPG_1 (CAM_ISP_TFE_IN_RES_BASE + 9)
#define CAM_ISP_TFE_IN_RES_CPHY_TPG_2 (CAM_ISP_TFE_IN_RES_BASE + 10)
#define CAM_ISP_TFE_IN_RES_MAX (CAM_ISP_TFE_IN_RES_BASE + 11)
#endif /* __UAPI_CAM_ISP_TFE_H__ */

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/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
*/
#ifndef __UAPI_CAM_ISP_VFE_H__
#define __UAPI_CAM_ISP_VFE_H__
/* VFE output port resource type (global unique) */
#define CAM_ISP_VFE_OUT_RES_BASE 0x1000
#define CAM_ISP_VFE_OUT_RES_ENC (CAM_ISP_VFE_OUT_RES_BASE + 0)
#define CAM_ISP_VFE_OUT_RES_VIEW (CAM_ISP_VFE_OUT_RES_BASE + 1)
#define CAM_ISP_VFE_OUT_RES_VID (CAM_ISP_VFE_OUT_RES_BASE + 2)
#define CAM_ISP_VFE_OUT_RES_RDI_0 (CAM_ISP_VFE_OUT_RES_BASE + 3)
#define CAM_ISP_VFE_OUT_RES_RDI_1 (CAM_ISP_VFE_OUT_RES_BASE + 4)
#define CAM_ISP_VFE_OUT_RES_RDI_2 (CAM_ISP_VFE_OUT_RES_BASE + 5)
#define CAM_ISP_VFE_OUT_RES_RDI_3 (CAM_ISP_VFE_OUT_RES_BASE + 6)
#define CAM_ISP_VFE_OUT_RES_STATS_AEC (CAM_ISP_VFE_OUT_RES_BASE + 7)
#define CAM_ISP_VFE_OUT_RES_STATS_AF (CAM_ISP_VFE_OUT_RES_BASE + 8)
#define CAM_ISP_VFE_OUT_RES_STATS_AWB (CAM_ISP_VFE_OUT_RES_BASE + 9)
#define CAM_ISP_VFE_OUT_RES_STATS_RS (CAM_ISP_VFE_OUT_RES_BASE + 10)
#define CAM_ISP_VFE_OUT_RES_STATS_CS (CAM_ISP_VFE_OUT_RES_BASE + 11)
#define CAM_ISP_VFE_OUT_RES_STATS_IHIST (CAM_ISP_VFE_OUT_RES_BASE + 12)
#define CAM_ISP_VFE_OUT_RES_STATS_SKIN (CAM_ISP_VFE_OUT_RES_BASE + 13)
#define CAM_ISP_VFE_OUT_RES_STATS_BG (CAM_ISP_VFE_OUT_RES_BASE + 14)
#define CAM_ISP_VFE_OUT_RES_STATS_BF (CAM_ISP_VFE_OUT_RES_BASE + 15)
#define CAM_ISP_VFE_OUT_RES_STATS_BE (CAM_ISP_VFE_OUT_RES_BASE + 16)
#define CAM_ISP_VFE_OUT_RES_STATS_BHIST (CAM_ISP_VFE_OUT_RES_BASE + 17)
#define CAM_ISP_VFE_OUT_RES_STATS_BF_SCALE (CAM_ISP_VFE_OUT_RES_BASE + 18)
#define CAM_ISP_VFE_OUT_RES_STATS_HDR_BE (CAM_ISP_VFE_OUT_RES_BASE + 19)
#define CAM_ISP_VFE_OUT_RES_STATS_HDR_BHIST (CAM_ISP_VFE_OUT_RES_BASE + 20)
#define CAM_ISP_VFE_OUT_RES_STATS_AEC_BG (CAM_ISP_VFE_OUT_RES_BASE + 21)
#define CAM_ISP_VFE_OUT_RES_CAMIF_RAW (CAM_ISP_VFE_OUT_RES_BASE + 22)
#define CAM_ISP_VFE_OUT_RES_IDEAL_RAW (CAM_ISP_VFE_OUT_RES_BASE + 23)
#define CAM_ISP_VFE_OUT_RES_MAX (CAM_ISP_VFE_OUT_RES_BASE + 24)
/* VFE input port_ resource type (global unique) */
#define CAM_ISP_VFE_IN_RES_BASE 0x2000
#define CAM_ISP_VFE_IN_RES_TPG (CAM_ISP_VFE_IN_RES_BASE + 0)
#define CAM_ISP_VFE_IN_RES_PHY_0 (CAM_ISP_VFE_IN_RES_BASE + 1)
#define CAM_ISP_VFE_IN_RES_PHY_1 (CAM_ISP_VFE_IN_RES_BASE + 2)
#define CAM_ISP_VFE_IN_RES_PHY_2 (CAM_ISP_VFE_IN_RES_BASE + 3)
#define CAM_ISP_VFE_IN_RES_PHY_3 (CAM_ISP_VFE_IN_RES_BASE + 4)
#define CAM_ISP_VFE_IN_RES_PHY_4 (CAM_ISP_VFE_IN_RES_BASE + 5)
#define CAM_ISP_VFE_IN_RES_PHY_5 (CAM_ISP_VFE_IN_RES_BASE + 6)
#define CAM_ISP_VFE_IN_RES_FE (CAM_ISP_VFE_IN_RES_BASE + 7)
#define CAM_ISP_VFE_IN_RES_MAX (CAM_ISP_VFE_IN_RES_BASE + 8)
#endif /* __UAPI_CAM_ISP_VFE_H__ */

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/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
*/
#ifndef __UAPI_CAM_JPEG_H__
#define __UAPI_CAM_JPEG_H__
#include <media/cam_defs.h>
/* enc, dma, cdm(enc/dma) are used in querycap */
#define CAM_JPEG_DEV_TYPE_ENC 0
#define CAM_JPEG_DEV_TYPE_DMA 1
#define CAM_JPEG_DEV_TYPE_MAX 2
#define CAM_JPEG_NUM_DEV_PER_RES_MAX 1
/* definitions needed for jpeg aquire device */
#define CAM_JPEG_RES_TYPE_ENC 0
#define CAM_JPEG_RES_TYPE_DMA 1
#define CAM_JPEG_RES_TYPE_MAX 2
/* packet opcode types */
#define CAM_JPEG_OPCODE_ENC_UPDATE 0
#define CAM_JPEG_OPCODE_DMA_UPDATE 1
/* ENC input port resource type */
#define CAM_JPEG_ENC_INPUT_IMAGE 0x0
/* ENC output port resource type */
#define CAM_JPEG_ENC_OUTPUT_IMAGE 0x1
#define CAM_JPEG_ENC_IO_IMAGES_MAX 0x2
/* DMA input port resource type */
#define CAM_JPEG_DMA_INPUT_IMAGE 0x0
/* DMA output port resource type */
#define CAM_JPEG_DMA_OUTPUT_IMAGE 0x1
#define CAM_JPEG_DMA_IO_IMAGES_MAX 0x2
#define CAM_JPEG_IMAGE_MAX 0x2
/*JPEG Command Buffer Metadata types*/
#define CAM_JPEG_ENC_PACKET_CONFIG_DATA 0x00
#define CAM_JPEG_DMA_PACKET_PLANE0_CONFIG_DATA 0x01
#define CAM_JPEG_DMA_PACKET_PLANE1_CONFIG_DATA 0x02
#define CAM_JPEG_PACKET_INOUT_PARAM 0x03
#define CAM_JPEG_PACKET_GENERIC_BLOB 0x04
/*JPEG Generic Blob Command buffer type*/
#define CAM_JPEG_THUMBNAIL_SIZE_BLOB 0x01
/**
* struct cam_jpeg_thumbnail_size_blob - Blob containing information about maximum size of the
* thumbnail image
*
* This blob contains information about the maximum size of the encoded thumbnail image that is
* considered valid.
*
* @threshold_size : Size threshold for the encoded Thumbnail image
* @reserved : Reserved field
*/
struct cam_jpeg_thumbnail_size_blob {
__u32 threshold_size;
__u32 reserved[3];
};
/**
* struct cam_jpeg_dev_ver - Device information for particular hw type
*
* This is used to get device version info of JPEG ENC, JPEG DMA
* from hardware and use this info in CAM_QUERY_CAP IOCTL
*
* @size : Size of struct passed
* @dev_type : Hardware type for the cap info(jpeg enc, jpeg dma)
* @hw_ver : Major, minor and incr values of a device version
*/
struct cam_jpeg_dev_ver {
__u32 size;
__u32 dev_type;
struct cam_hw_version hw_ver;
};
/**
* struct cam_jpeg_query_cap_cmd - JPEG query device capability payload
*
* @dev_iommu_handle : Jpeg iommu handles for secure/non secure
* modes
* @cdm_iommu_handle : Iommu handles for secure/non secure modes
* @num_enc : Number of encoder
* @num_dma : Number of dma
* @dev_ver : Returned device capability array
*/
struct cam_jpeg_query_cap_cmd {
struct cam_iommu_handle dev_iommu_handle;
struct cam_iommu_handle cdm_iommu_handle;
__u32 num_enc;
__u32 num_dma;
struct cam_jpeg_dev_ver dev_ver[CAM_JPEG_DEV_TYPE_MAX];
};
/**
* struct cam_jpeg_res_info - JPEG output resource info
*
* @format : Format of the resource
* @width : Width in pixels
* @height : Height in lines
* @fps : Fps
*/
struct cam_jpeg_res_info {
__u32 format;
__u32 width;
__u32 height;
__u32 fps;
};
/**
* struct cam_jpeg_acquire_dev_info - An JPEG device info
*
* @dev_type : Device type (ENC/DMA)
* @reserved : Reserved Bytes
* @in_res : In resource info
* @in_res : Iut resource info
*/
struct cam_jpeg_acquire_dev_info {
__u32 dev_type;
__u32 reserved;
struct cam_jpeg_res_info in_res;
struct cam_jpeg_res_info out_res;
};
/**
* struct cam_jpeg_config_inout_param_info - JPEG Config time
* input output params
*
* @clk_index : Input Param- clock selection index.(-1 default)
* @output_size: Output Param - jpeg encode/dma output size in
* bytes
*/
struct cam_jpeg_config_inout_param_info {
__s32 clk_index;
__s32 output_size;
};
#endif /* __UAPI_CAM_JPEG_H__ */

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/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
*/
#ifndef __UAPI_CAM_LRME_H__
#define __UAPI_CAM_LRME_H__
#include <media/cam_defs.h>
/* LRME Resource Types */
enum CAM_LRME_IO_TYPE {
CAM_LRME_IO_TYPE_TAR,
CAM_LRME_IO_TYPE_REF,
CAM_LRME_IO_TYPE_RES,
CAM_LRME_IO_TYPE_DS2,
};
#define CAM_LRME_INPUT_PORT_TYPE_TAR (1 << 0)
#define CAM_LRME_INPUT_PORT_TYPE_REF (1 << 1)
#define CAM_LRME_OUTPUT_PORT_TYPE_DS2 (1 << 0)
#define CAM_LRME_OUTPUT_PORT_TYPE_RES (1 << 1)
#define CAM_LRME_DEV_MAX 1
struct cam_lrme_hw_version {
__u32 gen;
__u32 rev;
__u32 step;
};
struct cam_lrme_dev_cap {
struct cam_lrme_hw_version clc_hw_version;
struct cam_lrme_hw_version bus_rd_hw_version;
struct cam_lrme_hw_version bus_wr_hw_version;
struct cam_lrme_hw_version top_hw_version;
struct cam_lrme_hw_version top_titan_version;
};
/**
* struct cam_lrme_query_cap_cmd - LRME query device capability payload
*
* @dev_iommu_handle: LRME iommu handles for secure/non secure
* modes
* @cdm_iommu_handle: Iommu handles for secure/non secure modes
* @num_devices: number of hardware devices
* @dev_caps: Returned device capability array
*/
struct cam_lrme_query_cap_cmd {
struct cam_iommu_handle device_iommu;
struct cam_iommu_handle cdm_iommu;
__u32 num_devices;
struct cam_lrme_dev_cap dev_caps[CAM_LRME_DEV_MAX];
};
struct cam_lrme_soc_info {
__u64 clock_rate;
__u64 bandwidth;
__u64 reserved[4];
};
struct cam_lrme_acquire_args {
struct cam_lrme_soc_info lrme_soc_info;
};
#endif /* __UAPI_CAM_LRME_H__ */

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/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef __UAPI_OPE_H__
#define __UAPI_OPE_H__
#include <media/cam_defs.h>
#include <media/cam_cpas.h>
#define OPE_DEV_NAME_SIZE 128
/* OPE HW TYPE */
#define OPE_HW_TYPE_OPE 0x1
#define OPE_HW_TYPE_OPE_CDM 0x2
#define OPE_HW_TYPE_MAX 0x3
/* OPE Device type */
#define OPE_DEV_TYPE_OPE_RT 0x1
#define OPE_DEV_TYPE_OPE_NRT 0x2
#define OPE_DEV_TYPE_OPE_SEMI_RT 0x3
#define OPE_DEV_TYPE_MAX 0x4
/* OPE Input Res Ports */
#define OPE_IN_RES_FULL 0x1
#define OPE_IN_RES_MAX OPE_IN_RES_FULL
/* OPE Output Res Ports */
#define OPE_OUT_RES_VIDEO 0x1
#define OPE_OUT_RES_DISP 0x2
#define OPE_OUT_RES_ARGB 0x3
#define OPE_OUT_RES_STATS_RS 0x4
#define OPE_OUT_RES_STATS_IHIST 0x5
#define OPE_OUT_RES_STATS_LTM 0x6
#define OPE_OUT_RES_MAX OPE_OUT_RES_STATS_LTM
/* OPE packet opcodes */
#define OPE_OPCODE_CONFIG 0x1
/* OPE Command Buffer Scope */
#define OPE_CMD_BUF_SCOPE_BATCH 0x1
#define OPE_CMD_BUF_SCOPE_FRAME 0x2
#define OPE_CMD_BUF_SCOPE_PASS 0x3
#define OPE_CMD_BUF_SCOPE_STRIPE 0x4
/* OPE Command Buffer Types */
#define OPE_CMD_BUF_TYPE_DIRECT 0x1
#define OPE_CMD_BUF_TYPE_INDIRECT 0x2
/* OPE Command Buffer Usage */
#define OPE_CMD_BUF_UMD 0x1
#define OPE_CMD_BUF_KMD 0x2
#define OPE_CMD_BUF_DEBUG 0x3
/* OPE Single/Double Buffered */
#define OPE_CMD_BUF_SINGLE_BUFFERED 0x1
#define OPE_CMD_BUF_DOUBLE_BUFFERED 0x2
/* Command meta types */
#define OPE_CMD_META_GENERIC_BLOB 0x1
/* Generic blob types */
#define OPE_CMD_GENERIC_BLOB_CLK_V2 0x1
/* Stripe location */
#define OPE_STRIPE_FULL 0x0
#define OPE_STRIPE_LEFT 0x1
#define OPE_STRIPE_RIGHT 0x2
#define OPE_STRIPE_MIDDLE 0x3
#define OPE_MAX_CMD_BUFS 64
#define OPE_MAX_IO_BUFS (OPE_OUT_RES_MAX + OPE_IN_RES_MAX)
#define OPE_MAX_PASS 1
#define OPE_MAX_PLANES 2
#define OPE_MAX_STRIPES 64
#define OPE_MAX_BATCH_SIZE 16
/**
* struct ope_stripe_info - OPE stripe Info
*
* @offset: Offset in Bytes
* @x_init: X_init
* @stripe_location: Stripe location (OPE_STRIPE_XXX)
* @width: Width of a stripe
* @height: Height of a stripe
* @disable_bus: Flag to disable BUS master
* @reserved: Reserved
*
*/
struct ope_stripe_info {
__u32 offset;
__u32 x_init;
__u32 stripe_location;
__u32 width;
__u32 height;
__u32 disable_bus;
__u32 reserved;
};
/**
* struct ope_io_buf_info - OPE IO buffers meta
*
* @direction: Direction of a buffer of a port(Input/Output)
* @resource_type: Port type
* @num_planes: Number of planes for a port
* @pix_pattern: Pixel pattern for raw input
* @num_stripes: Stripes per plane
* @mem_handle: Memhandles of each Input/Output Port
* @plane_offset: Offsets of planes
* @length: Length of a plane buffer
* @plane_stride: Plane stride
* @height: Height of a plane buffer
* @format: Format
* @fence: Fence of a Port
* @stripe_info: Stripe Info
*
*/
struct ope_io_buf_info {
__u32 direction;
__u32 resource_type;
__u32 num_planes;
__u32 pix_pattern;
__u32 num_stripes[OPE_MAX_PLANES];
__u32 mem_handle[OPE_MAX_PLANES];
__u32 plane_offset[OPE_MAX_PLANES];
__u32 length[OPE_MAX_PLANES];
__u32 plane_stride[OPE_MAX_PLANES];
__u32 height[OPE_MAX_PLANES];
__u32 format;
__u32 fence;
struct ope_stripe_info stripe_info[OPE_MAX_PLANES][OPE_MAX_STRIPES];
};
/**
* struct ope_frame_set - OPE frameset
*
* @num_io_bufs: Number of I/O buffers
* @reserved: Reserved
* @io_buf: IO buffer info for all Input and Output ports
*
*/
struct ope_frame_set {
__u32 num_io_bufs;
__u32 reserved;
struct ope_io_buf_info io_buf[OPE_MAX_IO_BUFS];
};
/**
* struct ope_cmd_buf_info - OPE command buffer meta
*
* @mem_handle: Memory handle for command buffer
* @offset: Offset of a command buffer
* @size: Size of command buffer
* @length: Length of a command buffer
* @cmd_buf_scope : Scope of a command buffer (OPE_CMD_BUF_SCOPE_XXX)
* @type: Command buffer type (OPE_CMD_BUF_TYPE_XXX)
* @cmd_buf_usage: Usage of command buffer ( OPE_CMD_BUF_USAGE_XXX)
* @stripe_idx: Stripe index in a req, It is valid for SCOPE_STRIPE
* @cmd_buf_pass_idx: Pass index
* @prefetch_disable: Prefecth disable flag
*
*/
struct ope_cmd_buf_info {
__u32 mem_handle;
__u32 offset;
__u32 size;
__u32 length;
__u32 cmd_buf_scope;
__u32 type;
__u32 cmd_buf_usage;
__u32 cmd_buf_buffered;
__u32 stripe_idx;
__u32 cmd_buf_pass_idx;
__u32 prefetch_disable;
};
/**
* struct ope_packet_payload - payload for a request
*
* @num_cmd_bufs: Number of command buffers
* @batch_size: Batch size in HFR mode
* @ope_cmd_buf_info: Command buffer meta data
* @ope_io_buf_info: Io buffer Info
*
*/
struct ope_frame_process {
__u32 num_cmd_bufs[OPE_MAX_BATCH_SIZE];
__u32 batch_size;
struct ope_cmd_buf_info cmd_buf[OPE_MAX_BATCH_SIZE][OPE_MAX_CMD_BUFS];
struct ope_frame_set frame_set[OPE_MAX_BATCH_SIZE];
};
/**
* struct ope_clk_bw_request_v2 - clock and bandwidth for a request
*
* @budget_ns: Time required to process frame
* @frame_cycles: Frame cycles needed to process the frame
* @rt_flag: Flag to indicate real time stream
* @reserved: For memory alignment
* @axi_path: Per path vote info for OPE
*
*/
struct ope_clk_bw_request_v2 {
__u64 budget_ns;
__u32 frame_cycles;
__u32 rt_flag;
__u32 reserved;
__u32 num_paths;
union {
struct cam_axi_per_path_bw_vote axi_path[1];
__DECLARE_FLEX_ARRAY(struct cam_axi_per_path_bw_vote, axi_path_flex);
};
};
/**
* struct ope_hw_ver - Device information for OPE
*
* This is used to get device version info of
* OPE, CDM and use this info in CAM_QUERY_CAP IOCTL
*
* @hw_type: Hardware type for the cap info(OPE_HW_TYPE_XXX)
* @reserved: Reserved field
* @hw_ver: Major, minor and incr values of a hardware version
*
*/
struct ope_hw_ver {
__u32 hw_type;
__u32 reserved;
struct cam_hw_version hw_ver;
};
/**
* struct ope_query_cap_cmd - OPE query device capability payload
*
* @dev_iommu_handle: OPE iommu handles for secure/non secure modes
* @cdm_iommu_handle: CDM iommu handles for secure/non secure modes
* @num_ope: Number of OPEs
* @reserved: Reserved Parameter
* @hw_ver: Hardware capability array
*/
struct ope_query_cap_cmd {
struct cam_iommu_handle dev_iommu_handle;
struct cam_iommu_handle cdm_iommu_handle;
__u32 num_ope;
__u32 reserved;
struct ope_hw_ver hw_ver[OPE_DEV_TYPE_MAX];
};
/**
* struct ope_out_res_info - OPE Output resource info
*
* @res_id: Resource ID
* @format: Output resource format
* @width: Output width
* @height: Output Height
* @alignment: Alignment
* @packer_format: Packer format
* @subsample_period: Subsample period in HFR
* @subsample_pattern: Subsample pattern in HFR
* @pixel_pattern: Pixel pattern
* @reserved: Reserved Parameter
*
*/
struct ope_out_res_info {
__u32 res_id;
__u32 format;
__u32 width;
__u32 height;
__u32 alignment;
__u32 packer_format;
__u32 subsample_period;
__u32 subsample_pattern;
__u32 pixel_pattern;
__u32 reserved;
};
/**
* struct ope_in_res_info - OPE Input resource info
*
* @res_id: Resource ID
* @format: Input resource format
* @width: Input width
* @height: Input Height
* @pixel_pattern: Pixel pattern
* @alignment: Alignment
* @unpacker_format: Unpacker format
* @max_stripe_size: Max stripe size supported for this instance configuration
* @fps: Frames per second
* @reserved: Reserved Parameter
*
*/
struct ope_in_res_info {
__u32 res_id;
__u32 format;
__u32 width;
__u32 height;
__u32 pixel_pattern;
__u32 alignment;
__u32 unpacker_format;
__u32 max_stripe_size;
__u32 fps;
__u32 reserved;
};
/**
* struct ope_acquire_dev_info - OPE Acquire Info
*
* @hw_type: OPE HW Types (OPE)
* @dev_type: Nature of Device Instance (RT/NRT)
* @dev_name: Name of Device Instance
* @nrt_stripes_for_arb: Program num stripes in OPE CDM for NRT device
* before setting ARB bit
* @secure_mode: Mode of Device operation (Secure or Non Secure)
* @batch_size: Batch size
* @num_in_res: Number of input resources (OPE_IN_RES_XXX)
* @in_res: Input resource info
* @num_out_res: Number of output resources (OPE_OUT_RES_XXX)
* @reserved: Reserved Parameter
* @out_res: Output resource info
*
*/
struct ope_acquire_dev_info {
__u32 hw_type;
__u32 dev_type;
char dev_name[OPE_DEV_NAME_SIZE];
__u32 nrt_stripes_for_arb;
__u32 secure_mode;
__u32 batch_size;
__u32 num_in_res;
struct ope_in_res_info in_res[OPE_IN_RES_MAX];
__u32 num_out_res;
__u32 reserved;
struct ope_out_res_info out_res[OPE_OUT_RES_MAX];
} __attribute__((__packed__));
#endif /* __UAPI_OPE_H__ */

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/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022-2024, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef __UAPI_LINUX_CAM_REQ_MGR_H
#define __UAPI_LINUX_CAM_REQ_MGR_H
#include <linux/videodev2.h>
#include <linux/types.h>
#include <linux/ioctl.h>
#include <linux/media.h>
#include <media/cam_defs.h>
#define CAM_REQ_MGR_VNODE_NAME "cam-req-mgr-devnode"
#define CAM_DEVICE_TYPE_BASE (MEDIA_ENT_F_OLD_BASE)
#define CAM_VNODE_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE)
#define CAM_SENSOR_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 1)
#define CAM_IFE_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 2)
#define CAM_ICP_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 3)
#define CAM_LRME_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 4)
#define CAM_JPEG_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 5)
#define CAM_FD_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 6)
#define CAM_CPAS_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 7)
#define CAM_CSIPHY_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 8)
#define CAM_ACTUATOR_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 9)
#define CAM_CCI_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 10)
#define CAM_FLASH_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 11)
#define CAM_EEPROM_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 12)
#define CAM_OIS_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 13)
#define CAM_CUSTOM_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 14)
#define CAM_OPE_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 15)
#define CAM_TFE_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 16)
#define CAM_CRE_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 17)
#define CAM_TPG_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 18)
#define CAM_TFE_MC_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 19)
/* cam_req_mgr hdl info */
#define CAM_REQ_MGR_HDL_IDX_POS 8
#define CAM_REQ_MGR_HDL_IDX_MASK ((1 << CAM_REQ_MGR_HDL_IDX_POS) - 1)
#define CAM_REQ_MGR_GET_HDL_IDX(hdl) (hdl & CAM_REQ_MGR_HDL_IDX_MASK)
/**
* Max handles supported by cam_req_mgr
* It includes both session and device handles
*/
#define CAM_REQ_MGR_MAX_HANDLES 64
#define CAM_REQ_MGR_MAX_HANDLES_V2 256
#define MAX_LINKS_PER_SESSION 2
/* Interval for cam_info_rate_limit_custom() */
#define CAM_RATE_LIMIT_INTERVAL_5SEC 5
/* V4L event type which user space will subscribe to */
#define V4L_EVENT_CAM_REQ_MGR_EVENT (V4L2_EVENT_PRIVATE_START + 0)
/* Specific event ids to get notified in user space */
#define V4L_EVENT_CAM_REQ_MGR_SOF 0
#define V4L_EVENT_CAM_REQ_MGR_ERROR 1
#define V4L_EVENT_CAM_REQ_MGR_SOF_BOOT_TS 2
#define V4L_EVENT_CAM_REQ_MGR_CUSTOM_EVT 3
#define V4L_EVENT_CAM_REQ_MGR_NODE_EVENT 4
#define V4L_EVENT_CAM_REQ_MGR_SOF_UNIFIED_TS 5
#define V4L_EVENT_CAM_REQ_MGR_PF_ERROR 6
/* SOF Event status */
#define CAM_REQ_MGR_SOF_EVENT_SUCCESS 0
#define CAM_REQ_MGR_SOF_EVENT_ERROR 1
/* Link control operations */
#define CAM_REQ_MGR_LINK_ACTIVATE 0
#define CAM_REQ_MGR_LINK_DEACTIVATE 1
/* DMA buffer name length */
#define CAM_DMA_BUF_NAME_LEN 128
#define CAM_REQ_MGR_ALLOC_BUF_WITH_NAME 1
/**
* Request Manager : flush_type
* @CAM_REQ_MGR_FLUSH_TYPE_ALL: Req mgr will remove all the pending
* requests from input/processing queue.
* @CAM_REQ_MGR_FLUSH_TYPE_CANCEL_REQ: Req mgr will remove only particular
* request id from input/processing queue.
* @CAM_REQ_MGR_FLUSH_TYPE_MAX: Max number of the flush type
* @opcode: CAM_REQ_MGR_FLUSH_REQ
*/
#define CAM_REQ_MGR_FLUSH_TYPE_ALL 0
#define CAM_REQ_MGR_FLUSH_TYPE_CANCEL_REQ 1
#define CAM_REQ_MGR_FLUSH_TYPE_MAX 2
/**
* Request Manager : Sync Mode type
* @CAM_REQ_MGR_SYNC_MODE_NO_SYNC: Req mgr will apply non-sync mode for this
* request.
* @CAM_REQ_MGR_SYNC_MODE_SYNC: Req mgr will apply sync mode for this request.
*/
#define CAM_REQ_MGR_SYNC_MODE_NO_SYNC 0
#define CAM_REQ_MGR_SYNC_MODE_SYNC 1
/**
* Functional capabilities for flush
* "reserved" field in struct cam_req_mgr_flush_info to be set
* to enable/disable these functionalities
*/
#define CAM_REQ_MGR_ENABLE_SENSOR_STANDBY BIT(0)
/**
* struct cam_req_mgr_event_data
* @session_hdl: session handle
* @link_hdl: link handle
* @frame_id: frame id
* @reserved: reserved for 64 bit aligngment
* @req_id: request id
* @tv_sec: timestamp in seconds
* @tv_usec: timestamp in micro seconds
*/
struct cam_req_mgr_event_data {
__s32 session_hdl;
__s32 link_hdl;
__s32 frame_id;
__s32 reserved;
__s64 req_id;
__u64 tv_sec;
__u64 tv_usec;
};
/**
* struct cam_req_mgr_session_info
* @session_hdl: In/Output param - session_handle
* @opcode1: CAM_REQ_MGR_CREATE_SESSION
* @opcode2: CAM_REQ_MGR_DESTROY_SESSION
*/
struct cam_req_mgr_session_info {
__s32 session_hdl;
__s32 reserved;
};
/**
* struct cam_req_mgr_link_info
* @session_hdl: Input param - Identifier for CSL session
* @num_devices: Input Param - Num of devices to be linked
* @dev_hdls: Input param - List of device handles to be linked
* @link_hdl: Output Param -Identifier for link
* @opcode: CAM_REQ_MGR_LINK
*/
struct cam_req_mgr_link_info {
__s32 session_hdl;
__u32 num_devices;
__s32 dev_hdls[CAM_REQ_MGR_MAX_HANDLES];
__s32 link_hdl;
};
struct cam_req_mgr_link_info_v2 {
__s32 session_hdl;
__u32 num_devices;
__s32 dev_hdls[CAM_REQ_MGR_MAX_HANDLES_V2];
__s32 link_hdl;
};
struct cam_req_mgr_ver_info {
__u32 version;
union {
struct cam_req_mgr_link_info link_info_v1;
struct cam_req_mgr_link_info_v2 link_info_v2;
} u;
};
/**
* struct cam_req_mgr_unlink_info
* @session_hdl: input param - session handle
* @link_hdl: input param - link handle
* @opcode: CAM_REQ_MGR_UNLINK
*/
struct cam_req_mgr_unlink_info {
__s32 session_hdl;
__s32 link_hdl;
};
/**
* struct cam_req_mgr_flush_info
* @brief: User can tell drivers to flush a particular request id or
* flush all requests from its pending processing queue. Flush is a
* blocking call and driver shall ensure all requests are flushed
* before returning.
* @session_hdl: Input param - Identifier for CSL session
* @link_hdl: Input Param -Identifier for link
* @flush_type: User can cancel a particular req id or can flush
* all requests in queue
* @reserved: reserved for 64 bit aligngment
* @req_id: field is valid only if flush type is cancel request
* for flush all this field value is not considered.
* @opcode: CAM_REQ_MGR_FLUSH_REQ
*/
struct cam_req_mgr_flush_info {
__s32 session_hdl;
__s32 link_hdl;
__u32 flush_type;
__u32 reserved;
__s64 req_id;
};
/** struct cam_req_mgr_sched_request
* @session_hdl: Input param - Identifier for CSL session
* @link_hdl: Input Param -Identifier for link
* inluding itself.
* @bubble_enable: Input Param - Cam req mgr will do bubble recovery if this
* flag is set.
* @sync_mode: Type of Sync mode for this request
* @additional_timeout: Additional timeout value (in ms) associated with
* this request. This value needs to be 0 in cases where long exposure is
* not configured for the sensor.The max timeout that will be supported
* is 50000 ms
* @reserved: Reserved
* @req_id: Input Param - Request Id from which all requests will be flushed
*/
struct cam_req_mgr_sched_request {
__s32 session_hdl;
__s32 link_hdl;
__s32 bubble_enable;
__s32 sync_mode;
__s32 additional_timeout;
__s32 reserved;
__s64 req_id;
};
/** struct cam_req_mgr_sched_request_v2
* @version: Version number
* @session_hdl: Input param - Identifier for CSL session
* @link_hdl: Input Param -Identifier for link including itself.
* @bubble_enable: Input Param - Cam req mgr will do bubble recovery if this
* flag is set.
* @sync_mode: Type of Sync mode for this request
* @additional_timeout: Additional timeout value (in ms) associated with
* this request. This value needs to be 0 in cases where long exposure is
* not configured for the sensor.The max timeout that will be supported
* is 50000 ms
* @num_links: Input Param - Num of links for sync
* @num_valid_params: Number of valid params
* @req_id: Input Param - Request Id from which all requests will be flushed
* @link_hdls: Input Param - Array of link handles to be for sync
* @param_mask: mask to indicate what the parameters are
* @params: parameters passed from user space
*/
struct cam_req_mgr_sched_request_v2 {
__s32 version;
__s32 session_hdl;
__s32 link_hdl;
__s32 bubble_enable;
__s32 sync_mode;
__s32 additional_timeout;
__s32 num_links;
__s32 num_valid_params;
__s64 req_id;
__s32 link_hdls[MAX_LINKS_PER_SESSION];
__s32 param_mask;
__s32 params[5];
};
/** struct cam_req_mgr_sched_request_v3
* @version: Version number
* @session_hdl: Input param - Identifier for CSL session
* @link_hdl: Input Param -Identifier for link including itself.
* @bubble_enable: Input Param - Cam req mgr will do bubble recovery if this
* flag is set.
* @sync_mode: Type of Sync mode for this request
* @additional_timeout: Additional timeout value (in ms) associated with
* this request. This value needs to be 0 in cases where long exposure is
* not configured for the sensor.The max timeout that will be supported
* is 50000 ms
* @num_links: Input Param - Num of links for sync
* @num_valid_params: Number of valid params
* @req_id: Input Param - Request Id from which all requests will be flushed
* @param_mask: mask to indicate what the parameters are
* @params: parameters passed from user space
* @link_hdls: Input Param - Array of link handles to be for sync
*/
struct cam_req_mgr_sched_request_v3 {
__s32 version;
__s32 session_hdl;
__s32 link_hdl;
__s32 bubble_enable;
__s32 sync_mode;
__s32 additional_timeout;
__s32 num_links;
__s32 num_valid_params;
__s64 req_id;
__s32 param_mask;
__s32 params[5];
__s32 link_hdls[];
};
/**
* struct cam_req_mgr_sync_mode
* @session_hdl: Input param - Identifier for CSL session
* @sync_mode: Input Param - Type of sync mode
* @num_links: Input Param - Num of links in sync mode (Valid only
* when sync_mode is one of SYNC enabled modes)
* @link_hdls: Input Param - Array of link handles to be in sync mode
* (Valid only when sync_mode is one of SYNC
* enabled modes)
* @master_link_hdl: Input Param - To dictate which link's SOF drives system
* (Valid only when sync_mode is one of SYNC
* enabled modes)
*
* @opcode: CAM_REQ_MGR_SYNC_MODE
*/
struct cam_req_mgr_sync_mode {
__s32 session_hdl;
__s32 sync_mode;
__s32 num_links;
__s32 link_hdls[MAX_LINKS_PER_SESSION];
__s32 master_link_hdl;
__s32 reserved;
};
/**
* struct cam_req_mgr_link_control
* @ops: Link operations: activate/deactive
* @session_hdl: Input param - Identifier for CSL session
* @num_links: Input Param - Num of links
* @reserved: reserved field
* @init_timeout: To account for INIT exposure settings (ms)
* If there is no change in exp settings
* field needs to assigned to 0ms.
* @link_hdls: Input Param - Links to be activated/deactivated
*
* @opcode: CAM_REQ_MGR_LINK_CONTROL
*/
struct cam_req_mgr_link_control {
__s32 ops;
__s32 session_hdl;
__s32 num_links;
__s32 reserved;
__s32 init_timeout[MAX_LINKS_PER_SESSION];
__s32 link_hdls[MAX_LINKS_PER_SESSION];
};
/**
* struct cam_req_mgr_link_properties
* @version: Input param - Version number
* @session_hdl: Input param - Identifier for CSL session
* @link_hdl: Input Param - Identifier for link
* @properties_mask: Input Param - Properties mask to indicate if current
* link enables some special properties
* @num_valid_params: Input Param - Number of valid params
* @param_mask: Input Param - Mask to indicate what are the parameters
* @params: Input Param - Parameters passed from user space
*/
/* CAM_REQ_MGR_LINK_PROPERTIES */
struct cam_req_mgr_link_properties {
__s32 version;
__s32 session_hdl;
__s32 link_hdl;
__u32 properties_mask;
__s32 num_valid_params;
__u32 param_mask;
__s32 params[6];
};
/**
* Request Manager : Link properties codes
* @CAM_LINK_PROPERTY_NONE : No special property
* @CAM_LINK_PROPERTY_SENSOR_STANDBY_AFTER_EOF : Standby the sensor after EOF
*/
#define CAM_LINK_PROPERTY_NONE 0
#define CAM_LINK_PROPERTY_SENSOR_STANDBY_AFTER_EOF BIT(0)
/**
* cam_req_mgr specific opcode ids
*/
#define CAM_REQ_MGR_CREATE_DEV_NODES (CAM_COMMON_OPCODE_MAX + 1)
#define CAM_REQ_MGR_CREATE_SESSION (CAM_COMMON_OPCODE_MAX + 2)
#define CAM_REQ_MGR_DESTROY_SESSION (CAM_COMMON_OPCODE_MAX + 3)
#define CAM_REQ_MGR_LINK (CAM_COMMON_OPCODE_MAX + 4)
#define CAM_REQ_MGR_UNLINK (CAM_COMMON_OPCODE_MAX + 5)
#define CAM_REQ_MGR_SCHED_REQ (CAM_COMMON_OPCODE_MAX + 6)
#define CAM_REQ_MGR_FLUSH_REQ (CAM_COMMON_OPCODE_MAX + 7)
#define CAM_REQ_MGR_SYNC_MODE (CAM_COMMON_OPCODE_MAX + 8)
#define CAM_REQ_MGR_ALLOC_BUF (CAM_COMMON_OPCODE_MAX + 9)
#define CAM_REQ_MGR_MAP_BUF (CAM_COMMON_OPCODE_MAX + 10)
#define CAM_REQ_MGR_RELEASE_BUF (CAM_COMMON_OPCODE_MAX + 11)
#define CAM_REQ_MGR_CACHE_OPS (CAM_COMMON_OPCODE_MAX + 12)
#define CAM_REQ_MGR_LINK_CONTROL (CAM_COMMON_OPCODE_MAX + 13)
#define CAM_REQ_MGR_LINK_V2 (CAM_COMMON_OPCODE_MAX + 14)
#define CAM_REQ_MGR_REQUEST_DUMP (CAM_COMMON_OPCODE_MAX + 15)
#define CAM_REQ_MGR_SCHED_REQ_V2 (CAM_COMMON_OPCODE_MAX + 16)
#define CAM_REQ_MGR_LINK_PROPERTIES (CAM_COMMON_OPCODE_MAX + 17)
#define CAM_REQ_MGR_ALLOC_BUF_V2 (CAM_COMMON_OPCODE_MAX + 18)
#define CAM_REQ_MGR_MAP_BUF_V2 (CAM_COMMON_OPCODE_MAX + 19)
#define CAM_REQ_MGR_MEM_CPU_ACCESS_OP (CAM_COMMON_OPCODE_MAX + 20)
#define CAM_REQ_MGR_QUERY_CAP (CAM_COMMON_OPCODE_MAX + 21)
#define CAM_REQ_MGR_SCHED_REQ_V3 (CAM_COMMON_OPCODE_MAX + 22)
/* end of cam_req_mgr opcodes */
#define CAM_MEM_FLAG_HW_READ_WRITE (1<<0)
#define CAM_MEM_FLAG_HW_READ_ONLY (1<<1)
#define CAM_MEM_FLAG_HW_WRITE_ONLY (1<<2)
#define CAM_MEM_FLAG_KMD_ACCESS (1<<3)
#define CAM_MEM_FLAG_UMD_ACCESS (1<<4)
#define CAM_MEM_FLAG_PROTECTED_MODE (1<<5)
#define CAM_MEM_FLAG_CMD_BUF_TYPE (1<<6)
#define CAM_MEM_FLAG_PIXEL_BUF_TYPE (1<<7)
#define CAM_MEM_FLAG_STATS_BUF_TYPE (1<<8)
#define CAM_MEM_FLAG_PACKET_BUF_TYPE (1<<9)
#define CAM_MEM_FLAG_CACHE (1<<10)
#define CAM_MEM_FLAG_HW_SHARED_ACCESS (1<<11)
#define CAM_MEM_FLAG_CDSP_OUTPUT (1<<12)
#define CAM_MEM_FLAG_DISABLE_DELAYED_UNMAP (1<<13)
#define CAM_MEM_FLAG_KMD_DEBUG_FLAG (1<<14)
#define CAM_MEM_FLAG_EVA_NOPIXEL (1<<15)
#define CAM_MEM_FLAG_HW_AND_CDM_OR_SHARED (1<<16)
#define CAM_MEM_FLAG_UBWC_P_HEAP (1<<17)
/* Allocation forced to camera heap */
#define CAM_MEM_FLAG_USE_CAMERA_HEAP_ONLY (1<<18)
/* Allocation forced to system heap */
#define CAM_MEM_FLAG_USE_SYS_HEAP_ONLY (1<<19)
#define CAM_MEM_MMU_MAX_HANDLE 16
/* Maximum allowed buffers in existence */
#define CAM_MEM_BUFQ_MAX 2048
#define CAM_MEM_MGR_SECURE_BIT_POS 15
#define CAM_MEM_MGR_HDL_IDX_SIZE 15
#define CAM_MEM_MGR_HDL_FD_SIZE 16
#define CAM_MEM_MGR_HDL_IDX_END_POS 16
#define CAM_MEM_MGR_HDL_FD_END_POS 32
#define CAM_MEM_MGR_HDL_IDX_MASK ((1 << CAM_MEM_MGR_HDL_IDX_SIZE) - 1)
#define GET_MEM_HANDLE(idx, fd) \
((idx & CAM_MEM_MGR_HDL_IDX_MASK) | \
(fd << (CAM_MEM_MGR_HDL_FD_END_POS - CAM_MEM_MGR_HDL_FD_SIZE))) \
#define GET_FD_FROM_HANDLE(hdl) \
(hdl >> (CAM_MEM_MGR_HDL_FD_END_POS - CAM_MEM_MGR_HDL_FD_SIZE)) \
#define CAM_MEM_MGR_GET_HDL_IDX(hdl) (hdl & CAM_MEM_MGR_HDL_IDX_MASK)
#define CAM_MEM_MGR_SET_SECURE_HDL(hdl, flag) \
((flag) ? (hdl |= (1 << CAM_MEM_MGR_SECURE_BIT_POS)) : \
((hdl) &= ~(1 << CAM_MEM_MGR_SECURE_BIT_POS)))
#define CAM_MEM_MGR_IS_SECURE_HDL(hdl) \
(((hdl) & \
(1<<CAM_MEM_MGR_SECURE_BIT_POS)) >> CAM_MEM_MGR_SECURE_BIT_POS)
/**
* memory allocation type
*/
#define CAM_MEM_DMA_NONE 0
#define CAM_MEM_DMA_BIDIRECTIONAL 1
#define CAM_MEM_DMA_TO_DEVICE 2
#define CAM_MEM_DMA_FROM_DEVICE 3
/**
* memory cache operation
*/
#define CAM_MEM_CLEAN_CACHE 1
#define CAM_MEM_INV_CACHE 2
#define CAM_MEM_CLEAN_INV_CACHE 3
/**
* memory CPU access operation
*/
#define CAM_MEM_BEGIN_CPU_ACCESS BIT(0)
#define CAM_MEM_END_CPU_ACCESS BIT(1)
/**
* memory CPU access type
*/
#define CAM_MEM_CPU_ACCESS_READ BIT(0)
#define CAM_MEM_CPU_ACCESS_WRITE BIT(1)
/**
* Feature mask returned in query_cap
*/
#define CAM_REQ_MGR_MEM_UBWC_P_HEAP_SUPPORTED BIT(0)
#define CAM_REQ_MGR_MEM_CAMERA_HEAP_SUPPORTED BIT(1)
/**
* struct cam_req_mgr_query_cap
* @version: Struct version
* @feature_mask Supported features
* @num_valid_params: Valid number of params being used
* @valid_param_mask: Mask to indicate the field types in params
* @params: Additional params
*/
struct cam_req_mgr_query_cap {
__u32 version;
__u64 feature_mask;
__u32 num_valid_params;
__u32 valid_param_mask;
__s32 params[5];
};
/**
* struct cam_mem_alloc_out_params
* @buf_handle: buffer handle
* @fd: output buffer file descriptor
* @vaddr: virtual address pointer
*/
struct cam_mem_alloc_out_params {
__u32 buf_handle;
__s32 fd;
__u64 vaddr;
};
/**
* struct cam_mem_map_out_params
* @buf_handle: buffer handle
* @size: size of the buffer being mapped
* @vaddr: virtual address pointer
*/
struct cam_mem_map_out_params {
__u32 buf_handle;
__u32 size;
__u64 vaddr;
};
/**
* struct cam_mem_mgr_alloc_cmd
* @len: size of buffer to allocate
* @align: alignment of the buffer
* @mmu_hdls: array of mmu handles
* @num_hdl: number of handles
* @flags: flags of the buffer
* @out: out params
*/
/* CAM_REQ_MGR_ALLOC_BUF */
struct cam_mem_mgr_alloc_cmd {
__u64 len;
__u64 align;
__s32 mmu_hdls[CAM_MEM_MMU_MAX_HANDLE];
__u32 num_hdl;
__u32 flags;
struct cam_mem_alloc_out_params out;
};
/**
* struct cam_mem_mgr_alloc_cmd_v2
* @version: Struct version
* @num_hdl: number of handles
* @mmu_hdls: array of mmu handles
* @len: size of buffer to allocate
* @align: alignment of the buffer
* @vmids: reserved
* @buf_name: DMA buffer name
* @flags: flags of the buffer
* @num_valid_params: Valid number of params being used
* @valid_param_mask: Mask to indicate the field types in params
* @params: Additional params
* @out: out params
*/
/* CAM_REQ_MGR_ALLOC_BUF_V2 */
struct cam_mem_mgr_alloc_cmd_v2 {
__u32 version;
__u32 num_hdl;
__s32 mmu_hdls[CAM_MEM_MMU_MAX_HANDLE];
__u64 len;
__u64 align;
__u64 vmids;
char buf_name[CAM_DMA_BUF_NAME_LEN];
__u32 flags;
__u32 num_valid_params;
__u32 valid_param_mask;
__s32 params[5];
struct cam_mem_alloc_out_params out;
};
/**
* struct cam_mem_mgr_map_cmd
* @mmu_hdls: array of mmu handles
* @num_hdl: number of handles
* @flags: flags of the buffer
* @fd: output buffer file descriptor
* @reserved: reserved field
* @out: out params
*/
/* CAM_REQ_MGR_MAP_BUF */
struct cam_mem_mgr_map_cmd {
__s32 mmu_hdls[CAM_MEM_MMU_MAX_HANDLE];
__u32 num_hdl;
__u32 flags;
__s32 fd;
__u32 reserved;
struct cam_mem_map_out_params out;
};
/**
* struct cam_mem_mgr_map_cmd_v2
* @version: Struct version
* @fd: output buffer file descriptor
* @mmu_hdls: array of mmu handles
* @num_hdl: number of handles
* @flags: flags of the buffer
* @vmids: reserved
* @buf_name: DMA buffer name
* @num_valid_params: Valid number of params being used
* @valid_param_mask: Mask to indicate the field types in params
* @params: Additional params
* @out: out params
*/
/* CAM_REQ_MGR_MAP_BUF_V2 */
struct cam_mem_mgr_map_cmd_v2 {
__u32 version;
__s32 fd;
__s32 mmu_hdls[CAM_MEM_MMU_MAX_HANDLE];
__u32 num_hdl;
__u32 flags;
__u64 vmids;
char buf_name[CAM_DMA_BUF_NAME_LEN];
__u32 num_valid_params;
__u32 valid_param_mask;
__s32 params[4];
struct cam_mem_map_out_params out;
};
/**
* struct cam_mem_mgr_map_cmd
* @buf_handle: buffer handle
* @reserved: reserved field
*/
/* CAM_REQ_MGR_RELEASE_BUF */
struct cam_mem_mgr_release_cmd {
__s32 buf_handle;
__u32 reserved;
};
/**
* struct cam_mem_mgr_map_cmd
* @buf_handle: buffer handle
* @ops: cache operations
*/
/* CAM_REQ_MGR_CACHE_OPS */
struct cam_mem_cache_ops_cmd {
__s32 buf_handle;
__u32 mem_cache_ops;
};
/**
* struct cam_mem_cpu_access_op
* @version: Struct version
* @buf_handle: buffer handle
* @access: CPU access operation. Allowed params :
* CAM_MEM_BEGIN_CPU_ACCESS
* CAM_MEM_END_CPU_ACCESS
* both
* @access_type: CPU access type. Allowed params :
* CAM_MEM_CPU_ACCESS_READ
* CAM_MEM_CPU_ACCESS_WRITE
* both
* @num_valid_params: Valid number of params being used
* @valid_param_mask: Mask to indicate the field types in params
* @params: Additional params
*/
/* CAM_REQ_MGR_MEM_CPU_ACCESS_OP */
struct cam_mem_cpu_access_op {
__u32 version;
__s32 buf_handle;
__u32 access;
__u32 access_type;
__u32 num_valid_params;
__u32 valid_param_mask;
__s32 params[4];
};
/**
* Request Manager : error message type
* @CAM_REQ_MGR_ERROR_TYPE_DEVICE: Device error message, fatal to session
* @CAM_REQ_MGR_ERROR_TYPE_REQUEST: Error on a single request, not fatal
* @CAM_REQ_MGR_ERROR_TYPE_BUFFER: Buffer was not filled, not fatal
* @CAM_REQ_MGR_ERROR_TYPE_RECOVERY: Fatal error, can be recovered
* @CAM_REQ_MGR_ERROR_TYPE_SOF_FREEZE: SOF freeze, can be recovered
* @CAM_REQ_MGR_ERROR_TYPE_FULL_RECOVERY: Full recovery, can be recovered
* @CAM_REQ_MGR_ERROR_TYPE_PAGE_FAULT: page fault, can be recovered
* @CAM_REQ_MGR_WARN_TYPE_KMD_RECOVERY: Do internal overflow recovery, notify UMD
*/
#define CAM_REQ_MGR_ERROR_TYPE_DEVICE 0
#define CAM_REQ_MGR_ERROR_TYPE_REQUEST 1
#define CAM_REQ_MGR_ERROR_TYPE_BUFFER 2
#define CAM_REQ_MGR_ERROR_TYPE_RECOVERY 3
#define CAM_REQ_MGR_ERROR_TYPE_SOF_FREEZE 4
#define CAM_REQ_MGR_ERROR_TYPE_FULL_RECOVERY 5
#define CAM_REQ_MGR_ERROR_TYPE_PAGE_FAULT 6
#define CAM_REQ_MGR_WARN_TYPE_KMD_RECOVERY 7
/**
* Request Manager : Error codes
* @CAM_REQ_MGR_ISP_UNREPORTED_ERROR : No Error Code reported
* @CAM_REQ_MGR_LINK_STALLED_ERROR : Unable to apply requests on link
* @CAM_REQ_MGR_CSID_FATAL_ERROR : CSID FATAL Error
* @CAM_REQ_MGR_CSID_FIFO_OVERFLOW_ERROR : CSID OutputFIFO Overflow
* @CAM_REQ_MGR_CSID_RECOVERY_OVERFLOW_ERROR : CSID Recovery Overflow
* @CAM_REQ_MGR_CSID_LANE_FIFO_OVERFLOW_ERROR : CSID Lane fifo overflow
* @CAM_REQ_MGR_CSID_PIXEL_COUNT_MISMATCH : CSID Pixel Count Mismatch
* @CAM_REQ_MGR_CSID_RX_PKT_HDR_CORRUPTION : Packet header received by the csid rx is corrupted
* @CAM_REQ_MGR_CSID_MISSING_PKT_HDR_DATA : Lesser data received in packet header than expected
* @CAM_REQ_MGR_CSID_ERR_ON_SENSOR_SWITCHING : Fatal Error encountered while switching the sensors
* @CAM_REQ_MGR_CSID_UNBOUNDED_FRAME : No EOF in the frame or the frame started with eof
* @CAM_REQ_MGR_ICP_NO_MEMORY : ICP No Memory
* @CAM_REQ_MGR_ICP_ERROR_SYSTEM_FAILURE : ICP system failure
* @CAM_REQ_MGR_CSID_MISSING_EOT : CSID is missing EOT on one or more lanes
* @CAM_REQ_MGR_CSID_RX_PKT_PAYLOAD_CORRUPTION : CSID long packet payload CRC mismatch
* @CAM_REQ_MGR_SENSOR_STREAM_OFF_FAILED : Failed to stream off sensor
* @CAM_REQ_MGR_VALID_SHUTTER_DROPPED : Valid shutter dropped
* @CAM_REQ_MGR_ISP_ERR_HWPD_VIOLATION : HWPD image size violation
* @CAM_REQ_MGR_ISP_ERR_SETTING_MISMATCHED : Setting mismatched between sensor and isp
*/
#define CAM_REQ_MGR_ISP_UNREPORTED_ERROR 0
#define CAM_REQ_MGR_LINK_STALLED_ERROR BIT(0)
#define CAM_REQ_MGR_CSID_FATAL_ERROR BIT(1)
#define CAM_REQ_MGR_CSID_FIFO_OVERFLOW_ERROR BIT(2)
#define CAM_REQ_MGR_CSID_RECOVERY_OVERFLOW_ERROR BIT(3)
#define CAM_REQ_MGR_CSID_LANE_FIFO_OVERFLOW_ERROR BIT(4)
#define CAM_REQ_MGR_CSID_PIXEL_COUNT_MISMATCH BIT(5)
#define CAM_REQ_MGR_CSID_RX_PKT_HDR_CORRUPTION BIT(6)
#define CAM_REQ_MGR_CSID_MISSING_PKT_HDR_DATA BIT(7)
#define CAM_REQ_MGR_CSID_ERR_ON_SENSOR_SWITCHING BIT(8)
#define CAM_REQ_MGR_CSID_UNBOUNDED_FRAME BIT(9)
#define CAM_REQ_MGR_ICP_NO_MEMORY BIT(10)
#define CAM_REQ_MGR_ICP_SYSTEM_FAILURE BIT(11)
#define CAM_REQ_MGR_CSID_MISSING_EOT BIT(12)
#define CAM_REQ_MGR_CSID_RX_PKT_PAYLOAD_CORRUPTION BIT(13)
#define CAM_REQ_MGR_SENSOR_STREAM_OFF_FAILED BIT(14)
#define CAM_REQ_MGR_VALID_SHUTTER_DROPPED BIT(15)
#define CAM_REQ_MGR_ISP_ERR_HWPD_VIOLATION BIT(16)
#define CAM_REQ_MGR_ISP_ERR_OVERFLOW BIT(17)
#define CAM_REQ_MGR_ISP_ERR_P2I BIT(18)
#define CAM_REQ_MGR_ISP_ERR_VIOLATION BIT(19)
#define CAM_REQ_MGR_ISP_ERR_BUSIF_OVERFLOW BIT(20)
#define CAM_REQ_MGR_ISP_ERR_SETTING_MISMATCHED BIT(21)
#define CAM_REQ_MGR_ISP_ERR_ILLEGAL_DT_SWITCH BIT(22)
/**
* struct cam_req_mgr_error_msg
* @error_type: type of error
* @request_id: request id of frame
* @device_hdl: device handle
* @linke_hdl: link_hdl
* @resource_size: size of the resource
* @error_code: Error code reported by the event.
* Note: This field is a bit field.
*/
struct cam_req_mgr_error_msg {
__u32 error_type;
__u32 request_id;
__s32 device_hdl;
__s32 link_hdl;
__u32 resource_size;
__u32 error_code;
};
/**
* struct cam_req_mgr_frame_msg
* @request_id: request id of the frame
* @frame_id: frame id of the frame
* @timestamp: timestamp of the frame
* @link_hdl: link handle associated with this message
* @sof_status: sof status success or fail
* @frame_id_meta: refers to the meta for
* that frame in specific usecases
* @reserved: reserved
*/
struct cam_req_mgr_frame_msg {
__u64 request_id;
__u64 frame_id;
__u64 timestamp;
__s32 link_hdl;
__u32 sof_status;
__u32 frame_id_meta;
__u32 reserved;
};
/**
* enum cam_req_msg_timestamp_type - Identifies index of timestamps
*
* @CAM_REQ_SOF_QTIMER_TIMESTAMP: SOF qtimer timestamp
* @CAM_REQ_BOOT_TIMESTAMP: SOF boot timestamp
* @CAM_REQ_TIMESTAMP_TYPE: Max enum index for timestamp type
*
*/
enum cam_req_msg_timestamp_type {
CAM_REQ_SOF_QTIMER_TIMESTAMP = 0,
CAM_REQ_BOOT_TIMESTAMP,
CAM_REQ_TIMESTAMP_MAX
};
/**
* struct cam_req_mgr_frame_msg
* @request_id: request id of the frame
* @frame_id: frame id of the frame
* @timestamps: array for all the supported timestamps
* @link_hdl: link handle associated with this message
* @frame_id_meta: refers to the meta for
* that frame in specific usecases
* @reserved: reserved for future addtions and max size for structure can be 64 bytes
*/
struct cam_req_mgr_frame_msg_v2 {
__u64 request_id;
__u64 frame_id;
__u64 timestamps[CAM_REQ_TIMESTAMP_MAX];
__s32 link_hdl;
__u32 frame_id_meta;
__u32 reserved[4];
};
/**
* struct cam_req_mgr_custom_msg
* @custom_type: custom type
* @request_id: request id of the frame
* @frame_id: frame id of the frame
* @timestamp: timestamp of the frame
* @link_hdl: link handle associated with this message
* @custom_data: custom data
*/
struct cam_req_mgr_custom_msg {
__u32 custom_type;
__u64 request_id;
__u64 frame_id;
__u64 timestamp;
__s32 link_hdl;
__u64 custom_data;
};
/**
* Request Manager Node Msg Event Types
* @CAM_REQ_MGR_NO_EVENT : Event type not reported by the hardware
* @CAM_REQ_MGR_RETRY_EVENT : Retry request reported from the hardware
*/
#define CAM_REQ_MGR_NO_EVENT 0
#define CAM_REQ_MGR_RETRY_EVENT 1
/**
* Request Manager Node Msg Event Cause
* @CAM_REQ_MGR_CAUSE_UNREPORTED : Event cause not reported by the hardware
* @CAM_REQ_MGR_JPEG_THUBNAIL_SIZE_ERROR : JPEG Thumbnail encode size exceeds the threshold size
*/
#define CAM_REQ_MGR_CAUSE_UNREPORTED 0
#define CAM_REQ_MGR_JPEG_THUBNAIL_SIZE_ERROR 1
/**
* struct cam_req_mgr_node_msg
* @device_hdl : Device handle of the device reporting the error
* @link_hdl : link hdl for real time devices
* @event_type : Type of the event
* @event_cause : Cause of the event
* @request_id : Request id
* @custom_data : custom data
* @reserved : Reserved field
*/
struct cam_req_mgr_node_msg {
__s32 device_hdl;
__s32 link_hdl;
__u32 event_type;
__u32 event_cause;
__u64 request_id;
__u64 custom_data;
__u32 reserved[2];
};
/**
* Request Manager Msg Page Fault event
* @CAM_REQ_MGR_PF_EVT_BUF_NOT_FOUND : Faulted buffer not found
* @CAM_REQ_MGR_PF_EVT_BUF_FOUND_IO_CFG : Faulted buffer from io_cfg found
* @CAM_REQ_MGR_PF_EVT_BUF_FOUND_REF_BUF : Faulted io region buffer in Patch found
* @CAM_REQ_MGR_PF_EVT_BUF_FOUND_CDM : Fault in cmd buffer
* @CAM_REQ_MGR_PF_EVT_BUF_FOUND_SHARED : Fault in shared region buffer
*/
#define CAM_REQ_MGR_PF_EVT_BUF_NOT_FOUND 0
#define CAM_REQ_MGR_PF_EVT_BUF_FOUND_IO_CFG 1
#define CAM_REQ_MGR_PF_EVT_BUF_FOUND_REF_BUF 2
#define CAM_REQ_MGR_PF_EVT_BUF_FOUND_CDM 3
#define CAM_REQ_MGR_PF_EVT_BUF_FOUND_SHARED 4
/**
* Faulted Memory Type
* @CAM_REQ_MGR_PF_TYPE_NULL : Fault on NULL
* @CAM_REQ_MGR_PF_TYPE_OUT_OF_BOUND : Fault on address outside of any mapped buffer
* @CAM_REQ_MGR_PF_TYPE_MAPPED_REGION : Fault on address within a mapped buffer
*/
#define CAM_REQ_MGR_PF_TYPE_NULL 0
#define CAM_REQ_MGR_PF_TYPE_OUT_OF_BOUND 1
#define CAM_REQ_MGR_PF_TYPE_MAPPED_REGION 2
/**
* Faulted Memory stage
* @CAM_REQ_MGR_STAGE1_FAULT : Faulted memory in non-secure stage
* @CAM_REQ_MGR_STAGE2_FAULT : Faulted memory in secure stage
*/
#define CAM_REQ_MGR_STAGE1_FAULT 0
#define CAM_REQ_MGR_STAGE2_FAULT 1
/**
* struct cam_req_mgr_pf_err_msg
* @device_hdl : device handle of the device reporting the error
* @link_hdl : link hdl for real time devices
* @pf_evt : indicates if no faulted buffer found or found
* io cfg faulted buffer or found ref faulted buffer
* or found cdm shared fautled buffer
* @pf_type : indicates if page fault type is fault on NULL or
* fault out of bound or fault within mapped region
* @pf_stage : indicates if faulted memory is from secure or non-secure region
* @patch_id : index to which patch in the packet is faulted
* @buf_hdl : faulted buffer memory handle
* @offset : offset provided in the packet
* @port_id : resource type of the io cfg in packet
* @far_delta : memory gab between faulted addr and closest
* buffer's starting address
* @req_id : request id for the faulted request
* @bid : bus id
* @pid : unique id for hw group of ports
* @mid : port id of hw
* @reserved : reserved fields
*/
struct cam_req_mgr_pf_err_msg {
__s32 device_hdl;
__s32 link_hdl;
__u8 pf_evt;
__u8 pf_type;
__u8 pf_stage;
__u8 patch_id;
__s32 buf_hdl;
__u32 offset;
__u32 port_id;
__u64 far_delta;
__u64 req_id;
__u8 bid;
__u8 pid;
__u16 mid;
__u32 reserved[3];
};
/**
* struct cam_req_mgr_message - 64 bytes is the max size that can be sent as v4l2 evt
* @session_hdl: session to which the frame belongs to
* @reserved: reserved field
* @u: union which can either be error/frame/custom/node message/page fault message
*/
struct cam_req_mgr_message {
__s32 session_hdl;
__s32 reserved;
union {
struct cam_req_mgr_error_msg err_msg;
struct cam_req_mgr_frame_msg frame_msg;
struct cam_req_mgr_frame_msg_v2 frame_msg_v2;
struct cam_req_mgr_custom_msg custom_msg;
struct cam_req_mgr_node_msg node_msg;
struct cam_req_mgr_pf_err_msg pf_err_msg;
} u;
};
#endif /* __UAPI_LINUX_CAM_REQ_MGR_H */

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/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
*/
#ifndef __UAPI_CAM_SYNC_H__
#define __UAPI_CAM_SYNC_H__
#include <linux/videodev2.h>
#include <linux/types.h>
#include <linux/ioctl.h>
#include <linux/media.h>
#define CAM_SYNC_DEVICE_NAME "cam_sync_device"
/* V4L event which user space will subscribe to */
#define CAM_SYNC_V4L_EVENT (V4L2_EVENT_PRIVATE_START + 0)
#define CAM_SYNC_V4L_EVENT_V2 (V4L2_EVENT_PRIVATE_START + 1)
/* Specific event ids to get notified in user space */
#define CAM_SYNC_V4L_EVENT_ID_CB_TRIG 0
/* Size of opaque payload sent to kernel for safekeeping until signal time */
#define CAM_SYNC_USER_PAYLOAD_SIZE 2
/* Device type for sync device needed for device discovery */
#define CAM_SYNC_DEVICE_TYPE (MEDIA_ENT_F_OLD_BASE)
#define CAM_SYNC_GET_PAYLOAD_PTR(ev, type) \
(type *)((char *)ev.u.data + sizeof(struct cam_sync_ev_header))
#define CAM_SYNC_GET_HEADER_PTR(ev) \
((struct cam_sync_ev_header *)ev.u.data)
#define CAM_SYNC_GET_PAYLOAD_PTR_V2(ev, type) \
(type *)((char *)ev.u.data + sizeof(struct cam_sync_ev_header_v2))
#define CAM_SYNC_GET_HEADER_PTR_V2(ev) \
((struct cam_sync_ev_header_v2 *)ev.u.data)
#define CAM_SYNC_STATE_INVALID 0
#define CAM_SYNC_STATE_ACTIVE 1
#define CAM_SYNC_STATE_SIGNALED_SUCCESS 2
#define CAM_SYNC_STATE_SIGNALED_ERROR 3
#define CAM_SYNC_STATE_SIGNALED_CANCEL 4
/* Top level common sync event reason types */
#define CAM_SYNC_COMMON_EVENT_START 0
#define CAM_SYNC_COMMON_EVENT_UNUSED (CAM_SYNC_COMMON_EVENT_START + 0)
#define CAM_SYNC_COMMON_EVENT_SUCCESS (CAM_SYNC_COMMON_EVENT_START + 1)
#define CAM_SYNC_COMMON_EVENT_FLUSH (CAM_SYNC_COMMON_EVENT_START + 2)
#define CAM_SYNC_COMMON_EVENT_STOP (CAM_SYNC_COMMON_EVENT_START + 3)
#define CAM_SYNC_COMMON_EVENT_SYNX (CAM_SYNC_COMMON_EVENT_START + 4)
#define CAM_SYNC_COMMON_REG_PAYLOAD_EVENT (CAM_SYNC_COMMON_EVENT_START + 5)
#define CAM_SYNC_COMMON_SYNC_SIGNAL_EVENT (CAM_SYNC_COMMON_EVENT_START + 6)
#define CAM_SYNC_COMMON_RELEASE_EVENT (CAM_SYNC_COMMON_EVENT_START + 7)
#define CAM_SYNC_COMMON_EVENT_END (CAM_SYNC_COMMON_EVENT_START + 50)
/* ISP Sync event reason types */
#define CAM_SYNC_ISP_EVENT_START (CAM_SYNC_COMMON_EVENT_END + 1)
#define CAM_SYNC_ISP_EVENT_UNKNOWN (CAM_SYNC_ISP_EVENT_START + 0)
#define CAM_SYNC_ISP_EVENT_BUBBLE (CAM_SYNC_ISP_EVENT_START + 1)
#define CAM_SYNC_ISP_EVENT_OVERFLOW (CAM_SYNC_ISP_EVENT_START + 2)
#define CAM_SYNC_ISP_EVENT_P2I_ERROR (CAM_SYNC_ISP_EVENT_START + 3)
#define CAM_SYNC_ISP_EVENT_VIOLATION (CAM_SYNC_ISP_EVENT_START + 4)
#define CAM_SYNC_ISP_EVENT_BUSIF_OVERFLOW (CAM_SYNC_ISP_EVENT_START + 5)
#define CAM_SYNC_ISP_EVENT_FLUSH (CAM_SYNC_ISP_EVENT_START + 6)
#define CAM_SYNC_ISP_EVENT_HW_STOP (CAM_SYNC_ISP_EVENT_START + 7)
#define CAM_SYNC_ISP_EVENT_RECOVERY_OVERFLOW (CAM_SYNC_ISP_EVENT_START + 8)
#define CAM_SYNC_ISP_EVENT_CSID_OUTPUT_FIFO_OVERFLOW (CAM_SYNC_ISP_EVENT_START + 9)
#define CAM_SYNC_ISP_EVENT_CSID_RX_ERROR (CAM_SYNC_ISP_EVENT_START + 10)
#define CAM_SYNC_ISP_EVENT_CSID_SENSOR_SWITCH_ERROR (CAM_SYNC_ISP_EVENT_START + 11)
#define CAM_SYNC_ISP_EVENT_END (CAM_SYNC_ISP_EVENT_START + 50)
/* ICP Sync event reason types */
#define CAM_SYNC_ICP_EVENT_START (CAM_SYNC_ISP_EVENT_END + 1)
#define CAM_SYNC_ICP_EVENT_UNKNOWN (CAM_SYNC_ICP_EVENT_START + 0)
#define CAM_SYNC_ICP_EVENT_FRAME_PROCESS_FAILURE (CAM_SYNC_ICP_EVENT_START + 1)
#define CAM_SYNC_ICP_EVENT_CONFIG_ERR (CAM_SYNC_ICP_EVENT_START + 2)
#define CAM_SYNC_ICP_EVENT_NO_MEMORY (CAM_SYNC_ICP_EVENT_START + 3)
#define CAM_SYNC_ICP_EVENT_BAD_STATE (CAM_SYNC_ICP_EVENT_START + 4)
#define CAM_SYNC_ICP_EVENT_BAD_PARAM (CAM_SYNC_ICP_EVENT_START + 5)
#define CAM_SYNC_ICP_EVENT_BAD_ITEM (CAM_SYNC_ICP_EVENT_START + 6)
#define CAM_SYNC_ICP_EVENT_INVALID_FORMAT (CAM_SYNC_ICP_EVENT_START + 7)
#define CAM_SYNC_ICP_EVENT_UNSUPPORTED (CAM_SYNC_ICP_EVENT_START + 8)
#define CAM_SYNC_ICP_EVENT_OUT_OF_BOUND (CAM_SYNC_ICP_EVENT_START + 9)
#define CAM_SYNC_ICP_EVENT_TIME_OUT (CAM_SYNC_ICP_EVENT_START + 10)
#define CAM_SYNC_ICP_EVENT_ABORTED (CAM_SYNC_ICP_EVENT_START + 11)
#define CAM_SYNC_ICP_EVENT_HW_VIOLATION (CAM_SYNC_ICP_EVENT_START + 12)
#define CAM_SYNC_ICP_EVENT_CMD_ERROR (CAM_SYNC_ICP_EVENT_START + 13)
#define CAM_SYNC_ICP_EVENT_HFI_ERR_COMMAND_SIZE (CAM_SYNC_ICP_EVENT_START + 14)
#define CAM_SYNC_ICP_EVENT_HFI_ERR_MESSAGE_SIZE (CAM_SYNC_ICP_EVENT_START + 15)
#define CAM_SYNC_ICP_EVENT_HFI_ERR_QUEUE_EMPTY (CAM_SYNC_ICP_EVENT_START + 16)
#define CAM_SYNC_ICP_EVENT_HFI_ERR_QUEUE_FULL (CAM_SYNC_ICP_EVENT_START + 17)
#define CAM_SYNC_ICP_EVENT_END (CAM_SYNC_ICP_EVENT_START + 50)
/* JPEG Sync event reason types */
#define CAM_SYNC_JPEG_EVENT_START (CAM_SYNC_ICP_EVENT_END + 1)
#define CAM_SYNC_JPEG_EVENT_UNKNOWN (CAM_SYNC_JPEG_EVENT_START + 0)
#define CAM_SYNC_JPEG_EVENT_INVLD_CMD (CAM_SYNC_JPEG_EVENT_START + 1)
#define CAM_SYNC_JPEG_EVENT_SET_IRQ_CB (CAM_SYNC_JPEG_EVENT_START + 2)
#define CAM_SYNC_JPEG_EVENT_HW_RESET_FAILED (CAM_SYNC_JPEG_EVENT_START + 3)
#define CAM_SYNC_JPEG_EVENT_CDM_CHANGE_BASE_ERR (CAM_SYNC_JPEG_EVENT_START + 4)
#define CAM_SYNC_JPEG_EVENT_CDM_CONFIG_ERR (CAM_SYNC_JPEG_EVENT_START + 5)
#define CAM_SYNC_JPEG_EVENT_START_HW_ERR (CAM_SYNC_JPEG_EVENT_START + 6)
#define CAM_SYNC_JPEG_EVENT_START_HW_HANG (CAM_SYNC_JPEG_EVENT_START + 7)
#define CAM_SYNC_JPEG_EVENT_MISR_CONFIG_ERR (CAM_SYNC_JPEG_EVENT_START + 8)
#define CAM_SYNC_JPEG_EVENT_END (CAM_SYNC_JPEG_EVENT_START + 50)
/* FD Sync event reason types */
#define CAM_SYNC_FD_EVENT_START (CAM_SYNC_JPEG_EVENT_END + 1)
#define CAM_SYNC_FD_EVENT_UNKNOWN (CAM_SYNC_FD_EVENT_START + 0)
#define CAM_SYNC_FD_EVENT_IRQ_FRAME_DONE (CAM_SYNC_FD_EVENT_START + 1)
#define CAM_SYNC_FD_EVENT_IRQ_RESET_DONE (CAM_SYNC_FD_EVENT_START + 2)
#define CAM_SYNC_FD_EVENT_HALT (CAM_SYNC_FD_EVENT_START + 3)
#define CAM_SYNC_FD_EVENT_END (CAM_SYNC_FD_EVENT_START + 50)
/* LRME Sync event reason types */
#define CAM_SYNC_LRME_EVENT_START (CAM_SYNC_FD_EVENT_END + 1)
#define CAM_SYNC_LRME_EVENT_UNKNOWN (CAM_SYNC_LRME_EVENT_START + 0)
#define CAM_SYNC_LRME_EVENT_CB_ERROR (CAM_SYNC_LRME_EVENT_START + 1)
#define CAM_SYNC_LRME_EVENT_END (CAM_SYNC_LRME_EVENT_START + 50)
/* OPE Sync event reason types */
#define CAM_SYNC_OPE_EVENT_START (CAM_SYNC_LRME_EVENT_END + 1)
#define CAM_SYNC_OPE_EVENT_UNKNOWN (CAM_SYNC_OPE_EVENT_START + 0)
#define CAM_SYNC_OPE_EVENT_PAGE_FAULT (CAM_SYNC_OPE_EVENT_START + 1)
#define CAM_SYNC_OPE_EVENT_HW_HANG (CAM_SYNC_OPE_EVENT_START + 2)
#define CAM_SYNC_OPE_EVENT_HALT (CAM_SYNC_OPE_EVENT_START + 3)
#define CAM_SYNC_OPE_EVENT_CONFIG_ERR (CAM_SYNC_OPE_EVENT_START + 4)
#define CAM_SYNC_OPE_EVENT_HW_FLUSH (CAM_SYNC_OPE_EVENT_START + 5)
#define CAM_SYNC_OPE_EVENT_HW_RESUBMIT (CAM_SYNC_OPE_EVENT_START + 6)
#define CAM_SYNC_OPE_EVENT_HW_RESET_DONE (CAM_SYNC_OPE_EVENT_START + 7)
#define CAM_SYNC_OPE_EVENT_HW_ERROR (CAM_SYNC_OPE_EVENT_START + 8)
#define CAM_SYNC_OPE_EVENT_INVLD_CMD (CAM_SYNC_OPE_EVENT_START + 9)
#define CAM_SYNC_OPE_EVENT_HW_RESET_FAILED (CAM_SYNC_OPE_EVENT_START + 10)
#define CAM_SYNC_OPE_EVENT_END (CAM_SYNC_OPE_EVENT_START + 50)
/* CRE Sync event reason types */
#define CAM_SYNC_CRE_EVENT_START (CAM_SYNC_OPE_EVENT_END + 1)
#define CAM_SYNC_CRE_EVENT_UNKNOWN (CAM_SYNC_CRE_EVENT_START + 0)
#define CAM_SYNC_CRE_EVENT_CONFIG_ERR (CAM_SYNC_CRE_EVENT_START + 1)
#define CAM_SYNC_CRE_EVENT_INVLD_CMD (CAM_SYNC_CRE_EVENT_START + 2)
#define CAM_SYNC_CRE_EVENT_SET_IRQ_CB (CAM_SYNC_CRE_EVENT_START + 3)
#define CAM_SYNC_CRE_EVENT_HW_RESET_FAILED (CAM_SYNC_CRE_EVENT_START + 4)
#define CAM_SYNC_CRE_EVENT_HW_ERR (CAM_SYNC_CRE_EVENT_START + 5)
#define CAM_SYNC_CRE_EVENT_END (CAM_SYNC_CRE_EVENT_START + 50)
#define CAM_SYNC_EVENT_MAX 8
#define CAM_SYNC_EVENT_REASON_CODE_INDEX 0
/* Fence types supported by the driver, when used in the fence mask it
* represents bit position, for masks it needs to be set as
* BIT(fence_type) on other occasions use as is.
*/
#define CAM_GENERIC_FENCE_TYPE_SYNC_OBJ 0x1
#define CAM_GENERIC_FENCE_TYPE_DMA_FENCE 0x2
#define CAM_GENERIC_FENCE_TYPE_SYNX_OBJ 0x3
/* Additional param index for cam_generic_fence_config */
#define CAM_GENERIC_FENCE_CONFIG_FLAG_PARAM_INDEX BIT(0)
/* Flag fields for cam_generic_fence_config */
#define CAM_GENERIC_FENCE_FLAG_IS_GLOBAL_SYNX_OBJ BIT(0)
/**
* struct cam_sync_ev_header - Event header for sync event notification
*
* @sync_obj: Sync object
* @status: Status of the object
*/
struct cam_sync_ev_header {
__s32 sync_obj;
__s32 status;
};
/**
* struct cam_sync_ev_header_v2 - Event header for sync event notification
*
* @sync_obj: Sync object
* @status: Status of the object
* @version: sync driver version
* @evt_param: event parameter
*/
struct cam_sync_ev_header_v2 {
__s32 sync_obj;
__s32 status;
uint32_t version;
uint32_t evt_param[CAM_SYNC_EVENT_MAX];
};
/**
* struct cam_sync_info - Sync object creation information
*
* @name: Optional string representation of the sync object
* @sync_obj: Sync object returned after creation in kernel
*/
struct cam_sync_info {
char name[64];
__s32 sync_obj;
};
/**
* struct cam_sync_signal - Sync object signaling struct
*
* @sync_obj: Sync object to be signaled
* @sync_state: State of the sync object to which it should be signaled
*/
struct cam_sync_signal {
__s32 sync_obj;
__u32 sync_state;
};
/**
* struct cam_sync_merge - Merge information for sync objects
*
* @sync_objs: Pointer to sync objects
* @num_objs: Number of objects in the array
* @merged: Merged sync object
*/
struct cam_sync_merge {
__u64 sync_objs;
__u32 num_objs;
__s32 merged;
};
/**
* struct cam_sync_userpayload_info - Payload info from user space
*
* @sync_obj: Sync object for which payload has to be registered for
* @reserved: Reserved
* @payload: Pointer to user payload
*/
struct cam_sync_userpayload_info {
__s32 sync_obj;
__u32 reserved;
__u64 payload[CAM_SYNC_USER_PAYLOAD_SIZE];
};
/**
* struct cam_sync_wait - Sync object wait information
*
* @sync_obj: Sync object to wait on
* @reserved: Reserved
* @timeout_ms: Timeout in milliseconds
*/
struct cam_sync_wait {
__s32 sync_obj;
__u32 reserved;
uint64_t timeout_ms;
};
/**
* struct cam_generic_fence_config - Fence config
* Based on the operation, fields could be
* input/output
*
* @version: Struct version
* @name: Optional string representation [used for create/import]
* @fence_sel_mask: Fence select mask, if set for fence types other than the type
* this input is processed for, the corresponding types would be
* processed as well. For example if one wants to import a sync
* object for an existing dma fence, set bit with index
* CAM_GENERIC_FENCE_TYPE_SYNC_OBJ in mask,
* a new sync object would be returned in sync_obj linked to an
* existing dma_fence_fd.
* @sync_obj: Sync object
* @dma_fence_fd: DMA fence fd
* @synx_obj: Synx object
* @reason_code: Indicates if the operation was successful or not
* for this set of fences. It is the responsibility of
* the caller to clean up any partially processed batched
* fences
* @num_valid_params: Valid number of params being used
* @valid_param_mask: Mask to indicate the field types in params
* @params: Additional params
*/
struct cam_generic_fence_config {
__u32 version;
char name[64];
__u32 fence_sel_mask;
__s32 sync_obj;
__s32 dma_fence_fd;
__s32 synx_obj;
__s32 reason_code;
__u32 num_valid_params;
__u32 valid_param_mask;
__u32 params[4];
};
/**
* struct cam_generic_fence_signal_info - Fence signaling info
*
* @version: Struct version
* @num_fences_requested: Number of fences to process
* @num_fences_processed: Number of fences processed by the driver
* @fence_handle_type: Type of the fence signal handle [user handle is expected]
* @fence_data_size: Size of the data pointed to by fence_info_hdl,
* it should be the consolidated size of
* total fences to process * size of the corresponding signaling
* input structure
* @fence_info_hdl: Handle to the fence signal data (synx/dma)
* @num_valid_params: Valid number of params being used
* @valid_param_mask: Mask to indicate the field types in params
* @params: Additional params
*/
struct cam_generic_fence_signal_info {
__u32 version;
__u32 num_fences_requested;
__u32 num_fences_processed;
__u32 fence_handle_type;
__u32 fence_data_size;
__u64 fence_info_hdl;
__u32 num_valid_params;
__u32 valid_param_mask;
__s32 params[3];
};
/**
* struct cam_dma_fence_signal - DMA fence signaling info
*
* @version: Struct version
* @dma_fence_fd: DMA fence to be signaled
* @status: Any status if applicable, 0 for success
* @num_valid_params: Valid number of params being used
* @valid_param_mask: Mask to indicate the field types in params
* @params: Additional params
*/
struct cam_dma_fence_signal {
__u32 version;
__s32 dma_fence_fd;
__s32 status;
__u32 num_valid_params;
__u32 valid_param_mask;
__s32 params[3];
};
/**
* struct cam_synx_obj_signal - Synx object signaling info
*
* @version: Struct version
* @synx_obj: Synx object to be signaled
* @status: Fence status
* @reason_code: Indicates if the operation was successful or not
* @num_valid_params: Valid number of params being used
* @valid_param_mask: Mask to indicate the field types in params
* @params: Additional params
*/
struct cam_synx_obj_signal {
__u32 version;
__u32 synx_obj;
__u32 status;
__s32 reason_code;
__u32 num_valid_params;
__u32 valid_param_mask;
__s32 params[4];
};
/**
* struct cam_generic_fence_input_info - Parent structure that
* provides info on fence batching
*
* @version: Struct version
* @num_fences_requested: Number of fences to process
* @num_fences_processed: Number of fences processed
* If userland requests 5 fences to be created
* and it fails on the 3rd, num processed will be
* 3. This can be used by userspace to clean
* partially batched fences
* @num_valid_params: Valid number of params being used
* @valid_param_mask: Mask to indicate the field types in params
* @params: Additional params
* @fence_info: Variable length fence info input based on num_fences
*/
struct cam_generic_fence_input_info {
__u32 version;
__u32 num_fences_requested;
__u32 num_fences_processed;
__u32 num_valid_params;
__u32 valid_param_mask;
__s32 params[3];
union {
struct cam_generic_fence_config fence_cfg[1];
__DECLARE_FLEX_ARRAY(struct cam_generic_fence_config, fence_cfg_flex);
};
};
/**
* struct cam_generic_fence_cmd_args - Generic fence cmd args
*
* @version: Struct version
* @fence_type: Type of fence the ioctl cmd is for [dma/sync/synx]
* @input_handle_type: Type of the fence input handle [user handle is expected]
* @input_data_size: Size of the data pointed to by input_handle
* @input_handle: Handle to the fence input data [create/signal/import...]
* corresponding to the fence_type
* @num_valid_params: Valid number of reserved params being used
* @valid_param_mask: Mask to indicate the field types in params
* @params: Additional params
*/
struct cam_generic_fence_cmd_args {
__u32 version;
__u32 fence_type;
__u32 input_handle_type;
__u32 input_data_size;
__u64 input_handle;
__u32 num_valid_params;
__u32 valid_param_mask;
__u32 params[6];
};
/**
* struct cam_private_ioctl_arg - Sync driver ioctl argument
*
* @id: IOCTL command id
* @size: Size of command payload
* @result: Result of command execution
* @reserved: Reserved
* @ioctl_ptr: Pointer to user data
*/
struct cam_private_ioctl_arg {
__u32 id;
__u32 size;
__u32 result;
__u32 reserved;
__u64 ioctl_ptr;
};
#define CAM_PRIVATE_IOCTL_CMD \
_IOWR('V', BASE_VIDIOC_PRIVATE, struct cam_private_ioctl_arg)
/* Exclusive sync object IOCTL cmds */
#define CAM_SYNC_CREATE 0
#define CAM_SYNC_DESTROY 1
#define CAM_SYNC_SIGNAL 2
#define CAM_SYNC_MERGE 3
#define CAM_SYNC_REGISTER_PAYLOAD 4
#define CAM_SYNC_DEREGISTER_PAYLOAD 5
#define CAM_SYNC_WAIT 6
/* Generic fence [sync/dma/synx] IOCTL cmds */
#define CAM_GENERIC_FENCE_CREATE 11
#define CAM_GENERIC_FENCE_RELEASE 12
#define CAM_GENERIC_FENCE_IMPORT 13
#define CAM_GENERIC_FENCE_SIGNAL 14
#endif /* __UAPI_CAM_SYNC_H__ */

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qcom/opensource/camera-kernel/include/uapi/camera/media/cam_tfe.h Normal file
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@@ -0,0 +1,542 @@
/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef __UAPI_CAM_TFE_H__
#define __UAPI_CAM_TFE_H__
#include <media/cam_defs.h>
#include <media/cam_isp_tfe.h>
#include <media/cam_cpas.h>
/* ISP TFE driver name */
#define CAM_ISP_TFE_DEV_NAME "cam-isp"
/* HW type */
#define CAM_ISP_TFE_HW_BASE 0
#define CAM_ISP_TFE_HW_CSID 1
#define CAM_ISP_TFE_HW_TFE 2
#define CAM_ISP_TFE_HW_MAX 3
/* Color Pattern */
#define CAM_ISP_TFE_PATTERN_BAYER_RGRGRG 0
#define CAM_ISP_TFE_PATTERN_BAYER_GRGRGR 1
#define CAM_ISP_TFE_PATTERN_BAYER_BGBGBG 2
#define CAM_ISP_TFE_PATTERN_BAYER_GBGBGB 3
#define CAM_ISP_TFE_PATTERN_YUV_YCBYCR 4
#define CAM_ISP_TFE_PATTERN_YUV_YCRYCB 5
#define CAM_ISP_TFE_PATTERN_YUV_CBYCRY 6
#define CAM_ISP_TFE_PATTERN_YUV_CRYCBY 7
#define CAM_ISP_TFE_PATTERN_MAX 8
/* Usage Type */
#define CAM_ISP_TFE_IN_RES_USAGE_SINGLE 0
#define CAM_ISP_TFE_IN_RES_USAGE_DUAL 1
#define CAM_ISP_TFE_IN_RES_USAGE_MAX 2
/* Resource ID */
#define CAM_ISP_TFE_RES_ID_PORT 0
#define CAM_ISP_TFE_RES_ID_MAX 1
/* Resource Type - Type of resource for the resource id
* defined in cam_isp_tfe.h
*/
/* Lane Type in input resource for Port */
#define CAM_ISP_TFE_IN_LANE_TYPE_DPHY 0
#define CAM_ISP_TFE_IN_LANE_TYPE_CPHY 1
#define CAM_ISP_TFE_IN_LANE_TYPE_MAX 2
/* ISP TFE packet opcode */
#define CAM_ISP_TFE_PACKET_OP_BASE 0
#define CAM_ISP_TFE_PACKET_INIT_DEV 1
#define CAM_ISP_TFE_PACKET_CONFIG_DEV 2
#define CAM_ISP_TFE_PACKET_OP_MAX 3
/* ISP TFE packet meta_data type for command buffer */
#define CAM_ISP_TFE_PACKET_META_BASE 0
#define CAM_ISP_TFE_PACKET_META_LEFT 1
#define CAM_ISP_TFE_PACKET_META_RIGHT 2
#define CAM_ISP_TFE_PACKET_META_COMMON 3
#define CAM_ISP_TFE_PACKET_META_DUAL_CONFIG 4
#define CAM_ISP_TFE_PACKET_META_GENERIC_BLOB_COMMON 5
#define CAM_ISP_TFE_PACKET_META_REG_DUMP_PER_REQUEST 6
#define CAM_ISP_TFE_PACKET_META_REG_DUMP_ON_FLUSH 7
#define CAM_ISP_TFE_PACKET_META_REG_DUMP_ON_ERROR 8
/* ISP TFE Generic Cmd Buffer Blob types */
#define CAM_ISP_TFE_GENERIC_BLOB_TYPE_HFR_CONFIG 0
#define CAM_ISP_TFE_GENERIC_BLOB_TYPE_CLOCK_CONFIG 1
#define CAM_ISP_TFE_GENERIC_BLOB_TYPE_BW_CONFIG_V2 2
#define CAM_ISP_TFE_GENERIC_BLOB_TYPE_CSID_CLOCK_CONFIG 3
#define CAM_ISP_TFE_GENERIC_BLOB_TYPE_BW_LIMITER_CFG 16
/* DSP mode */
#define CAM_ISP_TFE_DSP_MODE_NONE 0
#define CAM_ISP_TFE_DSP_MODE_ONE_WAY 1
#define CAM_ISP_TFE_DSP_MODE_ROUND 2
/* Per Path Usage Data */
#define CAM_ISP_TFE_USAGE_INVALID 0
#define CAM_ISP_TFE_USAGE_LEFT_PX 1
#define CAM_ISP_TFE_USAGE_RIGHT_PX 2
#define CAM_ISP_TFE_USAGE_RDI 3
/* Bus write master modes */
#define CAM_ISP_TFE_WM_FRAME_BASED_MODE 0
#define CAM_ISP_TFE_WM_LINE_BASED_MODE 1
#define CAM_ISP_TFE_WM_INDEX_BASED_MODE 2
#define CAM_ISP_TFE_VC_DT_CFG 2
/* Feature Flag indicators */
#define CAM_ISP_TFE_FLAG_QCFA_BIN BIT(0)
#define CAM_ISP_TFE_FLAG_BAYER_BIN BIT(1)
/* Query devices */
/**
* struct cam_isp_tfe_dev_cap_info - A cap info for particular hw type
*
* @hw_type: Hardware type for the cap info
* @reserved: reserved field for alignment
* @hw_version: Hardware version
*
*/
struct cam_isp_tfe_dev_cap_info {
__u32 hw_type;
__u32 reserved;
struct cam_hw_version hw_version;
};
/**
* struct cam_isp_tfe_query_cap_cmd - ISP TFE query device
* capability payload
*
* @device_iommu: returned iommu handles for device
* @cdm_iommu: returned iommu handles for cdm
* @num_dev: returned number of device capabilities
* @reserved: reserved field for alignment
* @dev_caps: returned device capability array
*
*/
struct cam_isp_tfe_query_cap_cmd {
struct cam_iommu_handle device_iommu;
struct cam_iommu_handle cdm_iommu;
__s32 num_dev;
__u32 reserved;
struct cam_isp_tfe_dev_cap_info dev_caps[CAM_ISP_TFE_HW_MAX];
};
/* Acquire Device */
/**
* struct cam_isp_tfe_out_port_info - An output port resource info
*
* @res_id: output resource id defined in file
* cam_isp_tfe.h
* @format: output format of the resource
* @width: output width in pixels
* @height: output height in lines
* @stride: output stride
* @comp_grp_id: composite group id for the resource.
* @secure_mode: flag to tell if output should be run in secure
* mode or not. See cam_defs.h for definition
* @wm_mode: wm mode
* @reserved: reserved field for alignment
*
*/
struct cam_isp_tfe_out_port_info {
__u32 res_id;
__u32 format;
__u32 width;
__u32 height;
__u32 stride;
__u32 comp_grp_id;
__u32 secure_mode;
__u32 wm_mode;
__u32 reserved;
};
/**
* struct cam_isp_tfe_in_port_info - An input port resource info
*
* @res_id: input resource id CAM_ISP_TFE_IN_RES_XXX
* @lane_type: lane type: c-phy or d-phy.
* @lane_num: active lane number
* @lane_cfg: lane configurations: 4 bits per lane
* @vc: input virtual channel number
* @dt: input data type number
* @format: input format
* @pix_pattern: pixel pattern
* @usage_type: whether dual tfe is required
* @left_start: left input start offset in pixels
* @left_end: left input stop offset in pixels
* @left_width: left input width in pixels
* @right_start: right input start offset in pixels.
* Only for Dual TFE
* @right_end: right input stop offset in
* pixels. Only for Dual TFE
* @right_width: right input width in pixels.
* Only for dual TFE
* @line_start: top of the line number
* @line_stop: bottome of the line number
* @height: input height in lines
* @batch_size: batch size for HFR mode
* @dsp_mode: DSP stream mode(Defines as
* CAM_ISP_TFE_DSP_MODE_*)
* @sensor_width: sensor width
* @sensor_height: sensor height
* @hbi_value: sensor HBI value
* @vbi_value: sensor VBI value
* @sensor_fps: sensor fps
* @init_frame_drop init frame drop value.
* @num_out_res: number of the output resource associated
* @data: payload that contains the output resources,
* array of cam_isp_tfe_out_port_info data
*
*/
struct cam_isp_tfe_in_port_info {
__u32 res_id;
__u32 lane_type;
__u32 lane_num;
__u32 lane_cfg;
__u32 vc;
__u32 dt;
__u32 format;
__u32 pix_pattern;
__u32 usage_type;
__u32 left_start;
__u32 left_end;
__u32 left_width;
__u32 right_start;
__u32 right_end;
__u32 right_width;
__u32 line_start;
__u32 line_end;
__u32 height;
__u32 batch_size;
__u32 dsp_mode;
__u32 sensor_width;
__u32 sensor_height;
__u32 sensor_hbi;
__u32 sensor_vbi;
__u32 sensor_fps;
__u32 init_frame_drop;
__u32 num_out_res;
union {
struct cam_isp_tfe_out_port_info data[1];
__DECLARE_FLEX_ARRAY(struct cam_isp_tfe_out_port_info, data_flex);
};
};
/**
* struct cam_isp_tfe_in_port_info_v2 - An input port resource info
*
* @res_id: input resource id CAM_ISP_TFE_IN_RES_XXX
* @lane_type: lane type: c-phy or d-phy.
* @lane_num: active lane number
* @lane_cfg: lane configurations: 4 bits per lane
* @vc: input virtual channel number
* @dt: input data type number
* @format: input format
* @pix_pattern: pixel pattern
* @usage_type: whether dual tfe is required
* @left_start: left input start offset in pixels
* @left_end: left input stop offset in pixels
* @left_width: left input width in pixels
* @right_start: right input start offset in pixels.
* Only for Dual TFE
* @right_end: right input stop offset in
* pixels. Only for Dual TFE
* @right_width: right input width in pixels.
* Only for dual TFE
* @line_start: top of the line number
* @line_stop: bottome of the line number
* @height: input height in lines
* @batch_size: batch size for HFR mode
* @dsp_mode: DSP stream mode(Defines as
* CAM_ISP_TFE_DSP_MODE_*)
* @sensor_width: sensor width
* @sensor_height: sensor height
* @sensor_hbi: sensor HBI value
* @sensor_vbi: sensor VBI value
* @sensor_fps: sensor fps
* @init_frame_drop init frame drop value.
* @num_out_res: number of the output resource associated
* @feature_flag: Feature flags for indicating QCFA, Bayer bin
* @core_cfg: Core configuration
* @reserve_field_1: Reserve field 1
* @reserve_field_2: Reserve field 2
* @reserve_field_3: Reserve field 3
* @reserve_field_4: Reserve field 4
* @reserve_field_5: Reserve field 5
* @reserve_field_6: Reserve filed 6
* @data: payload that contains the output resources,
* array of cam_isp_tfe_out_port_info data
*
*/
struct cam_isp_tfe_in_port_info_v2 {
__u32 res_id;
__u32 lane_type;
__u32 lane_num;
__u32 lane_cfg;
__u32 vc[CAM_ISP_TFE_VC_DT_CFG];
__u32 dt[CAM_ISP_TFE_VC_DT_CFG];
__u32 num_valid_vc_dt;
__u32 format;
__u32 pix_pattern;
__u32 usage_type;
__u32 left_start;
__u32 left_end;
__u32 left_width;
__u32 right_start;
__u32 right_end;
__u32 right_width;
__u32 line_start;
__u32 line_end;
__u32 height;
__u32 batch_size;
__u32 dsp_mode;
__u32 sensor_width;
__u32 sensor_height;
__u32 sensor_hbi;
__u32 sensor_vbi;
__u32 sensor_fps;
__u32 init_frame_drop;
__u32 num_out_res;
__u32 feature_flag;
__u32 core_cfg;
__u32 reserve_field_1;
__u32 reserve_field_2;
__u32 reserve_field_3;
__u32 reserve_field_4;
__u32 reserve_field_5;
__u32 reserve_field_6;
union {
struct cam_isp_tfe_out_port_info data[1];
__DECLARE_FLEX_ARRAY(struct cam_isp_tfe_out_port_info, data_flex);
};
};
/**
* struct cam_isp_tfe_resource - A resource bundle
*
* @resoruce_id: resource id for the resource bundle
* @length: length of the while resource blob
* @handle_type: type of the resource handle
* @reserved: reserved field for alignment
* @res_hdl: resource handle that points to the
* resource array
*
*/
struct cam_isp_tfe_resource {
__u32 resource_id;
__u32 length;
__u32 handle_type;
__u32 reserved;
__u64 res_hdl;
};
/**
* struct cam_isp_tfe_port_hfr_config - HFR configuration for
* this port
*
* @resource_type: Resource type
* @subsample_pattern: Subsample pattern. Used in HFR mode. It
* should be consistent with batchSize and
* CAMIF programming.
* @subsample_period: Subsample period. Used in HFR mode. It
* should be consistent with batchSize and
* CAMIF programming.
* @framedrop_pattern: Framedrop pattern
* @framedrop_period: Framedrop period
* @reserved: Reserved for alignment
*/
struct cam_isp_tfe_port_hfr_config {
__u32 resource_type;
__u32 subsample_pattern;
__u32 subsample_period;
__u32 framedrop_pattern;
__u32 framedrop_period;
__u32 reserved;
} __attribute__((packed));
/**
* struct cam_isp_tfe_resource_hfr_config - Resource HFR
* configuration
*
* @num_ports: Number of ports
* @reserved: Reserved for alignment
* @port_hfr_config: HFR configuration for each IO port
*/
struct cam_isp_tfe_resource_hfr_config {
__u32 num_ports;
__u32 reserved;
union {
struct cam_isp_tfe_port_hfr_config port_hfr_config[1];
__DECLARE_FLEX_ARRAY(struct cam_isp_tfe_port_hfr_config, port_hfr_config_flex);
};
} __attribute__((packed));
/**
* struct cam_isp_tfe_dual_stripe_config - stripe config per bus
* client
*
* @offset: Start horizontal offset relative to
* output buffer
* @width: Width of the stripe in pixels
* @port_id: Port id of ISP TFE output
* @reserved: Reserved for alignment
*
*/
struct cam_isp_tfe_dual_stripe_config {
__u32 offset;
__u32 width;
__u32 port_id;
__u32 reserved;
};
/**
* struct cam_isp_tfe_dual_config - dual isp configuration
*
* @num_ports Number of isp output ports
* @reserved Reserved field for alignment
* @stripes: Stripe information
*
*/
struct cam_isp_tfe_dual_config {
__u32 num_ports;
__u32 reserved;
union {
struct cam_isp_tfe_dual_stripe_config stripes[1];
__DECLARE_FLEX_ARRAY(struct cam_isp_tfe_dual_stripe_config, stripes_flex);
};
} __attribute__((packed));
/**
* struct cam_isp_tfe_clock_config - Clock configuration
*
* @usage_type: Usage type (Single/Dual)
* @num_rdi: Number of RDI votes
* @left_pix_hz: Pixel Clock for Left ISP
* @right_pix_hz: Pixel Clock for Right ISP
* valid only if Dual
* @rdi_hz: RDI Clock. ISP TFE clock will be
* max of RDI and PIX clocks. For a
* particular context which ISP TFE
* HW the RDI is allocated to is
* not known to UMD. Hence pass the
* clock and let KMD decide.
*/
struct cam_isp_tfe_clock_config {
__u32 usage_type;
__u32 num_rdi;
__u64 left_pix_hz;
__u64 right_pix_hz;
union {
__u64 rdi_hz[1];
__DECLARE_FLEX_ARRAY(__u64, rdi_hz_flex);
};
} __attribute__((packed));
/**
* struct cam_isp_tfe_csid_clock_config - CSID clock
* configuration
*
* @csid_clock CSID clock
* @csi_phy_clock Phy clock valid if tpg is selected
*/
struct cam_isp_tfe_csid_clock_config {
__u64 csid_clock;
__u64 phy_clock;
} __attribute__((packed));
/**
* struct cam_isp_tfe_bw_config_v2 - Bandwidth configuration
*
* @usage_type: Usage type (Single/Dual)
* @num_paths: Number of axi data paths
* @axi_path Per path vote info
*/
struct cam_isp_tfe_bw_config_v2 {
__u32 usage_type;
__u32 num_paths;
union {
struct cam_axi_per_path_bw_vote axi_path[1];
__DECLARE_FLEX_ARRAY(struct cam_axi_per_path_bw_vote, axi_path_flex);
};
} __attribute__((packed));
/**
* struct cam_isp_acquire_hw_info - ISP TFE acquire HW params
*
* @common_info_version : Version of common info struct used
* @common_info_size : Size of common info struct used
* @common_info_offset : Offset of common info from start of data
* @num_inputs : Number of inputs
* @input_info_version : Version of input info struct used
* @input_info_size : Size of input info struct used
* @input_info_offset : Offset of input info from start of data
* @data : Data pointer to point the cam_isp_tfe_in_port_info
* structure
*/
struct cam_isp_tfe_acquire_hw_info {
__u16 common_info_version;
__u16 common_info_size;
__u32 common_info_offset;
__u32 num_inputs;
__u32 input_info_version;
__u32 input_info_size;
__u32 input_info_offset;
__u64 data;
};
/**
* struct cam_isp_tfe_wm_bw_limiter_config - ISP TFE write master
* BW limter config
*
*
* @res_type : output resource type defined in file cam_isp_tfe.h
* @enable_limiter : 0 for disable else enabled
* @counter_limit : Max counter value
*/
struct cam_isp_tfe_wm_bw_limiter_config {
__u32 res_type;
__u32 enable_limiter;
__u32 counter_limit[CAM_PACKET_MAX_PLANES];
};
/**
* struct cam_isp_tfe_out_rsrc_bw_limiter_config - ISP TFE out rsrc BW limiter config
*
* Configure BW limiter for ISP TFE WMs
*
* @version : Version field
* @num_ports : Number of ports
* @bw_limit_config : WM BW limiter config
*/
struct cam_isp_tfe_out_rsrc_bw_limiter_config {
__u32 version;
__u32 num_ports;
union {
struct cam_isp_tfe_wm_bw_limiter_config bw_limiter_config[1];
__DECLARE_FLEX_ARRAY(
struct cam_isp_tfe_wm_bw_limiter_config, bw_limiter_config_flex);
};
};
#define CAM_TFE_ACQUIRE_COMMON_VER0 0x1000
#define CAM_TFE_ACQUIRE_COMMON_SIZE_VER0 0x0
#define CAM_TFE_ACQUIRE_INPUT_VER0 0x2000
#define CAM_TFE_ACQUIRE_INPUT_SIZE_VER0 sizeof(struct cam_isp_tfe_in_port_info)
#define CAM_TFE_ACQUIRE_OUT_VER0 0x3000
#define CAM_TFE_ACQUIRE_OUT_SIZE_VER0 sizeof(struct cam_isp_tfe_out_port_info)
#endif /* __UAPI_CAM_TFE_H__ */