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replace common qcom sources with samsung ones

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This commit is contained in:
SaschaNes
2025-08-12 22:13:00 +02:00
parent ba24dcded9
commit 6f7753de11
5682 changed files with 2450203 additions and 103634 deletions
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18
qcom/opensource/mmrm-devicetree/waipio/waipio-mmrm-test.dts Normal file
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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/clock/qcom,camcc-waipio.h>
#include <dt-bindings/clock/qcom,videocc-waipio.h>
#include <dt-bindings/clock/qcom,dispcc-waipio.h>
#include "waipio-mmrm-test.dtsi"
/ {
model = "Qualcomm Technologies, Inc. waipio v1 & v2 SoC";
compatible = "qcom,waipio";
qcom,msm-id = <457 0x10000>, <482 0x10000>;
qcom,board-id = <0 0>; /* required by merge_dtbs.py */
};

100
qcom/opensource/mmrm-devicetree/waipio/waipio-mmrm-test.dtsi Normal file
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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
&soc {
msm_mmrm_test: qcom,mmrm-test {
compatible = "qcom,msm-mmrm-test", "qcom,waipio-mmrm-test";
status = "disable";
/* Clock info */
clock-names =
"cam_cc_ife_0_clk_src",
"cam_cc_ife_1_clk_src",
"cam_cc_ife_2_clk_src",
"cam_cc_csid_clk_src",
"cam_cc_sfe_0_clk_src",
"cam_cc_sfe_1_clk_src",
"cam_cc_ipe_nps_clk_src",
"cam_cc_bps_clk_src",
"cam_cc_ife_lite_clk_src",
"cam_cc_jpeg_clk_src",
"cam_cc_camnoc_axi_clk_src",
"cam_cc_ife_lite_csid_clk_src",
"cam_cc_icp_clk_src",
"cam_cc_cphy_rx_clk_src",
"cam_cc_csi0phytimer_clk_src",
"cam_cc_csi1phytimer_clk_src",
"cam_cc_csi2phytimer_clk_src",
"cam_cc_csi3phytimer_clk_src",
"cam_cc_csi4phytimer_clk_src",
"cam_cc_csi5phytimer_clk_src",
"cam_cc_cci_0_clk_src",
"cam_cc_cci_1_clk_src",
"cam_cc_slow_ahb_clk_src",
"cam_cc_fast_ahb_clk_src",
"video_cc_mvs1_clk_src",
"disp_cc_mdss_mdp_clk_src",
"disp_cc_mdss_dptx0_link_clk_src",
"video_cc_mvs0_clk_src";
clocks =
<&clock_camcc CAM_CC_IFE_0_CLK_SRC>,
<&clock_camcc CAM_CC_IFE_1_CLK_SRC>,
<&clock_camcc CAM_CC_IFE_2_CLK_SRC>,
<&clock_camcc CAM_CC_CSID_CLK_SRC>,
<&clock_camcc CAM_CC_SFE_0_CLK_SRC>,
<&clock_camcc CAM_CC_SFE_1_CLK_SRC>,
<&clock_camcc CAM_CC_IPE_NPS_CLK_SRC>,
<&clock_camcc CAM_CC_BPS_CLK_SRC>,
<&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>,
<&clock_camcc CAM_CC_JPEG_CLK_SRC>,
<&clock_camcc CAM_CC_CAMNOC_AXI_CLK_SRC>,
<&clock_camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>,
<&clock_camcc CAM_CC_ICP_CLK_SRC>,
<&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>,
<&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>,
<&clock_camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>,
<&clock_camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>,
<&clock_camcc CAM_CC_CSI3PHYTIMER_CLK_SRC>,
<&clock_camcc CAM_CC_CSI4PHYTIMER_CLK_SRC>,
<&clock_camcc CAM_CC_CSI5PHYTIMER_CLK_SRC>,
<&clock_camcc CAM_CC_CCI_0_CLK_SRC>,
<&clock_camcc CAM_CC_CCI_1_CLK_SRC>,
<&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>,
<&clock_camcc CAM_CC_FAST_AHB_CLK_SRC>,
<&clock_videocc VIDEO_CC_MVS1_CLK_SRC>,
<&clock_dispcc DISP_CC_MDSS_MDP_CLK_SRC>,
<&clock_dispcc DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>,
<&clock_videocc VIDEO_CC_MVS0_CLK_SRC>;
clock_rates =
<0x1 CAM_CC_IFE_0_CLK_SRC 432000000 594000000 675000000 785000000 785000000>,
<0x1 CAM_CC_IFE_1_CLK_SRC 432000000 594000000 675000000 785000000 785000000>,
<0x1 CAM_CC_IFE_2_CLK_SRC 432000000 594000000 675000000 785000000 785000000>,
<0x1 CAM_CC_CSID_CLK_SRC 400000000 480000000 480000000 480000000 480000000>,
<0x1 CAM_CC_SFE_0_CLK_SRC 432000000 594000000 675000000 785000000 785000000>,
<0x1 CAM_CC_SFE_1_CLK_SRC 364000000 500000000 600000000 700000000 700000000>,
<0x1 CAM_CC_IPE_NPS_CLK_SRC 200000000 400000000 480000000 600000000 600000000>,
<0x1 CAM_CC_BPS_CLK_SRC 200000000 400000000 480000000 600000000 600000000>,
<0x1 CAM_CC_IFE_LITE_CLK_SRC 400000000 480000000 480000000 480000000 480000000>,
<0x1 CAM_CC_JPEG_CLK_SRC 200000000 400000000 480000000 600000000 600000000>,
<0x1 CAM_CC_CAMNOC_AXI_CLK_SRC 300000000 400000000 400000000 400000000 400000000>,
<0x1 CAM_CC_IFE_LITE_CSID_CLK_SRC 400000000 480000000 480000000 480000000 480000000>,
<0x1 CAM_CC_ICP_CLK_SRC 400000000 480000000 600000000 600000000 600000000>,
<0x1 CAM_CC_CPHY_RX_CLK_SRC 400000000 480000000 480000000 480000000 480000000>,
<0x1 CAM_CC_CSI0PHYTIMER_CLK_SRC 400000000 400000000 400000000 400000000 400000000>,
<0x1 CAM_CC_CSI1PHYTIMER_CLK_SRC 400000000 400000000 400000000 400000000 400000000>,
<0x1 CAM_CC_CSI2PHYTIMER_CLK_SRC 400000000 400000000 400000000 400000000 400000000>,
<0x1 CAM_CC_CSI3PHYTIMER_CLK_SRC 400000000 400000000 400000000 400000000 400000000>,
<0x1 CAM_CC_CSI4PHYTIMER_CLK_SRC 400000000 400000000 400000000 400000000 400000000>,
<0x1 CAM_CC_CSI5PHYTIMER_CLK_SRC 400000000 400000000 400000000 400000000 400000000>,
<0x1 CAM_CC_CCI_0_CLK_SRC 37500000 37500000 37500000 37500000 37500000>,
<0x1 CAM_CC_CCI_1_CLK_SRC 37500000 37500000 37500000 37500000 37500000>,
<0x1 CAM_CC_SLOW_AHB_CLK_SRC 80000000 80000000 80000000 80000000 80000000>,
<0x1 CAM_CC_FAST_AHB_CLK_SRC 100000000 200000000 300000000 400000000 400000000>,
<0x2 VIDEO_CC_MVS1_CLK_SRC 1050000000 1350000000 1500000000 1650000000 1650000000>,
<0x3 DISP_CC_MDSS_MDP_CLK_SRC 200000000 325000000 375000000 500000000 500000000>,
<0x3 DISP_CC_MDSS_DPTX0_LINK_CLK_SRC 270000 270000 540000 810000 810000>,
<0x4 VIDEO_CC_MVS0_CLK_SRC 720000000 1014000000 1098000000 1332000000 1332000000>;
};
};

19
qcom/opensource/mmrm-devicetree/waipio/waipio-mmrm.dts Normal file
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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/clock/qcom,camcc-waipio.h>
#include <dt-bindings/clock/qcom,videocc-waipio.h>
#include <dt-bindings/clock/qcom,dispcc-waipio.h>
#include "waipio-mmrm.dtsi"
/ {
model = "Qualcomm Technologies, Inc. waipio v1 SoC";
compatible = "qcom,waipio";
qcom,msm-id = <457 0x10000>, <482 0x10000>;
qcom,board-id = <0 0>; /* required by merge_dtbs.py */
};

54
qcom/opensource/mmrm-devicetree/waipio/waipio-mmrm.dtsi Normal file
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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
&soc {
msm_mmrm: qcom,mmrm {
compatible = "qcom,msm-mmrm", "qcom,waipio-mmrm";
status = "okay";
/* MMRM clock threshold */
mmrm-peak-threshold = <9000>;
/* MM Rail info */
mm-rail-corners = "lowsvs", "svs", "svsl1", "nom", "noml1", "turbo";
mm-rail-fact-volt = <36439 41157 44827 49152 54526 54526>;
/* Scaling factors */
scaling-fact-dyn = <35390 45876 54395 66192 82576 82576>;
scaling-fact-leak = <451544 548537 633078 746456 920126 920126>;
/* Client info */
mmrm-client-info =
<0x1 CAM_CC_IFE_0_CLK_SRC 36280730 260834 1>,
<0x1 CAM_CC_IFE_1_CLK_SRC 36280730 260834 1>,
<0x1 CAM_CC_IFE_2_CLK_SRC 36280730 260834 1>,
<0x1 CAM_CC_CSID_CLK_SRC 2160722 0 3>,
<0x1 CAM_CC_SFE_0_CLK_SRC 20833895 135660 1>,
<0x1 CAM_CC_SFE_1_CLK_SRC 20833895 135660 1>,
<0x1 CAM_CC_IPE_NPS_CLK_SRC 67423437 608830 1>,
<0x1 CAM_CC_BPS_CLK_SRC 70584894 212992 1>,
<0x1 CAM_CC_IFE_LITE_CLK_SRC 1698431 20055 5>,
<0x1 CAM_CC_JPEG_CLK_SRC 1011876 0 2>,
<0x1 CAM_CC_CAMNOC_AXI_CLK_SRC 3407872 589824 1>,
<0x1 CAM_CC_IFE_LITE_CSID_CLK_SRC 262144 0 5>,
<0x1 CAM_CC_ICP_CLK_SRC 314573 0 1>,
<0x1 CAM_CC_CPHY_RX_CLK_SRC 222823 0 9>,
<0x1 CAM_CC_CSI0PHYTIMER_CLK_SRC 6554 0 1>,
<0x1 CAM_CC_CSI1PHYTIMER_CLK_SRC 6554 0 1>,
<0x1 CAM_CC_CSI2PHYTIMER_CLK_SRC 6554 0 1>,
<0x1 CAM_CC_CSI3PHYTIMER_CLK_SRC 6554 0 1>,
<0x1 CAM_CC_CSI4PHYTIMER_CLK_SRC 6554 0 1>,
<0x1 CAM_CC_CSI5PHYTIMER_CLK_SRC 6554 0 1>,
<0x1 CAM_CC_CCI_0_CLK_SRC 656 0 1>,
<0x1 CAM_CC_CCI_1_CLK_SRC 656 0 1>,
<0x1 CAM_CC_SLOW_AHB_CLK_SRC 70124 0 1>,
<0x1 CAM_CC_FAST_AHB_CLK_SRC 35390 0 1>,
<0x2 VIDEO_CC_MVS1_CLK_SRC 81149297 488244 1>,
<0x3 DISP_CC_MDSS_MDP_CLK_SRC 21954560 184812 1>,
<0x3 DISP_CC_MDSS_DPTX0_LINK_CLK_SRC 1004667 4916 1>,
<0x4 VIDEO_CC_MVS0_CLK_SRC 28970189 582288 1>;
};
};

19
qcom/opensource/mmrm-devicetree/waipio/waipio-v2-mmrm-test.dts Normal file
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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/clock/qcom,camcc-waipio.h>
#include <dt-bindings/clock/qcom,videocc-waipio.h>
#include <dt-bindings/clock/qcom,dispcc-waipio.h>
#include "waipio-v2-mmrm-test.dtsi"
/ {
model = "Qualcomm Technologies, Inc. waipio v1 & v2 SoC";
compatible = "qcom,waipio";
qcom,msm-id = <457 0x20000>, <482 0x20000>;
qcom,board-id = <0 0>; /* required by merge_dtbs.py */
};

100
qcom/opensource/mmrm-devicetree/waipio/waipio-v2-mmrm-test.dtsi Normal file
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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
&soc {
msm_mmrm_test: qcom,mmrm-test {
compatible = "qcom,msm-mmrm-test", "qcom,waipio-mmrm-test";
status = "disable";
/* Clock info */
clock-names =
"cam_cc_ife_0_clk_src",
"cam_cc_ife_1_clk_src",
"cam_cc_ife_2_clk_src",
"cam_cc_csid_clk_src",
"cam_cc_sfe_0_clk_src",
"cam_cc_sfe_1_clk_src",
"cam_cc_ipe_nps_clk_src",
"cam_cc_bps_clk_src",
"cam_cc_ife_lite_clk_src",
"cam_cc_jpeg_clk_src",
"cam_cc_camnoc_axi_clk_src",
"cam_cc_ife_lite_csid_clk_src",
"cam_cc_icp_clk_src",
"cam_cc_cphy_rx_clk_src",
"cam_cc_csi0phytimer_clk_src",
"cam_cc_csi1phytimer_clk_src",
"cam_cc_csi2phytimer_clk_src",
"cam_cc_csi3phytimer_clk_src",
"cam_cc_csi4phytimer_clk_src",
"cam_cc_csi5phytimer_clk_src",
"cam_cc_cci_0_clk_src",
"cam_cc_cci_1_clk_src",
"cam_cc_slow_ahb_clk_src",
"cam_cc_fast_ahb_clk_src",
"video_cc_mvs1_clk_src",
"disp_cc_mdss_mdp_clk_src",
"disp_cc_mdss_dptx0_link_clk_src",
"video_cc_mvs0_clk_src";
clocks =
<&clock_camcc CAM_CC_IFE_0_CLK_SRC>,
<&clock_camcc CAM_CC_IFE_1_CLK_SRC>,
<&clock_camcc CAM_CC_IFE_2_CLK_SRC>,
<&clock_camcc CAM_CC_CSID_CLK_SRC>,
<&clock_camcc CAM_CC_SFE_0_CLK_SRC>,
<&clock_camcc CAM_CC_SFE_1_CLK_SRC>,
<&clock_camcc CAM_CC_IPE_NPS_CLK_SRC>,
<&clock_camcc CAM_CC_BPS_CLK_SRC>,
<&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>,
<&clock_camcc CAM_CC_JPEG_CLK_SRC>,
<&clock_camcc CAM_CC_CAMNOC_AXI_CLK_SRC>,
<&clock_camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>,
<&clock_camcc CAM_CC_ICP_CLK_SRC>,
<&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>,
<&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>,
<&clock_camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>,
<&clock_camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>,
<&clock_camcc CAM_CC_CSI3PHYTIMER_CLK_SRC>,
<&clock_camcc CAM_CC_CSI4PHYTIMER_CLK_SRC>,
<&clock_camcc CAM_CC_CSI5PHYTIMER_CLK_SRC>,
<&clock_camcc CAM_CC_CCI_0_CLK_SRC>,
<&clock_camcc CAM_CC_CCI_1_CLK_SRC>,
<&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>,
<&clock_camcc CAM_CC_FAST_AHB_CLK_SRC>,
<&clock_videocc VIDEO_CC_MVS1_CLK_SRC>,
<&clock_dispcc DISP_CC_MDSS_MDP_CLK_SRC>,
<&clock_dispcc DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>,
<&clock_videocc VIDEO_CC_MVS0_CLK_SRC>;
clock_rates =
<0x1 CAM_CC_IFE_0_CLK_SRC 432000000 594000000 675000000 727000000 727000000>,
<0x1 CAM_CC_IFE_1_CLK_SRC 432000000 594000000 675000000 727000000 727000000>,
<0x1 CAM_CC_IFE_2_CLK_SRC 432000000 594000000 675000000 727000000 727000000>,
<0x1 CAM_CC_CSID_CLK_SRC 400000000 480000000 480000000 480000000 480000000>,
<0x1 CAM_CC_SFE_0_CLK_SRC 432000000 594000000 675000000 727000000 727000000>,
<0x1 CAM_CC_SFE_1_CLK_SRC 432000000 594000000 675000000 727000000 727000000>,
<0x1 CAM_CC_IPE_NPS_CLK_SRC 364000000 500000000 600000000 700000000 700000000>,
<0x1 CAM_CC_BPS_CLK_SRC 200000000 400000000 480000000 600000000 600000000>,
<0x1 CAM_CC_IFE_LITE_CLK_SRC 400000000 480000000 480000000 480000000 480000000>,
<0x1 CAM_CC_JPEG_CLK_SRC 200000000 400000000 480000000 600000000 600000000>,
<0x1 CAM_CC_CAMNOC_AXI_CLK_SRC 300000000 400000000 400000000 400000000 400000000>,
<0x1 CAM_CC_IFE_LITE_CSID_CLK_SRC 400000000 480000000 480000000 480000000 480000000>,
<0x1 CAM_CC_ICP_CLK_SRC 400000000 480000000 600000000 600000000 600000000>,
<0x1 CAM_CC_CPHY_RX_CLK_SRC 400000000 480000000 480000000 480000000 480000000>,
<0x1 CAM_CC_CSI0PHYTIMER_CLK_SRC 400000000 400000000 400000000 400000000 400000000>,
<0x1 CAM_CC_CSI1PHYTIMER_CLK_SRC 400000000 400000000 400000000 400000000 400000000>,
<0x1 CAM_CC_CSI2PHYTIMER_CLK_SRC 400000000 400000000 400000000 400000000 400000000>,
<0x1 CAM_CC_CSI3PHYTIMER_CLK_SRC 400000000 400000000 400000000 400000000 400000000>,
<0x1 CAM_CC_CSI4PHYTIMER_CLK_SRC 400000000 400000000 400000000 400000000 400000000>,
<0x1 CAM_CC_CSI5PHYTIMER_CLK_SRC 400000000 400000000 400000000 400000000 400000000>,
<0x1 CAM_CC_CCI_0_CLK_SRC 37500000 37500000 37500000 37500000 37500000>,
<0x1 CAM_CC_CCI_1_CLK_SRC 37500000 37500000 37500000 37500000 37500000>,
<0x1 CAM_CC_SLOW_AHB_CLK_SRC 80000000 80000000 80000000 80000000 80000000>,
<0x1 CAM_CC_FAST_AHB_CLK_SRC 100000000 200000000 300000000 400000000 400000000>,
<0x2 VIDEO_CC_MVS1_CLK_SRC 1050000000 1350000000 1500000000 1650000000 1650000000>,
<0x3 DISP_CC_MDSS_MDP_CLK_SRC 200000000 325000000 375000000 500000000 500000000>,
<0x3 DISP_CC_MDSS_DPTX0_LINK_CLK_SRC 270000 270000 540000 810000 810000>,
<0x4 VIDEO_CC_MVS0_CLK_SRC 720000000 1014000000 1098000000 1332000000 1332000000>;
};
};

19
qcom/opensource/mmrm-devicetree/waipio/waipio-v2-mmrm.dts Normal file
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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/clock/qcom,camcc-waipio.h>
#include <dt-bindings/clock/qcom,videocc-waipio.h>
#include <dt-bindings/clock/qcom,dispcc-waipio.h>
#include "waipio-v2-mmrm.dtsi"
/ {
model = "Qualcomm Technologies, Inc. waipio v2 SoC";
compatible = "qcom,waipio";
qcom,msm-id = <457 0x20000>, <482 0x20000>;
qcom,board-id = <0 0>; /* required by merge_dtbs.py */
};

53
qcom/opensource/mmrm-devicetree/waipio/waipio-v2-mmrm.dtsi Normal file
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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
&soc {
msm_mmrm: qcom,mmrm {
compatible = "qcom,msm-mmrm", "qcom,waipio-mmrm";
status = "okay";
/* MMRM clock threshold */
mmrm-peak-threshold = <9000>;
/* MM Rail info */
mm-rail-corners = "lowsvs", "svs", "svsl1", "nom", "noml1", "turbo";
mm-rail-fact-volt = <36438 41157 44827 49152 54526 54526>;
/* Scaling factors */
scaling-fact-dyn = <35389 45876 54395 66192 82575 82575>;
scaling-fact-leak = <451543 548537 633078 746456 920125 920125>;
/* Client info */
mmrm-client-info =
<0x1 CAM_CC_IFE_0_CLK_SRC 33751040 279839 1>,
<0x1 CAM_CC_IFE_1_CLK_SRC 33751040 279839 1>,
<0x1 CAM_CC_IFE_2_CLK_SRC 33751040 279839 1>,
<0x1 CAM_CC_CSID_CLK_SRC 2160722 0 3>,
<0x1 CAM_CC_SFE_0_CLK_SRC 19333120 132383 1>,
<0x1 CAM_CC_SFE_1_CLK_SRC 19333120 132383 1>,
<0x1 CAM_CC_IPE_NPS_CLK_SRC 67436544 587203 1>,
<0x1 CAM_CC_BPS_CLK_SRC 70584893 334234 1>,
<0x1 CAM_CC_IFE_LITE_CLK_SRC 8492155 11796 5>,
<0x1 CAM_CC_JPEG_CLK_SRC 1097073 595067 2>,
<0x1 CAM_CC_CAMNOC_AXI_CLK_SRC 7602176 3533701 1>,
<0x1 CAM_CC_IFE_LITE_CSID_CLK_SRC 262144 0 5>,
<0x1 CAM_CC_ICP_CLK_SRC 314573 0 1>,
<0x1 CAM_CC_CPHY_RX_CLK_SRC 222822 0 9>,
<0x1 CAM_CC_CSI0PHYTIMER_CLK_SRC 6554 0 1>,
<0x1 CAM_CC_CSI1PHYTIMER_CLK_SRC 6554 0 1>,
<0x1 CAM_CC_CSI2PHYTIMER_CLK_SRC 6554 0 1>,
<0x1 CAM_CC_CSI3PHYTIMER_CLK_SRC 6554 0 1>,
<0x1 CAM_CC_CSI4PHYTIMER_CLK_SRC 6554 0 1>,
<0x1 CAM_CC_CSI5PHYTIMER_CLK_SRC 6554 0 1>,
<0x1 CAM_CC_CCI_0_CLK_SRC 655 0 1>,
<0x1 CAM_CC_CCI_1_CLK_SRC 655 0 1>,
<0x1 CAM_CC_SLOW_AHB_CLK_SRC 70124 0 1>,
<0x1 CAM_CC_FAST_AHB_CLK_SRC 35389 0 1>,
<0x2 VIDEO_CC_MVS1_CLK_SRC 81149297 488243 1>,
<0x3 DISP_CC_MDSS_MDP_CLK_SRC 21954560 184812 1>,
<0x3 DISP_CC_MDSS_DPTX0_LINK_CLK_SRC 1004667 5243 1>,
<0x4 VIDEO_CC_MVS0_CLK_SRC 28970189 582287 1>;
};
};