acfc51f2dd
Remove SDPM clock driver support from clarence gaming. Remove cpu pause action on boot core. Add cold temperature interrupt handling support in clarence. Change-Id: I05da43e8a8e392f2bec8f425ac9750f559221953 Signed-off-by: Nitesh Kumar <quic_nitekuma@quicinc.com>
18 lines
306 B
Plaintext
18 lines
306 B
Plaintext
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include "ravelin.dtsi"
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&cx_sdpm {
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status = "disabled";
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};
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/ {
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model = "Qualcomm Technologies, Inc. Ravelin SG";
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compatible = "qcom,ravelin";
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qcom,msm-id = <653 0x10000>;
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};
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